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[209.132.180.67]) by mx.google.com with ESMTP id i5si1736017pfb.330.2017.07.08.13.03.31; Sat, 08 Jul 2017 13:03:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.b=Hww1ZYNn; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753113AbdGHUDb (ORCPT + 6 others); Sat, 8 Jul 2017 16:03:31 -0400 Received: from mail-pf0-f172.google.com ([209.85.192.172]:34119 "EHLO mail-pf0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753059AbdGHUDa (ORCPT ); Sat, 8 Jul 2017 16:03:30 -0400 Received: by mail-pf0-f172.google.com with SMTP id q85so31773905pfq.1 for ; Sat, 08 Jul 2017 13:03:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bKM1PXgVHCo5t1AJQMHZ4IKcN2WdkoZ0c89bjGcZmpY=; b=Hww1ZYNnkL8e2+0/A7u7wt/tV7GDL9MudRk8R3V5Wz9oFObsH+/MDr9Dwq6VvackDI 6IVIeRrw1m9/ovxTKftuJpg8SCCceHgz1l2PY8pXte7vqPeLRRHBPUAEFkU8DV55FYbc Zqx1K7Fx9UxSbfU+diAmABQOrP6HBkBY2+g7g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bKM1PXgVHCo5t1AJQMHZ4IKcN2WdkoZ0c89bjGcZmpY=; b=XDClrKpkFHu/iESAzVAGbXnHeURMsW98Zt3cMLMg/e4x+4jYQH+T8U5CRLffwQrV0e s5KECaLRgaKZuZyiBXZIBb/Dg+sKOAzIOqee+A9pmPG6Z5aDELjgVU0VdtWT23EAk9py ycQsyBR8yIcd76ppvploucQmTA8eP+yYLPyKahlOqrMqRNdbfUQDsWBpO1KRGRj+e0pL hmbizNFWJXazqepbOZYoBvXMJjO0BVPSAPWnp0plgrs6v7cKIN5Z2x8Rsbi2PRAkV0q1 fBAspc1cPRy1dRxDpUSjlvneZ2WboXO3O32AnUalynCQcfdjOGBszXFcAbzollGhR4Gy TlRA== X-Gm-Message-State: AIVw112xH+dZyC1ouep9r/uy4ZoLbMsAO8Yhcouqw4BhGuhrIg3loWMj OeVQCRx5UUXafGHdk6mQkg== X-Received: by 10.84.128.103 with SMTP id 94mr9824668pla.234.1499544210159; Sat, 08 Jul 2017 13:03:30 -0700 (PDT) Received: from localhost.localdomain ([106.51.234.165]) by smtp.gmail.com with ESMTPSA id m79sm1155703pfk.35.2017.07.08.13.03.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 08 Jul 2017 13:03:28 -0700 (PDT) From: Amit Pundir To: Greg KH , Eric Anholt Cc: Stable Subject: [PATCH for-4.4.y 1/5] drm/vc4: Fix NULL deref in HDMI init error path Date: Sun, 9 Jul 2017 01:33:17 +0530 Message-Id: <1499544201-12812-2-git-send-email-amit.pundir@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499544201-12812-1-git-send-email-amit.pundir@linaro.org> References: <1499544201-12812-1-git-send-email-amit.pundir@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Eric Anholt commit 5883980313af70aec0ceebaef6ef0709726e5e63 upstream. If you make it here other than through err_destroy_encoder, vc4->hdmi is still NULL. Signed-off-by: Eric Anholt Signed-off-by: Amit Pundir --- drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.13.0 diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index da9a36d6e1d1..467a650b5105 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -537,7 +537,7 @@ err_unprepare_hsm: err_unprepare_pix: clk_disable_unprepare(hdmi->pixel_clock); err_put_i2c: - put_device(&vc4->hdmi->ddc->dev); + put_device(&hdmi->ddc->dev); return ret; } From patchwork Sat Jul 8 20:03:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Pundir X-Patchwork-Id: 107232 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp1614488qge; Sat, 8 Jul 2017 13:03:35 -0700 (PDT) X-Received: by 10.101.91.76 with SMTP id y12mr7369957pgr.55.1499544215023; Sat, 08 Jul 2017 13:03:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499544215; cv=none; d=google.com; s=arc-20160816; b=ogdJRK0nb0y9dtv0AMu1WexMZkazr5m+2NMyVuZDu3yxiM/N2pLbFMjJNml0+5qX+b mSFOfI79eWSk8GtMMI+Jse7B+XHakBjjkgI/JlBAT1UI78bZlcG0TRZAwMtGya5wcN3q adu8sM7Sgxr2ikrksy5eG73Wu9J7GdNqq35YN/Zm+T4YpV1TIIegrdTBE5FuPU9ox4nB kqdrfCItkAYYfgoh79+gzJfB+IBZi8J2M+oHmFFvAffsJaSM5PNzOZeKGdgVdfncm1j2 lHCjQihgG4awdaZiiLaUjL6czrQR441oHl03nUiIfSfhG0hCvNNFGy0Q6n+Uc1hZ82QD Yhtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=D9mHJ7L0qSic+muxg79MyIIJ88dQsuT6UlmlH0B0rCs=; b=jrTC6cK+yNsPpjpvlbV2JJMIWOs/X8JS383hm6eBbujJnQxluJiGzy5Y+x5Q8U+834 o8hgrjPTeCRZ0i/N+zzAAzxYd66W+AYGtEbYGVCJUoEt7FXOn0mXh/LrWQAi1pOE/l9L vZh+JWB4vFi2KOxHa16aQ7Goa+Sy+1elXAE6VoqXWyV06nFTwfaE6EIOg1KmKdO3rzUS oqxdhOSVReGKaIZo/encm4BhlaLEaRJ97kNfm1Il4kwJOZHAADc+2ejn0HNQwR9iN7e3 yAEmEZvk7/DTJb22xcGgpkyFMHL4Bzf1RHFl7iX/dAGhqE/6prI3MJ04SwPv1kYG864b sj1g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.b=Z7TUyndm; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i5si1736017pfb.330.2017.07.08.13.03.34; Sat, 08 Jul 2017 13:03:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.b=Z7TUyndm; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753115AbdGHUDe (ORCPT + 6 others); Sat, 8 Jul 2017 16:03:34 -0400 Received: from mail-pg0-f43.google.com ([74.125.83.43]:33113 "EHLO mail-pg0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753059AbdGHUDd (ORCPT ); Sat, 8 Jul 2017 16:03:33 -0400 Received: by mail-pg0-f43.google.com with SMTP id k14so31793458pgr.0 for ; Sat, 08 Jul 2017 13:03:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=D9mHJ7L0qSic+muxg79MyIIJ88dQsuT6UlmlH0B0rCs=; b=Z7TUyndmd7mtbVc8AdDamHsYUi50KUfQYi3PG0HBQhBSpWn6abg+PhWK+Bsfmg3Us2 YFUlISF1FfXCCmSJPq1LcIuBa5iWyFNHIXIhPKX01oSId6YNQxGygJrJHpnMmj+GI5s0 YloYJ06C4o5/9mWG7w52r9QFPi3m26kHywVVY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=D9mHJ7L0qSic+muxg79MyIIJ88dQsuT6UlmlH0B0rCs=; b=LE2c4F0iFLbBNV2kODBJreaEYvipl1woXNB3MiSMSyvkRNjFEaUcgr+vK9R7uHnMLn s+F3QXgqZnpbyrlY9Tzy6W5t0NpjI6K4sRUTpT035o5s7cg3AZEsQsTYWQyLzMZGlaij eVYEw2pL6PcBStiRiZuuqIw4X7lnSMS8dUsE41xzZTH4OunRrwDH4ZkX0/xPs3DfGgC7 KBdQw1guLfURD7uYTPiq2+tqVl6gC7fOO0BMjOtZWHnkyAeGilA9Kzdn+CaUd0uHBSIt B5doxMIauvkv2jbkWGybbspXnP6O6rmEeftxnVnTOYDnx3OfRxZmamnKoSvUEqALhNzl Ylcg== X-Gm-Message-State: AIVw1108KTRsb+UTd7h2THo8JyvN0v5urPc9OaVG1iw49yHHSdIsLqAN 4bEgJvjDu7FeqVMmVPP1nQ== X-Received: by 10.84.254.11 with SMTP id b11mr9748317plm.250.1499544212794; Sat, 08 Jul 2017 13:03:32 -0700 (PDT) Received: from localhost.localdomain ([106.51.234.165]) by smtp.gmail.com with ESMTPSA id m79sm1155703pfk.35.2017.07.08.13.03.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 08 Jul 2017 13:03:31 -0700 (PDT) From: Amit Pundir To: Greg KH , Eric Anholt Cc: Stable Subject: [PATCH for-4.4.y 2/5] drm/vc4: Initialize scaler DISPBKGND on modeset. Date: Sun, 9 Jul 2017 01:33:18 +0530 Message-Id: <1499544201-12812-3-git-send-email-amit.pundir@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499544201-12812-1-git-send-email-amit.pundir@linaro.org> References: <1499544201-12812-1-git-send-email-amit.pundir@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Eric Anholt commit 6a609209865247cc748e90158c99f374f79b494c upstream. We weren't updating the interlaced bit, so we'd scan out incorrectly if the firmware had brought up the TV encoder and we were switching to HDMI. Signed-off-by: Eric Anholt Signed-off-by: Amit Pundir --- drivers/gpu/drm/vc4/vc4_crtc.c | 6 ++++++ drivers/gpu/drm/vc4/vc4_regs.h | 14 ++++++++++++++ 2 files changed, 20 insertions(+) -- 2.13.0 diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 265064c62d49..784a450d3e72 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -182,6 +182,8 @@ static int vc4_get_clock_select(struct drm_crtc *crtc) static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc) { + struct drm_device *dev = crtc->dev; + struct vc4_dev *vc4 = to_vc4_dev(dev); struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); struct drm_crtc_state *state = crtc->state; struct drm_display_mode *mode = &state->adjusted_mode; @@ -240,6 +242,10 @@ static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc) PV_CONTROL_FIFO_CLR | PV_CONTROL_EN); + HVS_WRITE(SCALER_DISPBKGNDX(vc4_crtc->channel), + SCALER_DISPBKGND_AUTOHS | + (interlace ? SCALER_DISPBKGND_INTERLACE : 0)); + if (debug_dump_regs) { DRM_INFO("CRTC %d regs after:\n", drm_crtc_index(crtc)); vc4_crtc_dump_regs(vc4_crtc); diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h index 9e4e904c668e..06f5d298a651 100644 --- a/drivers/gpu/drm/vc4/vc4_regs.h +++ b/drivers/gpu/drm/vc4/vc4_regs.h @@ -350,6 +350,17 @@ # define SCALER_DISPCTRLX_HEIGHT_SHIFT 0 #define SCALER_DISPBKGND0 0x00000044 +# define SCALER_DISPBKGND_AUTOHS BIT(31) +# define SCALER_DISPBKGND_INTERLACE BIT(30) +# define SCALER_DISPBKGND_GAMMA BIT(29) +# define SCALER_DISPBKGND_TESTMODE_MASK VC4_MASK(28, 25) +# define SCALER_DISPBKGND_TESTMODE_SHIFT 25 +/* Enables filling the scaler line with the RGB value in the low 24 + * bits before compositing. Costs cycles, so should be skipped if + * opaque display planes will cover everything. + */ +# define SCALER_DISPBKGND_FILL BIT(24) + #define SCALER_DISPSTAT0 0x00000048 #define SCALER_DISPBASE0 0x0000004c # define SCALER_DISPSTATX_MODE_MASK VC4_MASK(31, 30) @@ -362,6 +373,9 @@ # define SCALER_DISPSTATX_EMPTY BIT(28) #define SCALER_DISPCTRL1 0x00000050 #define SCALER_DISPBKGND1 0x00000054 +#define SCALER_DISPBKGNDX(x) (SCALER_DISPBKGND0 + \ + (x) * (SCALER_DISPBKGND1 - \ + SCALER_DISPBKGND0)) #define SCALER_DISPSTAT1 0x00000058 #define SCALER_DISPSTATX(x) (SCALER_DISPSTAT0 + \ (x) * (SCALER_DISPSTAT1 - \ From patchwork Sat Jul 8 20:03:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Pundir X-Patchwork-Id: 107233 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp1614531qge; Sat, 8 Jul 2017 13:03:37 -0700 (PDT) X-Received: by 10.98.71.212 with SMTP id p81mr38333565pfi.106.1499544217835; Sat, 08 Jul 2017 13:03:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499544217; cv=none; d=google.com; s=arc-20160816; b=PM8gnF0XpCTIG9DgOfow9GTk+2A0QEGZnoqGGah1SjaxLYPbR0jyW6qg5vsJ7VLQCR omLzUuwqZS3zZ7ak7MZAVxBVZ5SjmlwARV+oaTzrQoWFkXuEtMX6Khh3+ze+4Aa65xY4 INEQKThNdQQz0zR7/tZO0k4tGKRXwpfMQVV2QI9cgbB0q+q8TxU3QcwGzIzxi1pXHtZQ pzyWfX9Gm/Y/PeO931KX3utrNPvaU08WUXeiT58zceL9greXIsaIdgh/q9QVMxOf7ns1 xKT/68As8VlfWkaSJtY9L1amWrr6UagoIUN3jcgXOejJllT8Ps+7Hq/16C2yhgovhYk5 w5hg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=6hTAI8DAWiz0vhUOZMbAT9D0Wos1yUrfRbMCM+QEwHc=; b=yaEhsv7RdL+xLjwPA2BKBd96+NRQESmikW5AeOpoiHEOeKAxlSFkAghw4IbsEj7Eis tVbiDrTIqaikLgZlRJX7+j3lLeHGOeds1aw49FPRfCiQ+kIFgIaoQXOBH1kJ8LF1e3Pc jhuTSETix0G+uJ80LtYniebqBmY9VslVG3pItR6IR48mJ2Ghrc2XvGnZWM/P/BzEJx/a ygCJxpXnYYhAkgGQX2IaIvFsJXCrqgJnacCKJUqbDLNta2Guvnxbdb8U378N31DQFS83 TjAp5VbJwBzIdJugfgI36DP0iyYfoDJ5HuBQmc55LajPQvsmaCiInz2wlTNKz1woYB1+ QjXg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.b=OrVek8q7; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Date: Sun, 9 Jul 2017 01:33:19 +0530 Message-Id: <1499544201-12812-4-git-send-email-amit.pundir@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499544201-12812-1-git-send-email-amit.pundir@linaro.org> References: <1499544201-12812-1-git-send-email-amit.pundir@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Eric Anholt commit a7c5047d1ce178dd2b1fa577fc8909ad663d56d5 upstream. It looks like when I went to add the interlaced bits, I just took the existing PV_VERT* block and indented it, instead of copy and pasting it first. Without this, changing resolution never worked. Signed-off-by: Eric Anholt Signed-off-by: Amit Pundir --- drivers/gpu/drm/vc4/vc4_crtc.c | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.13.0 diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c index 784a450d3e72..d0e34457aebd 100644 --- a/drivers/gpu/drm/vc4/vc4_crtc.c +++ b/drivers/gpu/drm/vc4/vc4_crtc.c @@ -213,6 +213,16 @@ static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc) PV_HORZB_HFP) | VC4_SET_FIELD(mode->hdisplay, PV_HORZB_HACTIVE)); + CRTC_WRITE(PV_VERTA, + VC4_SET_FIELD(mode->vtotal - mode->vsync_end, + PV_VERTA_VBP) | + VC4_SET_FIELD(mode->vsync_end - mode->vsync_start, + PV_VERTA_VSYNC)); + CRTC_WRITE(PV_VERTB, + VC4_SET_FIELD(mode->vsync_start - mode->vdisplay, + PV_VERTB_VFP) | + VC4_SET_FIELD(vactive, PV_VERTB_VACTIVE)); + if (interlace) { CRTC_WRITE(PV_VERTA_EVEN, VC4_SET_FIELD(mode->vtotal - mode->vsync_end - 1, From patchwork Sat Jul 8 20:03:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Pundir X-Patchwork-Id: 107234 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp1614598qge; Sat, 8 Jul 2017 13:03:40 -0700 (PDT) X-Received: by 10.99.44.81 with SMTP id s78mr7494328pgs.146.1499544220547; Sat, 08 Jul 2017 13:03:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499544220; cv=none; d=google.com; s=arc-20160816; b=D5/QFP/Oyi8stFP4Xznnpk+2gt6FVRXu2TlJZ0/2QJRzt5RcwfimTgucv2/lxUzVwQ 6me1VTqq5vIjIcGa5IxHmm4fsug8+mcNwRXeWxH3Ex1IzqGiPhN74buuqVEORKrFzE8Q j86DlMIK//k0UdWuqbvng81FXQ63t37/cCQj2BHRz0ylUxuTApu9F7+Cqqwe38gsK147 RzdBQ4U59wlTTDTIAu545I7wpWz2n/r9QzxqW+brV/I0dhD501sXK3TdZ1FM0WzW1zV3 dKgHEifl3SxxtHnwMgSt23gyJXAFAF02N/iVagvslPfdgQk4LI7vr8P82+KEBDEmnLX6 afAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=6mY5vpQmyimGNlVl1MogKEMAmHff9/flNL/cI8gOzhs=; b=U+ev/wTvb+uP8sKaj/XJp6DlWTou0QJYETm2+RBJuPYIbVPG/DC36rTwT3seEL3qHA ijyvsCqfmEYD7sCdhHdC2rOK1wbHZ2jiBGBdktfp/I4Pq8mfP5T277goSYeLnzZRh9WE oGqgKRuiYD5ekfjo6hqCckN/sebvfX4uPk6PiKiFVufacS2mAUS29MuoHz1znpCycSKl MSof9AZOamDspA+EgANYdb1kpmfvYBW5j7WcbmZlaSISXF2aSr1igeFrf01XkDen3bDs o1w6cS249Nxb5QqTROHpoyL54XAfi8jU/JwJ78W+BmCe/Vdg4GtqSYgWkGwMEx4VFLyG CecQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.b=fuxpQ2aE; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i5si1736017pfb.330.2017.07.08.13.03.40; Sat, 08 Jul 2017 13:03:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.b=fuxpQ2aE; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753122AbdGHUDj (ORCPT + 6 others); Sat, 8 Jul 2017 16:03:39 -0400 Received: from mail-pf0-f173.google.com ([209.85.192.173]:35649 "EHLO mail-pf0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753059AbdGHUDj (ORCPT ); Sat, 8 Jul 2017 16:03:39 -0400 Received: by mail-pf0-f173.google.com with SMTP id c73so31803965pfk.2 for ; Sat, 08 Jul 2017 13:03:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6mY5vpQmyimGNlVl1MogKEMAmHff9/flNL/cI8gOzhs=; b=fuxpQ2aEK4tOVCtkl4D6qoZhbWOTuFh7S6/UOn9iYWNi0e14VKQhts7EtaHsav53r0 2Aq4IquWAF07HShogQVtFX3tYOq47S+eNrntCrzIjawanSWPdWn2fvZIDe2mcDFBA04E 63TjYegRn+IRo5E4hIYG1v70uYXTVRPKQ8Rlk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6mY5vpQmyimGNlVl1MogKEMAmHff9/flNL/cI8gOzhs=; b=rJtOuTVkeiRXT2NtZazxsNY4lmKgCVz1sonzc4RTo+KqHOmNi5uGYOWoBNA/Qsfp03 0l7ERL+ID6R8/CRjIAx/BWat5dfs4f4y5hyN2J4lPT18zZbQ6jmYjT9L27pRGdQIz5NS WUReDhOpf5H9t+00vz7HwudJP5V7U0VrHYhH4qXqLMlTxHm4/p5AdkEyRllIVNA0h2Tj p2fgP5H20I7Rfcc9ERvoxNuKN44MP772kiOiEBnLlFPA897k32VviNrVIuRYvV3KBbIR ee0jAOB7iMwY1AcrGDrn95/iKM55dbgF+Sx/Pr78X7y6SPmxxdv8CnUlTAn2meIBYmXb T3mQ== X-Gm-Message-State: AIVw112E4tW0LQmRJ/mtOvxejFPS/aMGtS1rZ364QIt+JK9kY5VzPqzL 36OLOTJ/UOjm7d+4R3B3Og== X-Received: by 10.84.229.76 with SMTP id d12mr10017532pln.222.1499544218642; Sat, 08 Jul 2017 13:03:38 -0700 (PDT) Received: from localhost.localdomain ([106.51.234.165]) by smtp.gmail.com with ESMTPSA id m79sm1155703pfk.35.2017.07.08.13.03.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 08 Jul 2017 13:03:37 -0700 (PDT) From: Amit Pundir To: Greg KH , Eric Anholt Cc: Stable Subject: [PATCH for-4.4.y 4/5] drm/vc4: Add another reg to HDMI debug dumping. Date: Sun, 9 Jul 2017 01:33:20 +0530 Message-Id: <1499544201-12812-5-git-send-email-amit.pundir@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499544201-12812-1-git-send-email-amit.pundir@linaro.org> References: <1499544201-12812-1-git-send-email-amit.pundir@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Eric Anholt commit 936f1a53f32148cc6164fad7c9a26ebf144e5ffb upstream. This is also involved in the HDMI setup sequence so it's nice to see it. Signed-off-by: Eric Anholt Signed-off-by: Amit Pundir --- "... also involved in the HDMI setup sequence" got me thinking and submitting this patch as a stable candidate. I'll be happy to drop it otherwise. drivers/gpu/drm/vc4/vc4_hdmi.c | 1 + 1 file changed, 1 insertion(+) -- 2.13.0 diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 467a650b5105..e24ece43995f 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -95,6 +95,7 @@ static const struct { HDMI_REG(VC4_HDMI_SW_RESET_CONTROL), HDMI_REG(VC4_HDMI_HOTPLUG_INT), HDMI_REG(VC4_HDMI_HOTPLUG), + HDMI_REG(VC4_HDMI_RAM_PACKET_CONFIG), HDMI_REG(VC4_HDMI_HORZA), HDMI_REG(VC4_HDMI_HORZB), HDMI_REG(VC4_HDMI_FIFO_CTL), From patchwork Sat Jul 8 20:03:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Pundir X-Patchwork-Id: 107235 Delivered-To: patch@linaro.org Received: by 10.140.101.44 with SMTP id t41csp1614650qge; Sat, 8 Jul 2017 13:03:43 -0700 (PDT) X-Received: by 10.98.17.84 with SMTP id z81mr37953493pfi.38.1499544223336; Sat, 08 Jul 2017 13:03:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1499544223; cv=none; d=google.com; s=arc-20160816; b=XsNeS9Exu7hYsLvSZfN4DSKyXXzX5ZQwZuKUPAxv8NIpZz6dpabpGnRWwI5fg9OB6A HITqZlrEngxPlPhY2wGqqfsXTnnpMKnK2vsWnMbFRIEE/6SMJ5fPchdJyCrs0+NUUVeo jLfCO1D6ZThWaRvRchFe/C0GDxuuT1lFdZWOmzZZSlblASm3BaSwH6AFjBK4i+PFRwy4 an8MGIAyCFrxLQ1uW2gly9OpjHW6LEwJtC0IVnT+4a36aQKe7d3t9bpasx6ZbNsjd4qk rOoyclbCYbfjXvQwB3Ip4KWMb48l/o2+UY1yX9bKDMqM+Pc6+twJLUetRhDnJ43CNe6K zmJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=aRu7BF4AzIra8pTOBEWJUlNvWa+VcLmmowDFS2J5DEg=; b=A+Dwl3T8zw3STqkJwz1xl7U5NR9yofJZtv6P2whR10FYOFEHVqfVm12UkYsT501Ou8 jyrlSF/oynDyhPKOhtBAbKgtM4LDomUcCtniZu6jzgzeV6y+ViatfyeQzorbY4GUpS2F e8HYg5fYjarROrbTjCrteUu2tPnBP/vOT8lKHHIEujcFfGNAffHHLihpubP2GgFVxp5W IAI9PviGu5/HZaiyz56LEilG5l+Fj+kGXY9rF7tHLsCcvUvucONn7fwrzcMolTHOlmSm XHGgWJalLnv/uHYheKhy1/qOvE7h3kVIxxjDS6K8SGfy+RC45yVfKpPW3QAFwGOfd4E5 ERoA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.b=KB/Q+C+Y; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i5si1736017pfb.330.2017.07.08.13.03.43; Sat, 08 Jul 2017 13:03:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.b=KB/Q+C+Y; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753124AbdGHUDm (ORCPT + 6 others); Sat, 8 Jul 2017 16:03:42 -0400 Received: from mail-pf0-f169.google.com ([209.85.192.169]:34140 "EHLO mail-pf0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753059AbdGHUDm (ORCPT ); Sat, 8 Jul 2017 16:03:42 -0400 Received: by mail-pf0-f169.google.com with SMTP id q85so31774900pfq.1 for ; Sat, 08 Jul 2017 13:03:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aRu7BF4AzIra8pTOBEWJUlNvWa+VcLmmowDFS2J5DEg=; b=KB/Q+C+YXpAiKTvdJjrphXzCmERVmhNSiKf86jc5E0JEIDByR5PGvwtNPsCubapuHs aqOW6tuLFMpA7qie1ndNwGbo/gii1R40vKQUu+GnfFCqHULXRyCZyoC6GVkyS9Aie2XI nKvTiOkZldVNuBIm/v/n/UJ98T2Q6aH1pmSJs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aRu7BF4AzIra8pTOBEWJUlNvWa+VcLmmowDFS2J5DEg=; b=dRhil2rL8pD7HdaNfCazqNyH3zGVeX2gXaSbcqboE/pcZrchY2AFjBTWWlV7Bq2LBs uuYc16/NISsLtuYtESAaQF/vlfUTD5aqOGm+a29C/wBfXulmRMeIhMjM0Iu6UTKZ3fTt j/h5xKtB8iV4GPVRuABMk5X6sZ/QfluygOYtUf01XbxHBPVDiQs4lS5nrEzgD+SE1jHj wYFSGtVLrOYfWTKf5th6zXWWOmOT9j+h3UawhWZUWl1MKOVvXaIbYPrrf3+3X4bVUdfz kWtOcvyphoK5S/+coSXmmWpU9zI8jbVQ+ESaKcg3hn9IwI2LRCFneXHHdkCBPfhfauYF mbUQ== X-Gm-Message-State: AIVw1131HEKRiszbpoDcndKAnEAk3eqvB3Anet7cjRssfcFyDFLJmh/r UnDAEZGcnKNR8bAU X-Received: by 10.84.217.15 with SMTP id o15mr9946375pli.31.1499544221326; Sat, 08 Jul 2017 13:03:41 -0700 (PDT) Received: from localhost.localdomain ([106.51.234.165]) by smtp.gmail.com with ESMTPSA id m79sm1155703pfk.35.2017.07.08.13.03.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 08 Jul 2017 13:03:40 -0700 (PDT) From: Amit Pundir To: Greg KH , Eric Anholt Cc: Stable Subject: [PATCH for-4.4.y 5/5] drm/vc4: Bring HDMI up from power off if necessary. Date: Sun, 9 Jul 2017 01:33:21 +0530 Message-Id: <1499544201-12812-6-git-send-email-amit.pundir@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1499544201-12812-1-git-send-email-amit.pundir@linaro.org> References: <1499544201-12812-1-git-send-email-amit.pundir@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Eric Anholt commit 851479ad5927b7b1aa141ca9dedb897a7bce2b1d upstream. If the firmware hadn't brought up HDMI for us, we need to do its power-on reset sequence (reset HD and and clear its STANDBY bits, reset HDMI, and leave the PHY disabled). Signed-off-by: Eric Anholt Signed-off-by: Amit Pundir --- drivers/gpu/drm/vc4/vc4_hdmi.c | 29 ++++++++++++++++++++++++++++- drivers/gpu/drm/vc4/vc4_regs.h | 2 ++ 2 files changed, 30 insertions(+), 1 deletion(-) -- 2.13.0 diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index e24ece43995f..ac65d19416b5 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -496,6 +496,16 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) goto err_put_i2c; } + /* This is the rate that is set by the firmware. The number + * needs to be a bit higher than the pixel clock rate + * (generally 148.5Mhz). + */ + ret = clk_set_rate(hdmi->hsm_clock, 163682864); + if (ret) { + DRM_ERROR("Failed to set HSM clock rate: %d\n", ret); + goto err_unprepare_pix; + } + ret = clk_prepare_enable(hdmi->hsm_clock); if (ret) { DRM_ERROR("Failed to turn on HDMI state machine clock: %d\n", @@ -517,7 +527,24 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data) vc4->hdmi = hdmi; /* HDMI core must be enabled. */ - WARN_ON_ONCE((HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE) == 0); + if (!(HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE)) { + HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_SW_RST); + udelay(1); + HD_WRITE(VC4_HD_M_CTL, 0); + + HD_WRITE(VC4_HD_M_CTL, VC4_HD_M_ENABLE); + + HDMI_WRITE(VC4_HDMI_SW_RESET_CONTROL, + VC4_HDMI_SW_RESET_HDMI | + VC4_HDMI_SW_RESET_FORMAT_DETECT); + + HDMI_WRITE(VC4_HDMI_SW_RESET_CONTROL, 0); + + /* PHY should be in reset, like + * vc4_hdmi_encoder_disable() does. + */ + HDMI_WRITE(VC4_HDMI_TX_PHY_RESET_CTL, 0xf << 16); + } drm_encoder_init(drm, hdmi->encoder, &vc4_hdmi_encoder_funcs, DRM_MODE_ENCODER_TMDS); diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h index 06f5d298a651..45b8c18be5b0 100644 --- a/drivers/gpu/drm/vc4/vc4_regs.h +++ b/drivers/gpu/drm/vc4/vc4_regs.h @@ -470,6 +470,8 @@ #define VC4_HDMI_TX_PHY_RESET_CTL 0x2c0 #define VC4_HD_M_CTL 0x00c +# define VC4_HD_M_REGISTER_FILE_STANDBY (3 << 6) +# define VC4_HD_M_RAM_STANDBY (3 << 4) # define VC4_HD_M_SW_RST BIT(2) # define VC4_HD_M_ENABLE BIT(0)