From patchwork Thu Apr 23 16:25:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 189456 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65EEAC54FCB for ; Thu, 23 Apr 2020 16:26:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3F75F20706 for ; Thu, 23 Apr 2020 16:26:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="e12bR+Zp" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729667AbgDWQ0P (ORCPT ); Thu, 23 Apr 2020 12:26:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33900 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729665AbgDWQ0O (ORCPT ); Thu, 23 Apr 2020 12:26:14 -0400 Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47553C09B045 for ; Thu, 23 Apr 2020 09:26:14 -0700 (PDT) Received: by mail-pf1-x443.google.com with SMTP id 145so3177148pfw.13 for ; Thu, 23 Apr 2020 09:26:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=t+az60ThGdIE96zHd3j4C+YFzxV2ee2icRXc48MtdSg=; b=e12bR+ZpXLVjEEpan9cAEWHV4kDr8Z7MZkqcd7f2suEPYFg8jvkfNyq70AOvFiT7wa 4R/XyzA6cL0T1vpLIg314Ii0SKalB98Q4CK9r4ofREWXmfxZDtzOTMdjCYn1ytmbKmiX ZkpDOzjkjb2l8hrkAs+QCG1FNUaXWUvOjEhEc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=t+az60ThGdIE96zHd3j4C+YFzxV2ee2icRXc48MtdSg=; b=BBbkxrFKpPFih/4TObeb5ubCK9x2pcjgVThA2i+OZKZBCLQM1hOeD288ozowI1gT3p zkRUbamTqGWhXv2zYhIR9G5bv4beQcc4zbxTtZh9iylF1UAPjrogspX7KBojPJWsD1ct iDG22c4+hMXd+S5MYs5bAUOLUsC2Cw25Ww/4tbuhGQpfGxctMOYO8O80kxnFrvYIqkK1 bHszg7T3b9EvCbkcjyL0HW6ijPaElsCn3nO1UfgQ4MV3jFiIbeTV0ZetfBpY0KNYyisH iZ6fI2Cq246j9G4hoMtIhJEU6hThx+airxnUUdBTeCt+BNc8jfdCrWUfmg62DCWpbFxy 0A+g== X-Gm-Message-State: AGi0Pua+vc2CHzWGN97mIZThBYTNOU0bH0y7rUN4jPeULEcWQxp5Ctm2 uM59qeGQsBYYDZQQWib2eu+RcA== X-Google-Smtp-Source: APiQypKjcxU1Aq1NSUI9ytZOpl3JXA96PEo792irFM8Rg9bStYDnDS9zclolWyNi4CYW+A0kSTRQDw== X-Received: by 2002:aa7:9709:: with SMTP id a9mr4779536pfg.166.1587659173796; Thu, 23 Apr 2020 09:26:13 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:24fa:e766:52c9:e3b2]) by smtp.gmail.com with ESMTPSA id d12sm2841927pfq.36.2020.04.23.09.26.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Apr 2020 09:26:13 -0700 (PDT) From: Douglas Anderson To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, narmstrong@baylibre.com, a.hajda@samsung.com, Laurent.pinchart@ideasonboard.com, spanda@codeaurora.org Cc: swboyd@chromium.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, jeffrey.l.hugo@gmail.com, dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, robdclark@chromium.org, jernej.skrabec@siol.net, jonas@kwiboo.se, bjorn.andersson@linaro.org, Douglas Anderson , Sam Ravnborg , Thierry Reding , linux-kernel@vger.kernel.org Subject: [PATCH v3 2/6] dt-bindings: display: Add hpd-gpios to panel-common bindings Date: Thu, 23 Apr 2020 09:25:44 -0700 Message-Id: <20200423092431.v3.2.I1976736b400a3b30e46efa47782248b86b3bc627@changeid> X-Mailer: git-send-email 2.26.1.301.g55bc3eb7cb9-goog In-Reply-To: <20200423162548.129661-1-dianders@chromium.org> References: <20200423162548.129661-1-dianders@chromium.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In the cases where there is no connector in a system there's no great place to put "hpd-gpios". As per discussion [1] the best place to put it is in the panel. Add this to the device tree bindings. [1] https://lore.kernel.org/r/20200417180819.GE5861@pendragon.ideasonboard.com Signed-off-by: Douglas Anderson Reviewed-by: Stephen Boyd --- Changes in v3: None Changes in v2: - ("dt-bindings: display: Add hpd-gpios to panel-common...") new for v2 .../devicetree/bindings/display/panel/panel-common.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.yaml b/Documentation/devicetree/bindings/display/panel/panel-common.yaml index ed051ba12084..e9a04a3a4f5f 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-common.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-common.yaml @@ -96,6 +96,12 @@ properties: (hot plug detect) signal, but the signal isn't hooked up so we should hardcode the max delay from the panel spec when powering up the panel. + hpd-gpios: + maxItems: 1 + description: + If Hot Plug Detect (HPD) is connected to a GPIO in the system rather + than a dedicated HPD pin the pin can be specified here. + # Control I/Os # Many display panels can be controlled through pins driven by GPIOs. The nature From patchwork Thu Apr 23 16:25:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 189454 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 768A5C5519A for ; Thu, 23 Apr 2020 16:26:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4C04520704 for ; Thu, 23 Apr 2020 16:26:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="EN7xq6iE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729655AbgDWQ0g (ORCPT ); Thu, 23 Apr 2020 12:26:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33920 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1729677AbgDWQ0R (ORCPT ); Thu, 23 Apr 2020 12:26:17 -0400 Received: from mail-pj1-x1044.google.com (mail-pj1-x1044.google.com [IPv6:2607:f8b0:4864:20::1044]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 523A6C09B047 for ; Thu, 23 Apr 2020 09:26:17 -0700 (PDT) Received: by mail-pj1-x1044.google.com with SMTP id h12so1774072pjz.1 for ; Thu, 23 Apr 2020 09:26:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/4hIQYv+cnSS5EBGhZrnbHDmqNcfJlnFh0NWx4Ib4eI=; b=EN7xq6iEwFMMRDScYJX4R/Ta53ZSC0FDklRkZeKgCHMZvUgbMxutCRrbtadKrJvM/z V4O4a+547nJUceAip8Ffs7+bp3mh3Ot8sBYwbabojDLrAIsAQj5UuGYhKtYeLh1FHR/0 4mhWoHHnc19bzVnX9m7V0zR5d7pG+Q71Hk0AE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/4hIQYv+cnSS5EBGhZrnbHDmqNcfJlnFh0NWx4Ib4eI=; b=pgX2DlBsEEf5k0bU53ozLQiU33XvPAuzxapivADyI+ySQp7iSqTw5JnfVA7PzGha0E qX31iYIJxxqExPtgMlopgsKZP1gJaxbyK1esmqdncbAKKixDc24H/XjZO1KCgTTa0Jga BW/BtppGbEeVnDIiVmC0lQ2k1oWtyPRLmHdmwg4M9z2XmtdIOsX1pttHIdf70USLVJOu 0zr1BOSwD8b9ZdxthQnAwHzfQAVq4ByYkGrKXDFBD+Q/oU+1BDjcItBntG3RUKZ3FlG5 ur6z+b3AjGrLzQpNElGnyJaEOl5o60FymTajCijG/1UMcOaf9S/x3+0M0oNcJrnymHNl Bx6Q== X-Gm-Message-State: AGi0PuZtel1LrZoVZoeRSmyj8LWPWt4RTxVAFsd7lCxz6Lae77Oq9Iow e+inXXUcPOOt6qM9rv0n688tnA== X-Google-Smtp-Source: APiQypKJqc/xWptDnPAfXZkkwjKZxi26AxbtpB+sJapp1IZZIOoie02b5zsLDEMW2wO9+x8m0NYkqA== X-Received: by 2002:a17:902:7148:: with SMTP id u8mr4269899plm.13.1587659176752; Thu, 23 Apr 2020 09:26:16 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:24fa:e766:52c9:e3b2]) by smtp.gmail.com with ESMTPSA id d12sm2841927pfq.36.2020.04.23.09.26.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Apr 2020 09:26:16 -0700 (PDT) From: Douglas Anderson To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, narmstrong@baylibre.com, a.hajda@samsung.com, Laurent.pinchart@ideasonboard.com, spanda@codeaurora.org Cc: swboyd@chromium.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, jeffrey.l.hugo@gmail.com, dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, robdclark@chromium.org, jernej.skrabec@siol.net, jonas@kwiboo.se, bjorn.andersson@linaro.org, Douglas Anderson , Krzysztof Kozlowski , Paul Walmsley , Stephen Boyd , linux-kernel@vger.kernel.org Subject: [PATCH v3 4/6] dt-bindings: drm/bridge: ti-sn65dsi86: Convert to yaml Date: Thu, 23 Apr 2020 09:25:46 -0700 Message-Id: <20200423092431.v3.4.Ifcdc4ecb12742a27862744ee1e8753cb95a38a7f@changeid> X-Mailer: git-send-email 2.26.1.301.g55bc3eb7cb9-goog In-Reply-To: <20200423162548.129661-1-dianders@chromium.org> References: <20200423162548.129661-1-dianders@chromium.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This moves the bindings over, based a lot on toshiba,tc358768.yaml. Unless there's someone known to be better, I've set the maintainer in the yaml as the first person to submit bindings. Signed-off-by: Douglas Anderson Reviewed-by: Stephen Boyd --- Changes in v3: None Changes in v2: - specification => specifier. - power up => power. - Added back missing suspend-gpios. - data-lanes and lane-polarities are are the right place now. - endpoints don't need to be patternProperties. - Specified more details for data-lanes and lane-polarities. - Added old example back in, fixing bugs in it. - Example i2c bus is just called "i2c", not "i2c1" now. .../bindings/display/bridge/ti,sn65dsi86.txt | 87 ------ .../bindings/display/bridge/ti,sn65dsi86.yaml | 279 ++++++++++++++++++ 2 files changed, 279 insertions(+), 87 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt create mode 100644 Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt deleted file mode 100644 index 8ec4a7f2623a..000000000000 --- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.txt +++ /dev/null @@ -1,87 +0,0 @@ -SN65DSI86 DSI to eDP bridge chip --------------------------------- - -This is the binding for Texas Instruments SN65DSI86 bridge. -http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf - -Required properties: -- compatible: Must be "ti,sn65dsi86" -- reg: i2c address of the chip, 0x2d as per datasheet -- enable-gpios: gpio specification for bridge_en pin (active high) - -- vccio-supply: A 1.8V supply that powers up the digital IOs. -- vpll-supply: A 1.8V supply that powers up the displayport PLL. -- vcca-supply: A 1.2V supply that powers up the analog circuits. -- vcc-supply: A 1.2V supply that powers up the digital core. - -Optional properties: -- interrupts-extended: Specifier for the SN65DSI86 interrupt line. - -- gpio-controller: Marks the device has a GPIO controller. -- #gpio-cells : Should be two. The first cell is the pin number and - the second cell is used to specify flags. - See ../../gpio/gpio.txt for more information. -- #pwm-cells : Should be one. See ../../pwm/pwm.yaml for description of - the cell formats. - -- clock-names: should be "refclk" -- clocks: Specification for input reference clock. The reference - clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz. - -- data-lanes: See ../../media/video-interface.txt -- lane-polarities: See ../../media/video-interface.txt - -- suspend-gpios: specification for GPIO1 pin on bridge (active low) - -Required nodes: -This device has two video ports. Their connections are modelled using the -OF graph bindings specified in Documentation/devicetree/bindings/graph.txt. - -- Video port 0 for DSI input -- Video port 1 for eDP output - -Example -------- - -edp-bridge@2d { - compatible = "ti,sn65dsi86"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x2d>; - - enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>; - suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>; - - interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>; - - vccio-supply = <&pm8916_l17>; - vcca-supply = <&pm8916_l6>; - vpll-supply = <&pm8916_l17>; - vcc-supply = <&pm8916_l6>; - - clock-names = "refclk"; - clocks = <&input_refclk>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - edp_bridge_in: endpoint { - remote-endpoint = <&dsi_out>; - }; - }; - - port@1 { - reg = <1>; - - edp_bridge_out: endpoint { - data-lanes = <2 1 3 0>; - lane-polarities = <0 1 0 1>; - remote-endpoint = <&edp_panel_in>; - }; - }; - }; -} diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml new file mode 100644 index 000000000000..6d7d40ad45ac --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml @@ -0,0 +1,279 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi86.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SN65DSI86 DSI to eDP bridge chip + +maintainers: + - Sandeep Panda + +description: | + The Texas Instruments SN65DSI86 bridge takes MIPI DSI in and outputs eDP. + http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf + +properties: + compatible: + const: ti,sn65dsi86 + + reg: + const: 0x2d + + enable-gpios: + maxItems: 1 + description: GPIO specifier for bridge_en pin (active high). + + suspend-gpios: + maxItems: 1 + description: GPIO specifier for GPIO1 pin on bridge (active low). + + vccio-supply: + description: A 1.8V supply that powers the digital IOs. + + vpll-supply: + description: A 1.8V supply that powers the DisplayPort PLL. + + vcca-supply: + description: A 1.2V supply that powers the analog circuits. + + vcc-supply: + description: A 1.2V supply that powers the digital core. + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + description: + Clock specifier for input reference clock. The reference clock rate must + be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz. + + clock-names: + const: refclk + + gpio-controller: true + '#gpio-cells': + const: 2 + description: + First cell is pin number, second cell is flags. GPIO pin numbers are + 1-based to match the datasheet. See ../../gpio/gpio.txt for more + information. + + '#pwm-cells': + const: 1 + description: See ../../pwm/pwm.yaml for description of the cell formats. + + ports: + type: object + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + additionalProperties: false + + description: + Video port for MIPI DSI input + + properties: + reg: + const: 0 + + endpoint: + type: object + additionalProperties: false + + properties: + remote-endpoint: true + + data-lanes: + minItems: 1 + maxItems: 4 + items: + enum: + - 0 + - 1 + - 2 + - 3 + description: See ../../media/video-interface.txt + + lane-polarities: + minItems: 1 + maxItems: 4 + items: + enum: + - 0 + - 1 + description: See ../../media/video-interface.txt + + dependencies: + data-lanes: [lane-polarities] + + required: + - reg + + port@1: + type: object + additionalProperties: false + + description: + Video port for eDP output (panel or connector). + + properties: + reg: + const: 1 + + endpoint: + type: object + additionalProperties: false + + properties: + remote-endpoint: true + + data-lanes: + minItems: 1 + maxItems: 4 + items: + enum: + - 0 + - 1 + - 2 + - 3 + description: See ../../media/video-interface.txt + + lane-polarities: + minItems: 1 + maxItems: 4 + items: + enum: + - 0 + - 1 + description: See ../../media/video-interface.txt + + dependencies: + data-lanes: [lane-polarities] + + required: + - reg + + required: + - "#address-cells" + - "#size-cells" + - port@0 + - port@1 + +required: + - compatible + - reg + - enable-gpios + - vccio-supply + - vpll-supply + - vcca-supply + - vcc-supply + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + bridge@2d { + compatible = "ti,sn65dsi86"; + reg = <0x2d>; + + interrupt-parent = <&tlmm>; + interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; + + enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>; + + vpll-supply = <&src_pp1800_s4a>; + vccio-supply = <&src_pp1800_s4a>; + vcca-supply = <&src_pp1200_l2a>; + vcc-supply = <&src_pp1200_l2a>; + + clocks = <&rpmhcc RPMH_LN_BB_CLK2>; + clock-names = "refclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + endpoint { + remote-endpoint = <&panel_in_edp>; + }; + }; + }; + }; + }; + - | + #include + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + bridge@2d { + compatible = "ti,sn65dsi86"; + reg = <0x2d>; + + enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>; + suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>; + + interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>; + + vccio-supply = <&pm8916_l17>; + vcca-supply = <&pm8916_l6>; + vpll-supply = <&pm8916_l17>; + vcc-supply = <&pm8916_l6>; + + clock-names = "refclk"; + clocks = <&input_refclk>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + edp_bridge_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + + port@1 { + reg = <1>; + + edp_bridge_out: endpoint { + data-lanes = <2 1 3 0>; + lane-polarities = <0 1 0 1>; + remote-endpoint = <&edp_panel_in>; + }; + }; + }; + }; + }; From patchwork Thu Apr 23 16:25:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Douglas Anderson X-Patchwork-Id: 189455 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CF813C54FD0 for ; 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Thu, 23 Apr 2020 09:26:18 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:1:24fa:e766:52c9:e3b2]) by smtp.gmail.com with ESMTPSA id d12sm2841927pfq.36.2020.04.23.09.26.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Apr 2020 09:26:17 -0700 (PDT) From: Douglas Anderson To: linus.walleij@linaro.org, bgolaszewski@baylibre.com, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, narmstrong@baylibre.com, a.hajda@samsung.com, Laurent.pinchart@ideasonboard.com, spanda@codeaurora.org Cc: swboyd@chromium.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, jeffrey.l.hugo@gmail.com, dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, robdclark@chromium.org, jernej.skrabec@siol.net, jonas@kwiboo.se, bjorn.andersson@linaro.org, Douglas Anderson , linux-kernel@vger.kernel.org Subject: [PATCH v3 5/6] dt-bindings: drm/bridge: ti-sn65dsi86: Document no-hpd Date: Thu, 23 Apr 2020 09:25:47 -0700 Message-Id: <20200423092431.v3.5.I72892d485088e57378a4748c86bc0f6c2494d807@changeid> X-Mailer: git-send-email 2.26.1.301.g55bc3eb7cb9-goog In-Reply-To: <20200423162548.129661-1-dianders@chromium.org> References: <20200423162548.129661-1-dianders@chromium.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The ti-sn65dsi86 MIPI DSI to eDP bridge chip has a dedicated hardware HPD (Hot Plug Detect) pin on it, but it's mostly useless for eDP because of excessive debouncing in hardware. Specifically there is no way to disable the debouncing and for eDP debouncing hurts you because HPD is just used for knowing when the panel is ready, not for detecting physical plug events. Currently the driver in Linux just assumes that nobody has HPD hooked up. It relies on folks setting the "no-hpd" property in the panel node to specify that HPD isn't hooked up and then the panel driver using this to add some worst case delays when turning on the panel. Apparently it's also useful to specify "no-hpd" in the bridge node so that the bridge driver can make sure it's doing the right thing without peeking into the panel [1]. This would be used if anyone ever found it useful to implement support for the HW HPD pin on the bridge. Let's add this property to the bindings. NOTES: - This is somewhat of a backward-incompatible change. All current known users of ti-sn65dsi86 didn't have "no-hpd" specified in the bridge node yet none of them had HPD hooked up. This worked because the current Linux driver just assumed that HPD was never hooked up. We could make it less incompatible by saying that for this bridge it's assumed HPD isn't hooked up _unless_ a property is defined, but "no-hpd" is much more standard and it's unlikely to matter unless someone quickly goes and implements HPD in the driver. - It is sensible to specify "no-hpd" at the bridge chip level and specify "hpd-gpios" at the panel level. That would mean HPD is hooked up to some other GPIO in the system, just not the hardware HPD pin on the bridge chip. [1] https://lore.kernel.org/r/20200417180819.GE5861@pendragon.ideasonboard.com Signed-off-by: Douglas Anderson Reviewed-by: Stephen Boyd Reviewed-by: Linus Walleij --- Changes in v3: - useful implement => useful to implement Changes in v2: - ("dt-bindings: drm/bridge: ti-sn65dsi86: Document no-hpd") new for v2. .../devicetree/bindings/display/bridge/ti,sn65dsi86.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml index 6d7d40ad45ac..5746416b0f73 100644 --- a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml @@ -28,6 +28,10 @@ properties: maxItems: 1 description: GPIO specifier for GPIO1 pin on bridge (active low). + no-hpd: + type: boolean + description: Set if the HPD line on the bridge isn't hooked up to anything. + vccio-supply: description: A 1.8V supply that powers the digital IOs. @@ -207,6 +211,8 @@ examples: clocks = <&rpmhcc RPMH_LN_BB_CLK2>; clock-names = "refclk"; + no-hpd; + ports { #address-cells = <1>; #size-cells = <0>;