From patchwork Thu Jun 18 21:10:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 191148 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp1787143ilo; Thu, 18 Jun 2020 14:10:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxcda5vZIaTEpA+xaRRqlvH3971e7KiMBKStalPHN03GcxRanTpcf8bF5woqHPuWXtFy6+f X-Received: by 2002:a17:906:e257:: with SMTP id gq23mr571170ejb.398.1592514636294; Thu, 18 Jun 2020 14:10:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592514636; cv=none; d=google.com; s=arc-20160816; b=FcX6s+I+tM0jJEyizBfrQgaOw+QToAVymvRsIi/AGMmfvW7VEpLd3tgx/PAIjwdRGi kCYiuAKvcNpuuXAaSDfjHemOjsTsuNbcL+u+6tWNpD7R0PFtVd7FmE53rLFkvPaaCihQ NLI9+XeMxe+SCjvpHynWCTzMy7s+dWqR7l2HUk5fNqrDwsxusCiqbooFJPC/DthPWgpu hstpWd33pECMND5z4db4lgWJ8LAXP+NnRBqaxgwQVU1NaKKOT1kzkoGW9jZeTAUj0JnC ofYOo8ii7wk3bUgwWkogpfbi7Nl+EKQNbAbIWb11Q2fAWy1UTDCXG142jQ0b/T5L984k KFHw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=obi5ogfiExRl86adhQxGI+iGsITnP8GPJrdD9twIlbQ=; b=gCsNOhv2R6o3Oh9urCr/7GQxqdSl8BFbYrZ7esH2ElBmqDuxejWHk6SHV8FA5t0nas Glgi5Gj2z9v1DVirp2p8yS1gyLUfwnZjwDVqvNkvNQEpDlTsNRDPFn6wHWQNKbofpp7x TclzFQEzY8BBYXBxyN2ZBX93ZSI9QyLz4sSkV8PKioumaaR5ClZaYn/0k0XEfx82CNWt z032l9zbSw4Y+ZN/AFJpjyx0WnKnZIDEAmj5K2CGBszaxIdxOfALse51fkpb2ASSmgoJ E05SoJEdoxdgUqx8FDKAjtQ+LJH1MqCr+q5JMARj/SZst1mqaTBC0DL0/xxy9nsgzv6h o6SQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=w+2LMCav; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u2si2758870edx.353.2020.06.18.14.10.36; Thu, 18 Jun 2020 14:10:36 -0700 (PDT) Received-SPF: pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=w+2LMCav; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730872AbgFRVKd (ORCPT + 9 others); Thu, 18 Jun 2020 17:10:33 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:56992 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729195AbgFRVK3 (ORCPT ); Thu, 18 Jun 2020 17:10:29 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05ILAMtI036136; Thu, 18 Jun 2020 16:10:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1592514622; bh=obi5ogfiExRl86adhQxGI+iGsITnP8GPJrdD9twIlbQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=w+2LMCavCq6Uahyf0tnGfdCom6PRk+/1RON9z5aQdQBWyMGenfU/yZF7cYy/UfdP+ fMDQ1fI8YvyVisnqqPv8F8Q/SJ3LM2+WItyPnTb0fWjcwkKk3fr/EBHPbmazl7ODBc zVp1e+ahV06Bz/rbmXJ0cRauO76B1Tg8Wi+hLkC0= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05ILAMwa084045; Thu, 18 Jun 2020 16:10:22 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 18 Jun 2020 16:10:22 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 18 Jun 2020 16:10:22 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05ILAM8a065527; Thu, 18 Jun 2020 16:10:22 -0500 From: Dan Murphy To: , , , , CC: , , , Dan Murphy Subject: [PATCH net-next v8 1/5] dt-bindings: net: Add tx and rx internal delays Date: Thu, 18 Jun 2020 16:10:07 -0500 Message-ID: <20200618211011.28837-2-dmurphy@ti.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200618211011.28837-1-dmurphy@ti.com> References: <20200618211011.28837-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org tx-internal-delays and rx-internal-delays are a common setting for RGMII capable devices. These properties are used when the phy-mode or phy-controller is set to rgmii-id, rgmii-rxid or rgmii-txid. These modes indicate to the controller that the PHY will add the internal delay for the connection. Reviewed-by: Andrew Lunn Signed-off-by: Dan Murphy --- .../devicetree/bindings/net/ethernet-phy.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.26.2 diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index 9b1f1147ca36..7d8265eb49d6 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -162,6 +162,19 @@ properties: description: Specifies a reference to a node representing a SFP cage. + + rx-internal-delay-ps: + description: | + RGMII Receive PHY Clock Delay defined in pico seconds. This is used for + PHY's that have configurable RX internal delays. If this property is + present then the PHY applies the RX delay. + + tx-internal-delay-ps: + description: | + RGMII Transmit PHY Clock Delay defined in pico seconds. This is used for + PHY's that have configurable TX internal delays. If this property is + present then the PHY applies the TX delay. + required: - reg From patchwork Thu Jun 18 21:10:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 191149 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp1787187ilo; Thu, 18 Jun 2020 14:10:40 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyJ6hL1fBRN5ZNmFurkyPuPySuvLiG/d8nAJsUtSHvKRr77PfaTT93MQbLuVySWjHvsGJQT X-Received: by 2002:a17:906:ca0e:: with SMTP id jt14mr560504ejb.325.1592514640042; Thu, 18 Jun 2020 14:10:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592514640; cv=none; d=google.com; s=arc-20160816; b=jZfQMoh19YDX8IQ39dHmhSrA1MVflnKE9B4Y6IL4ZRcHZQ4JcXh9qPAPZj+E+uUn/c snMbFwbkPfB3AaxWaZEuvFSmRWrEjvVwjov/RNW/QILtkzrYfje2db3m38CwN8W7zUOK FVJj2u9Vay2KHpsE24Ne3rQHYY0END3bALFwwOmXUF8hhaxOSZRTmKVCxftu4bFnaZP7 WXFmgoowPznCkuTy0TBPcsum8RHi4TBrCcwot2d5GELlNVXxjzrfBubcw6R2E7CiHxgt Rhi31Y4v+XtwMeOkUrKbXubYAxuiq37isN5kKVOUpLy6xfnfpRHeLQjui0IpGETreA54 wlqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LHygI244ExKKKjPR1xtZS3qmfgtP0Pf9c6oBOGOVf/M=; b=Ka/ecFzQvy/RB0K8PhSBTrYV/0YBcM7P1wEqaIvOpGxpMwiwZ/txNSrRqntqfN5EKC XrRZYBiripaLtC8+7X7curKjY0NNEJolYzif9sdgF87hQkUzzX+YixfZskqT5rKnC/Pw 5cJQSYS2ZlPj3+XKlOFKmj7vCQN80D+tB8Xu7L1JfUJHG7anF+zSP9uLuK3cO8dsi+5D WlZSj5uZcnYCWgX1+0lIgho5rdHaZNApRWIDqRIUefkvRj8YHWRpHeFOt4wLbIcm9uOX ebiD1QJRatyCZ3JiCLM4UqDdrWNDfjy9EIVBpYIjjt93a7grsRlNzfWmXQzUox4P7AAY j6OA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=EijeIYIS; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u2si2758870edx.353.2020.06.18.14.10.39; Thu, 18 Jun 2020 14:10:40 -0700 (PDT) Received-SPF: pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=EijeIYIS; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730973AbgFRVKh (ORCPT + 9 others); Thu, 18 Jun 2020 17:10:37 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:57010 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730802AbgFRVKd (ORCPT ); Thu, 18 Jun 2020 17:10:33 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05ILASio036148; Thu, 18 Jun 2020 16:10:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1592514628; bh=LHygI244ExKKKjPR1xtZS3qmfgtP0Pf9c6oBOGOVf/M=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=EijeIYISNAUwqbdUrNNBsrJNACx04/wwSwXdsS97ppHS1pLOWU/2gqZd6sMauyfZ9 /DWxD5pICpxl5wCKne+vy5BdN2TQF4NBlHEkr2N/cUZUESkX/F5ZcAW6ip2TEO3kk/ tZFr+nlHeny+SUS79VA1sY4bQ0lW0GZewbzOEseE= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 05ILASf3021715 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 18 Jun 2020 16:10:28 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 18 Jun 2020 16:10:27 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 18 Jun 2020 16:10:27 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05ILARxF014987; Thu, 18 Jun 2020 16:10:27 -0500 From: Dan Murphy To: , , , , CC: , , , Dan Murphy Subject: [PATCH net-next v8 2/5] net: phy: Add a helper to return the index for of the internal delay Date: Thu, 18 Jun 2020 16:10:08 -0500 Message-ID: <20200618211011.28837-3-dmurphy@ti.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200618211011.28837-1-dmurphy@ti.com> References: <20200618211011.28837-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add a helper function that will return the index in the array for the passed in internal delay value. The helper requires the array, size and delay value. The helper will then return the index for the exact match or return the index for the index to the closest smaller value. Signed-off-by: Dan Murphy --- v8 - I did a considerable amount of rework on this patch. First the device_property calls needed to be wrapped in IS_ENABLED (CONFIG_OF_MDIO). Next if the PHY has a fixed delay like the DP83822 with a bit to turn the delay on and off then having a device tree property was a bit to much. The device property should be used for configurable delays. If the PHY had a fixed delay then the PHY interface type was good enough to tell the PHY to turn on the delay for the path. This helper was tested on both the DP83869 and DP83822 devices. drivers/net/phy/phy_device.c | 100 +++++++++++++++++++++++++++++++++++ include/linux/phy.h | 4 ++ 2 files changed, 104 insertions(+) -- 2.26.2 Reported-by: kernel test robot Reported-by: kernel test robot diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index 04946de74fa0..55f9953bcd1d 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c @@ -31,6 +31,7 @@ #include #include #include +#include MODULE_DESCRIPTION("PHY library"); MODULE_AUTHOR("Andy Fleming"); @@ -2657,6 +2658,105 @@ void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause) } EXPORT_SYMBOL(phy_get_pause); +#if IS_ENABLED(CONFIG_OF_MDIO) +static int phy_get_int_delay_property(struct device *dev, const char *name) +{ + s32 int_delay; + int ret; + + ret = device_property_read_u32(dev, name, &int_delay); + if (ret) + return ret; + + return int_delay; +} +#else +static inline int phy_get_int_delay_property(struct device *dev, + const char *name) +{ + return -EINVAL +} +#endif + +/** + * phy_get_delay_index - returns the index of the internal delay + * @phydev: phy_device struct + * @dev: pointer to the devices device struct + * @delay_values: array of delays the PHY supports + * @size: the size of the delay array + * @is_rx: boolean to indicate to get the rx internal delay + * + * Returns the index within the array of internal delay passed in. + * If the device property is not present then the interface type is checked + * if the interface defines use of internal delay then a 1 is returned otherwise + * a 0 is returned. + * The array must be in ascending order. If PHY does not have an ascending order + * array then size = 0 and the value of the delay property is returned. + * Return -EINVAL if the delay is invalid or cannot be found. + */ +s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, + const int *delay_values, int size, bool is_rx) +{ + int i; + s32 delay; + + if (is_rx) { + delay = phy_get_int_delay_property(dev, "rx-internal-delay-ps"); + if (delay < 0 && size == 0) { + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) + return 1; + else + return 0; + } + + } else { + delay = phy_get_int_delay_property(dev, "tx-internal-delay-ps"); + if (delay < 0 && size == 0) { + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) + return 1; + else + return 0; + } + } + + if (delay < 0) + return delay; + + if (delay && size == 0) + return delay; + + if (delay < delay_values[0] || delay > delay_values[size - 1]) { + phydev_err(phydev, "Delay %d is out of range\n", delay); + return -EINVAL; + } + + if (delay == delay_values[0]) + return 0; + + for (i = 1; i < size; i++) { + if (delay == delay_values[i]) + return i; + + /* Find an approximate index by looking up the table */ + if (delay > delay_values[i - 1] && + delay < delay_values[i]) { + if (delay - delay_values[i - 1] < + delay_values[i] - delay) + return i - 1; + else + return i; + } + } + + phydev_err(phydev, "error finding internal delay index for %d\n", + delay); + + return -EINVAL; +} +EXPORT_SYMBOL(phy_get_internal_delay); + static bool phy_drv_supports_irq(struct phy_driver *phydrv) { return phydrv->config_intr && phydrv->ack_interrupt; diff --git a/include/linux/phy.h b/include/linux/phy.h index 8c05d0fb5c00..917bfd422e06 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -1430,6 +1430,10 @@ void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx); bool phy_validate_pause(struct phy_device *phydev, struct ethtool_pauseparam *pp); void phy_get_pause(struct phy_device *phydev, bool *tx_pause, bool *rx_pause); + +s32 phy_get_internal_delay(struct phy_device *phydev, struct device *dev, + const int *delay_values, int size, bool is_rx); + void phy_resolve_pause(unsigned long *local_adv, unsigned long *partner_adv, bool *tx_pause, bool *rx_pause); From patchwork Thu Jun 18 21:10:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 191150 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp1787211ilo; Thu, 18 Jun 2020 14:10:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJynmKqGc5CdmfHZObv+ZD59vx9mtPFAt8RJ0nSX6fIbm0RW4bMXH9ce588oEn9AK0Y4OI20 X-Received: by 2002:a17:906:e47:: with SMTP id q7mr580300eji.279.1592514642967; Thu, 18 Jun 2020 14:10:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592514642; cv=none; d=google.com; s=arc-20160816; b=0/VlQYgU4S/fqNlYbr3nGFHYqfbsG0u+shchYlFu90vAkKrsoGrUA0RT26SPZzi646 q/AlFUda8uqbwREubLPH06rR962744EFz/TSkMkdFGMuEBXjXR6NOE8cChwOsqssmtKP KnvxKk8rY8R3xT69cOkReLqb4IuovF0wshBVVkMQH8ThvV93Ga4F1o6oo9JzX5Mn0nMx 4J/Ar+Xr2DJOTocfRfqb3J289DpuZnQv++broDIRRzcFgdpCJZ1OoG2x6ZtS1lKIlpZl pCyIULck88F0UrH9Z2g/YyLsTbP810fTDA0dsvkLmWvyoKcXmxiJlxn5hB/fohwGxBFs 4Tog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eShyx82GLaQ3xsgsj9ve463coidBb5dHGAfrzfcrN0w=; b=dOsbYd18d8OGfxZXfUun0U/TQfDfAEFKX9U2RpNI7Q8Zi7Od6Kpbc1b0OFZYYYhWzw GFlFbOS60k/l+NMgYDq4D95WKrkc693BY9WNKX5wESNj0wLPYod0+b+7AbUsztPPqK1X 2IISP/lBuylxaDVoT8oc0GghcznEze7qyS6mb3PJbTaBQcNK4PvRz/Y4Mo47xZ9nO/t7 780YZl+CPxmzy5JyosBYBT7IK1xWfnBcCPR8BKGVGo0Iav6z4h1KtrbGfVxQjGokIpcr lxxxa/Z6b0iON6JqfEEUDfgWiB2y0dlc0lSg67tDrjFh8roWxoVWxJgFS1iirFeya/vI G7yw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=sXY5TAz+; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dan Murphy --- .../devicetree/bindings/net/ti,dp83869.yaml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) -- 2.26.2 diff --git a/Documentation/devicetree/bindings/net/ti,dp83869.yaml b/Documentation/devicetree/bindings/net/ti,dp83869.yaml index 5b69ef03bbf7..71e90a3e4652 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83869.yaml +++ b/Documentation/devicetree/bindings/net/ti,dp83869.yaml @@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#" title: TI DP83869 ethernet PHY allOf: - - $ref: "ethernet-controller.yaml#" + - $ref: "ethernet-phy.yaml#" maintainers: - Dan Murphy @@ -64,6 +64,18 @@ properties: Operational mode for the PHY. If this is not set then the operational mode is set by the straps. see dt-bindings/net/ti-dp83869.h for values + rx-internal-delay-ps: + description: Delay is in pico seconds + enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000, + 3250, 3500, 3750, 4000 ] + default: 2000 + + tx-internal-delay-ps: + description: Delay is in pico seconds + enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000, + 3250, 3500, 3750, 4000 ] + default: 2000 + required: - reg @@ -80,5 +92,7 @@ examples: ti,op-mode = ; ti,max-output-impedance = "true"; ti,clk-output-sel = ; + rx-internal-delay-ps = <2000>; + tx-internal-delay-ps = <2000>; }; }; From patchwork Thu Jun 18 21:10:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 191151 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp1787288ilo; Thu, 18 Jun 2020 14:10:48 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwQi+UyCo2l6UnC5G8Puu/frTOQ75yrnBIk/kFuxYzbhUwVt8k6Yn5j4dtpeTjwY1XfOUtV X-Received: by 2002:a05:6402:1d96:: with SMTP id dk22mr168451edb.258.1592514648522; Thu, 18 Jun 2020 14:10:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592514648; cv=none; d=google.com; s=arc-20160816; b=xP+jdqJm3XenrVPErl9dY8Ba3Bporc4AJVnAQRByCKyBMQTcwFEZkUaOMovemN5HtZ U37s0Np460tYsimwf20AqF4ZG+55qj1q9D8fiKQnrkB9XZVhufPVzqX1LryN+Dafzdf8 PjH/KY1TCNh0UP/kUYtj1A4rx10rbB0WC2ZI23K0Q0eGW43ZkHtvJNrl18LnE3z0Y9OY rczBP/WPIh38wsT7nR/4y+zezrZQ2W4SnKBZgLf5hu749en60afamEteProdVoadQSiJ d+BUMMWETW5WdglWHuuEyAXyYySMtHS/oAF7a0P+iRsPS0/JmcC78NnaTyCiXefz2qw3 UsJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4E5KHNl9oTC+RZ54rEq6HG+IBnY8toM5mVy2z1lrdtM=; b=qZ07wqceqNQBnt8rmI5D8iBSw4ReTptHBlLRq9LUmWzj8ir2pFoBoo7wmVMLOWBj8O qPMNkmH9/I9pQgd/7+VWL9/eQ8P7eMJteZo/MMndPJwEUYY9hIO4CXCUEGBOusnPuBAb J0FLDG248PiKLi6Tr6Ef1FR/cb4ALn5DJXSciXVdALiujR734uuET2/8yt/iQoKHpCmJ tPU54yCf42m4F6ySigEzkpDtqcdW4ssC05UpiIFtm0zsTVE1Vhc1I/nnrZJCJAquaDm0 YLwS5tYuIJ5cHq4i6PlQvduogd/RzmQkKjKX9I8/dTiHKBrSyfCcuA/PGGs7HB7tCqFn HFEA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=UBgKux4o; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dan Murphy --- drivers/net/phy/dp83869.c | 53 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 50 insertions(+), 3 deletions(-) -- 2.26.2 Reported-by: kernel test robot diff --git a/drivers/net/phy/dp83869.c b/drivers/net/phy/dp83869.c index 53ed3abc26c9..21b7d3de14a9 100644 --- a/drivers/net/phy/dp83869.c +++ b/drivers/net/phy/dp83869.c @@ -64,6 +64,10 @@ #define DP83869_RGMII_TX_CLK_DELAY_EN BIT(1) #define DP83869_RGMII_RX_CLK_DELAY_EN BIT(0) +/* RGMIIDCTL */ +#define DP83869_RGMII_CLK_DELAY_SHIFT 4 +#define DP83869_CLK_DELAY_DEF 7 + /* STRAP_STS1 bits */ #define DP83869_STRAP_OP_MODE_MASK GENMASK(2, 0) #define DP83869_STRAP_STS1_RESERVED BIT(11) @@ -78,9 +82,6 @@ #define DP83869_PHYCR_FIFO_DEPTH_MASK GENMASK(15, 12) #define DP83869_PHYCR_RESERVED_MASK BIT(11) -/* RGMIIDCTL bits */ -#define DP83869_RGMII_TX_CLK_DELAY_SHIFT 4 - /* IO_MUX_CFG bits */ #define DP83869_IO_MUX_CFG_IO_IMPEDANCE_CTRL 0x1f @@ -99,6 +100,10 @@ #define DP83869_OP_MODE_MII BIT(5) #define DP83869_SGMII_RGMII_BRIDGE BIT(6) +static const int dp83869_internal_delay[] = {250, 500, 750, 1000, 1250, 1500, + 1750, 2000, 2250, 2500, 2750, 3000, + 3250, 3500, 3750, 4000}; + enum { DP83869_PORT_MIRRORING_KEEP, DP83869_PORT_MIRRORING_EN, @@ -108,6 +113,8 @@ enum { struct dp83869_private { int tx_fifo_depth; int rx_fifo_depth; + s32 rx_int_delay; + s32 tx_int_delay; int io_impedance; int port_mirroring; bool rxctrl_strap_quirk; @@ -182,6 +189,7 @@ static int dp83869_of_init(struct phy_device *phydev) struct dp83869_private *dp83869 = phydev->priv; struct device *dev = &phydev->mdio.dev; struct device_node *of_node = dev->of_node; + int delay_size = ARRAY_SIZE(dp83869_internal_delay); int ret; if (!of_node) @@ -235,6 +243,20 @@ static int dp83869_of_init(struct phy_device *phydev) &dp83869->tx_fifo_depth)) dp83869->tx_fifo_depth = DP83869_PHYCR_FIFO_DEPTH_4_B_NIB; + dp83869->rx_int_delay = phy_get_internal_delay(phydev, dev, + &dp83869_internal_delay[0], + delay_size, true); + if (dp83869->rx_int_delay < 0) + dp83869->rx_int_delay = + dp83869_internal_delay[DP83869_CLK_DELAY_DEF]; + + dp83869->tx_int_delay = phy_get_internal_delay(phydev, dev, + &dp83869_internal_delay[0], + delay_size, false); + if (dp83869->tx_int_delay < 0) + dp83869->tx_int_delay = + dp83869_internal_delay[DP83869_CLK_DELAY_DEF]; + return ret; } #else @@ -397,6 +419,31 @@ static int dp83869_config_init(struct phy_device *phydev) dp83869->clk_output_sel << DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT); + if (phy_interface_is_rgmii(phydev)) { + ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIIDCTL, + dp83869->rx_int_delay | + dp83869->tx_int_delay << DP83869_RGMII_CLK_DELAY_SHIFT); + if (ret) + return ret; + + val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL); + val &= ~(DP83869_RGMII_TX_CLK_DELAY_EN | + DP83869_RGMII_RX_CLK_DELAY_EN); + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) + val |= (DP83869_RGMII_TX_CLK_DELAY_EN | + DP83869_RGMII_RX_CLK_DELAY_EN); + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) + val |= DP83869_RGMII_TX_CLK_DELAY_EN; + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) + val |= DP83869_RGMII_RX_CLK_DELAY_EN; + + ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL, + val); + } + return ret; } From patchwork Thu Jun 18 21:10:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 191152 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp1787384ilo; Thu, 18 Jun 2020 14:10:57 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwozEEji4ppdw7DvhQsKxH4WmE1JQPSsfvmwdlY1bEgyEgY4SEeDiQubVHTea0QCQRMrfrv X-Received: by 2002:a17:906:b293:: with SMTP id q19mr629918ejz.412.1592514657382; Thu, 18 Jun 2020 14:10:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592514657; cv=none; d=google.com; s=arc-20160816; b=FEvD/YXJoJRCR2Ayqjvd205/akK9Qf/O2dhyXJpPW4hJWhMW9njlg4Te94bnAC3Q7a PYbXMFdXUOaI0pVNwuhLKBYsAimdqwhTucES2Mq6GHGhF5Ex3W5EOWTmpWk9dg/v7StA 3E7wbx9HVUYvMmn+gsAQv11ROedRxCArCnPUazyrmtgCH01LwgN1daAC58W6wDaBEaC8 mgAhv19iJ+Ie+LyT/39WGbtTzu3MH/EIETuvHVCbCLdJ9KVOAef4PugQ1Mj66mrk3NyQ 410/AuoTaozIUr3DNeSIpXCPcIGtTK8kiranCG0MFvM8YPWH0CmI6vxTD+HRkoXXgjPc xyRg== ARC-Message-Signature: i=1; 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[23.128.96.18]) by mx.google.com with ESMTP id ar22si2387435ejc.434.2020.06.18.14.10.57; Thu, 18 Jun 2020 14:10:57 -0700 (PDT) Received-SPF: pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="opI/u/XV"; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731288AbgFRVKz (ORCPT + 9 others); Thu, 18 Jun 2020 17:10:55 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:57058 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730989AbgFRVKs (ORCPT ); Thu, 18 Jun 2020 17:10:48 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05ILAh43036218; Thu, 18 Jun 2020 16:10:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1592514643; bh=ehq+Ty1gZ2t4R0aAfzFJjltOQ0z7TJBMi3aVsQVQchg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=opI/u/XVls5qmauY8k3rC4TzC+lQsGCbqkcL55OjFbLaMI5VFm0heUj5WIyJjLZM+ ylY+iYoz9W6kr6oxkcB/Gp15EhsWejlPcX+hPMgW/3U2KHOC+RCt+tWmS8l0rHEvXr eIfB7PrmNSGMO1YAR4U7gINWilqGOrJxrmvmmBBg= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05ILAhSQ084551; Thu, 18 Jun 2020 16:10:43 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 18 Jun 2020 16:10:43 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 18 Jun 2020 16:10:43 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05ILAhgF015270; Thu, 18 Jun 2020 16:10:43 -0500 From: Dan Murphy To: , , , , CC: , , , Dan Murphy Subject: [PATCH net-next v8 5/5] net: phy: DP83822: Add setting the fixed internal delay Date: Thu, 18 Jun 2020 16:10:11 -0500 Message-ID: <20200618211011.28837-6-dmurphy@ti.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200618211011.28837-1-dmurphy@ti.com> References: <20200618211011.28837-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The DP83822 can be configured to use the RGMII interface. There are independent fixed 3.5ns clock shift (aka internal delay) for the TX and RX paths. This allow either one to be set if the MII interface is RGMII and the value is set in the firmware node. Signed-off-by: Dan Murphy --- drivers/net/phy/dp83822.c | 78 ++++++++++++++++++++++++++++++++++----- 1 file changed, 68 insertions(+), 10 deletions(-) -- 2.26.2 Reported-by: kernel test robot diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c index 1dd19d0cb269..0fe91119d57f 100644 --- a/drivers/net/phy/dp83822.c +++ b/drivers/net/phy/dp83822.c @@ -26,7 +26,9 @@ #define MII_DP83822_PHYSCR 0x11 #define MII_DP83822_MISR1 0x12 #define MII_DP83822_MISR2 0x13 +#define MII_DP83822_RCSR 0x17 #define MII_DP83822_RESET_CTRL 0x1f +#define MII_DP83822_GENCFG 0x465 #define DP83822_HW_RESET BIT(15) #define DP83822_SW_RESET BIT(14) @@ -77,6 +79,10 @@ #define DP83822_WOL_INDICATION_SEL BIT(8) #define DP83822_WOL_CLR_INDICATION BIT(11) +/* RSCR bits */ +#define DP83822_RX_CLK_SHIFT BIT(12) +#define DP83822_TX_CLK_SHIFT BIT(11) + static int dp83822_ack_interrupt(struct phy_device *phydev) { int err; @@ -255,7 +261,7 @@ static int dp83822_config_intr(struct phy_device *phydev) return phy_write(phydev, MII_DP83822_PHYSCR, physcr_status); } -static int dp83822_config_init(struct phy_device *phydev) +static int dp8382x_disable_wol(struct phy_device *phydev) { int value = DP83822_WOL_EN | DP83822_WOL_MAGIC_EN | DP83822_WOL_SECURE_ON; @@ -264,6 +270,45 @@ static int dp83822_config_init(struct phy_device *phydev) MII_DP83822_WOL_CFG, value); } +static int dp83822_config_init(struct phy_device *phydev) +{ + struct device *dev = &phydev->mdio.dev; + int rgmii_delay; + s32 rx_int_delay; + s32 tx_int_delay; + int err = 0; + + if (phy_interface_is_rgmii(phydev)) { + rx_int_delay = phy_get_internal_delay(phydev, dev, NULL, 0, + true); + if (rx_int_delay <= 0) + rx_int_delay = 0; + else + rgmii_delay = DP83822_RX_CLK_SHIFT; + + tx_int_delay = phy_get_internal_delay(phydev, dev, NULL, 0, + false); + if (tx_int_delay <= 0) + tx_int_delay = 0; + else + rgmii_delay |= DP83822_TX_CLK_SHIFT; + + if (rgmii_delay) { + err = phy_set_bits_mmd(phydev, DP83822_DEVADDR, + MII_DP83822_RCSR, rgmii_delay); + if (err) + return err; + } + } + + return dp8382x_disable_wol(phydev); +} + +static int dp8382x_config_init(struct phy_device *phydev) +{ + return dp8382x_disable_wol(phydev); +} + static int dp83822_phy_reset(struct phy_device *phydev) { int err; @@ -272,9 +317,7 @@ static int dp83822_phy_reset(struct phy_device *phydev) if (err < 0) return err; - dp83822_config_init(phydev); - - return 0; + return phydev->drv->config_init(phydev); } static int dp83822_suspend(struct phy_device *phydev) @@ -318,14 +361,29 @@ static int dp83822_resume(struct phy_device *phydev) .resume = dp83822_resume, \ } +#define DP8382X_PHY_DRIVER(_id, _name) \ + { \ + PHY_ID_MATCH_MODEL(_id), \ + .name = (_name), \ + /* PHY_BASIC_FEATURES */ \ + .soft_reset = dp83822_phy_reset, \ + .config_init = dp8382x_config_init, \ + .get_wol = dp83822_get_wol, \ + .set_wol = dp83822_set_wol, \ + .ack_interrupt = dp83822_ack_interrupt, \ + .config_intr = dp83822_config_intr, \ + .suspend = dp83822_suspend, \ + .resume = dp83822_resume, \ + } + static struct phy_driver dp83822_driver[] = { DP83822_PHY_DRIVER(DP83822_PHY_ID, "TI DP83822"), - DP83822_PHY_DRIVER(DP83825I_PHY_ID, "TI DP83825I"), - DP83822_PHY_DRIVER(DP83826C_PHY_ID, "TI DP83826C"), - DP83822_PHY_DRIVER(DP83826NC_PHY_ID, "TI DP83826NC"), - DP83822_PHY_DRIVER(DP83825S_PHY_ID, "TI DP83825S"), - DP83822_PHY_DRIVER(DP83825CM_PHY_ID, "TI DP83825M"), - DP83822_PHY_DRIVER(DP83825CS_PHY_ID, "TI DP83825CS"), + DP8382X_PHY_DRIVER(DP83825I_PHY_ID, "TI DP83825I"), + DP8382X_PHY_DRIVER(DP83826C_PHY_ID, "TI DP83826C"), + DP8382X_PHY_DRIVER(DP83826NC_PHY_ID, "TI DP83826NC"), + DP8382X_PHY_DRIVER(DP83825S_PHY_ID, "TI DP83825S"), + DP8382X_PHY_DRIVER(DP83825CM_PHY_ID, "TI DP83825M"), + DP8382X_PHY_DRIVER(DP83825CS_PHY_ID, "TI DP83825CS"), }; module_phy_driver(dp83822_driver);