From patchwork Sat Jun 20 23:32:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 191328 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp1091882ile; Mon, 22 Jun 2020 07:26:41 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzq+SgBRNCYeUjZtoIG8JKQFi96zQo5lWIzQ0Jetwk9D6K2bRf3EwABXoUPWJI7T5yVQKt+ X-Received: by 2002:a05:6402:1d10:: with SMTP id dg16mr16920516edb.309.1592836001104; Mon, 22 Jun 2020 07:26:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592836001; cv=none; d=google.com; s=arc-20160816; b=E85PztsqbJjsYL15Li9+pY3qj6eFfbS2D8GZUOYM3XitWQr7O3ooQ/rTpVc8MQsYLD fAr5EcCR+sQbxX/wV4j4H3eB6BcKa3HbdNnUg/h7ZBXlSmtKhl+pkn5uBWUZzxeUEaqr D3zlEQQjJ71GSrXY9pAnZPApGk7NS21094j5rJCBcTb+iSqwzx0bzBQVybJA6bgV7SX/ KMFGF2YxojkPaRpjmoCoj62rzaUiXhochrcVCrsXaZexcxQLPrxBE+v6SR4MG/Zw7N3B 0h8+bLRvJaRl6LmEscT0vcLR9LX74dEry5HJI22K/91ZpLcM8oZh66VIYKm4oaM/eLJQ C7TQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=SRODojRRqpEWFoZsaci26IqkWCdWhaXAMLUepxHw0dc=; b=xbTNk9yNOH4c4XM3IoMOxgDRdyTUoapRRngwIKveQYqeVAioqy5VYdkgnZfhe/oIGR I5zp4MOb1JdxaQo+rfdaroHuXsp5GYVU150NM1zLm9YJ//lzZ/fWTT6JoNlLJknujkfX BqmkHqNy5KpNwLqRPhC599V1qbE2UxgnXsDeajpPhaXPzN7lbkpwzfXgKLWpqXihNx6d VFVbfUviEbF87r3gFRXhqyHcEXX02i8q2MNd3j6HeoeA7e2Ad7r4qZl0x0biCBoHWIa4 2yIIOYR8C8hEhuZF1hS6lBAFZemBjPlN771lVcMv4A0mrbnBaAf4jMC2Awn0VdVXR6dm 40RA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id v9si9510333edr.417.2020.06.22.07.26.40; Mon, 22 Jun 2020 07:26:41 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729435AbgFVO0k (ORCPT + 6 others); Mon, 22 Jun 2020 10:26:40 -0400 Received: from mx2.suse.de ([195.135.220.15]:46902 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729358AbgFVO0d (ORCPT ); Mon, 22 Jun 2020 10:26:33 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 68BD4C1E2; Mon, 22 Jun 2020 14:26:30 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v4 1/3] dt-bindings: arm: realtek: Convert comments to descriptions Date: Sun, 21 Jun 2020 01:32:25 +0200 Message-Id: <20200620233227.31585-2-afaerber@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200620233227.31585-1-afaerber@suse.de> References: <20200620233227.31585-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Turn the SoC-level comments into description properties. Signed-off-by: Andreas Färber --- v4: New .../devicetree/bindings/arm/realtek.yaml | 24 +++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) -- 2.26.2 Acked-by: James Tai diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml index 845f9c76d6f7..0b388016bbcd 100644 --- a/Documentation/devicetree/bindings/arm/realtek.yaml +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -14,21 +14,21 @@ properties: const: '/' compatible: oneOf: - # RTD1195 SoC based boards - - items: + - description: RTD1195 SoC based boards + items: - enum: - mele,x1000 # MeLE X1000 - realtek,horseradish # Realtek Horseradish EVB - const: realtek,rtd1195 - # RTD1293 SoC based boards - - items: + - description: RTD1293 SoC based boards + items: - enum: - synology,ds418j # Synology DiskStation DS418j - const: realtek,rtd1293 - # RTD1295 SoC based boards - - items: + - description: RTD1295 SoC based boards + items: - enum: - mele,v9 # MeLE V9 - probox2,ava # ProBox2 AVA @@ -36,21 +36,21 @@ properties: - zidoo,x9s # Zidoo X9S - const: realtek,rtd1295 - # RTD1296 SoC based boards - - items: + - description: RTD1296 SoC based boards + items: - enum: - synology,ds418 # Synology DiskStation DS418 - const: realtek,rtd1296 - # RTD1395 SoC based boards - - items: + - description: RTD1395 SoC based boards + items: - enum: - bananapi,bpi-m4 # Banana Pi BPI-M4 - realtek,lion-skin # Realtek Lion Skin EVB - const: realtek,rtd1395 - # RTD1619 SoC based boards - - items: + - description: RTD1619 SoC based boards + items: - enum: - realtek,mjolnir # Realtek Mjolnir EVB - const: realtek,rtd1619 From patchwork Sat Jun 20 23:32:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 191330 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp1092371ile; Mon, 22 Jun 2020 07:27:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxmS/bEBMUTFjPa1/5pILACzj6DCnQWc5YAH/Wl5eI7AyG5TQj23c28guLQEPYmbju8ALkL X-Received: by 2002:a50:c181:: with SMTP id m1mr16800704edf.27.1592836037350; Mon, 22 Jun 2020 07:27:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592836037; cv=none; d=google.com; s=arc-20160816; b=fN2vaCH+z7gTdpnPQTa3aprUnzwY67n+3PyjPV5K/w3NSIbqjAGZxpTzpt/G1/6xZv iECESEP5nPSNKzOnVlr2FviUF6eDBoAMBCPbJaZtatwTaEvtASMFd3j8f+eUGRQjydLa Cu1v8hGdDV1GgLvg85zz35L52GdV5dCmJeEodpTseEiQSf37Pixm2Mo856/F5riv14Hq qdbruTX6xAZrMZtyHjJUbHewZ8uRUI3OMH30j3d1KFqeztyweZf/mmBppwmHYBj+b6Qf /9S2iMkFnAoLhPfMSedQ68SM+hk71KZnXkw3Vp1LV6Dhy2s05Q3pI+8mVNcmXC6rhK7Y mVwg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=xceaIi0vWHqrRAFq2n0uKJZMqeDcx6ea3cZ2/WQg5aw=; b=HFgZYAt+OOc1gseOLIe6OablLVn/16SvkNyIjx8iOTDVH1Zd9RKKxEvzdJZ48xOBgU pSA2joViHfwDg9Gu4DZzzhjOUlcBevzMnhRJI0uHImITlDR9Z6GjT/XW01kZzd6xWTwB dwfFcBDx+zfOjuT9AdNtrc30VZk7BZvTfA5ND+MxrbeiK+0Z7hDUEGGTrlEJPh9lpnhS OA5lftZ5VEzV1L0LJZ7gDXTmynHdQZpEKHV1oRlVaDbl7ZzfyIUf92mri56SOylYG12U C5sNG2top8drxP4FbWAoJwb2Ffq+wr67wyvYMPt5aEbtkVwwPZqn/Ipro+NCEcpr+80r 4GRw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id dm15si10333200ejc.728.2020.06.22.07.27.17; Mon, 22 Jun 2020 07:27:17 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729498AbgFVO1L (ORCPT + 6 others); Mon, 22 Jun 2020 10:27:11 -0400 Received: from mx2.suse.de ([195.135.220.15]:48508 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729485AbgFVO0v (ORCPT ); Mon, 22 Jun 2020 10:26:51 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id A4F0BC1BC; Mon, 22 Jun 2020 14:26:48 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, James Tai , =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v4 2/3] dt-bindings: arm: realtek: Document RTD1319 and Realtek Pym Particles EVB Date: Sun, 21 Jun 2020 01:32:26 +0200 Message-Id: <20200620233227.31585-3-afaerber@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200620233227.31585-1-afaerber@suse.de> References: <20200620233227.31585-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: James Tai Define compatible strings for Realtek RTD1319 SoC and Realtek Pym Particles EVB. Signed-off-by: James Tai Signed-off-by: Andreas Färber --- v3 -> v4: * Renamed compatible from pymparticle to pym-particles * Turned SoC comment into description v2 -> v3: Unchanged v1 -> v2: * Put string in alphabetical order Documentation/devicetree/bindings/arm/realtek.yaml | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.26.2 Acked-by: James Tai diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml index 0b388016bbcd..e36e87df3521 100644 --- a/Documentation/devicetree/bindings/arm/realtek.yaml +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -42,6 +42,12 @@ properties: - synology,ds418 # Synology DiskStation DS418 - const: realtek,rtd1296 + - description: RTD1319 SoC based boards + items: + - enum: + - realtek,pym-particles # Realtek Pym Particles EVB + - const: realtek,rtd1319 + - description: RTD1395 SoC based boards items: - enum: From patchwork Sat Jun 20 23:32:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 191329 Delivered-To: patch@linaro.org Received: by 2002:a92:1f07:0:0:0:0:0 with SMTP id i7csp1092327ile; Mon, 22 Jun 2020 07:27:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy6v5ZeQ4fbk1J5Mzsr0XMaKUUIK3fOI30DBhdIT/wMAuXtsIjwmj3BvvAEWBdGEUyCzI/o X-Received: by 2002:a17:906:af62:: with SMTP id os2mr15719258ejb.345.1592836033201; Mon, 22 Jun 2020 07:27:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592836033; cv=none; d=google.com; s=arc-20160816; b=FxlvSTbT6iwoW9yEop+CUGL8OfQNFp6g5WQYFAbIwqTZq0ZA3TDuGASEJilXRranaj cfJWfJ/36VikJ1+KFV9X7skG1U3aHIFehSGMsyiDBDFUkvRYfJN98LBhLyrCgBP5XqCY GMYXWuzD4BNHqKDaw2bWG6XIHtMoFEugsSgf4dZL9BX/ZEVrAwgem5R5ksd/LnN1vBjX wfg6vBS/g/5azLdNPDNJcfGxW9fCBQ0r5nfWnjTZeq7QzJpb1ArkXXJN+m95QkkaFBNq wz+OjCLAX+hJQgyZicxNsKRBNAM3AUO0dzAs7FnlhuQaE0lYz/PWuG/+UbcWh257zqqL fYrg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=+1nXvcApdG7xJoE6XSyQzRU6lEu3dgDb51hxRrxoFfw=; b=fIFPm7v88igetr5autvUetMez0lBaLeEDxpYSyq5PJNfwvee7lRr9E9m1cmfp9Kl6J S37yCmzfS9ZDqVuK0KxxJrzR3pCla0P4Fq/8gtG+M1CtMmzxCBd+qCQgwwZOlfgkCKke qOSHeudBQSco9VLa9gO7wOSsZpFG9WpJSkKiUeIOdR7ignfmKDHxykZi8e5N27zdeL2t nHfaV41H4Ig0iSErGyUrQfGq3KWJ19h1kQL5rmZWZrLNUQTkYIZSOCJNiSHSplzCnfEA Pp9j2mpEqoAMzSZ4fkXFyTdMyC9yevkoveSolzxcOn7nlAFULzwSHKmwMsp9T9sYWwwl HXZQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w24si9712440ejv.691.2020.06.22.07.27.13; Mon, 22 Jun 2020 07:27:13 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729544AbgFVO0v (ORCPT + 6 others); Mon, 22 Jun 2020 10:26:51 -0400 Received: from mx2.suse.de ([195.135.220.15]:48530 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729523AbgFVO0u (ORCPT ); Mon, 22 Jun 2020 10:26:50 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 937DEC1AB; Mon, 22 Jun 2020 14:26:46 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, James Tai , =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v4 3/3] arm64: dts: realtek: Add RTD1319 SoC and Realtek Pym Particles EVB Date: Sun, 21 Jun 2020 01:32:27 +0200 Message-Id: <20200620233227.31585-4-afaerber@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200620233227.31585-1-afaerber@suse.de> References: <20200620233227.31585-1-afaerber@suse.de> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: James Tai Add Device Trees for Realtek RTD1319 SoC family, RTD1319 SoC and Realtek Pym Particles EVB. Signed-off-by: James Tai Signed-off-by: Andreas Färber --- v3 -> v4: * Updated Realtek copyright for 2 out of 3 files from v3 * Renamed from rtd1319-pymparticle.dts to rtd1319-pymparticles.dts * Updated compatible from pymparticle to pym-particles * Updated PMU compatible from armv8-pmuv3 to cortex-a55-pmu (Robin) v2 -> v3: * Add virtual maintenance interrupt for architecture timer * Correct the GIC redistributor address range v1 -> v2: * Reserve the boot ROM address * Reserve boot loader address * Reserve audio/video FW address * Reserve RPC and ring buffer address * Reserve TEE address * Support 1 GiB RAM by default * Reduce rbus range to 2 MiB * Apply the syscon for ISO,MISC,CRT,SB2,SCPU_WRAPPER * Adjust compatible strings order in document arch/arm64/boot/dts/realtek/Makefile | 2 + .../boot/dts/realtek/rtd1319-pymparticles.dts | 43 ++++ arch/arm64/boot/dts/realtek/rtd1319.dtsi | 12 + arch/arm64/boot/dts/realtek/rtd13xx.dtsi | 213 ++++++++++++++++++ 4 files changed, 270 insertions(+) create mode 100644 arch/arm64/boot/dts/realtek/rtd1319-pymparticles.dts create mode 100644 arch/arm64/boot/dts/realtek/rtd1319.dtsi create mode 100644 arch/arm64/boot/dts/realtek/rtd13xx.dtsi -- 2.26.2 diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile index ef8d8fcbaa05..83708596726d 100644 --- a/arch/arm64/boot/dts/realtek/Makefile +++ b/arch/arm64/boot/dts/realtek/Makefile @@ -9,6 +9,8 @@ dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1296-ds418.dtb +dtb-$(CONFIG_ARCH_REALTEK) += rtd1319-pymparticles.dtb + dtb-$(CONFIG_ARCH_REALTEK) += rtd1395-bpi-m4.dtb dtb-$(CONFIG_ARCH_REALTEK) += rtd1395-lionskin.dtb diff --git a/arch/arm64/boot/dts/realtek/rtd1319-pymparticles.dts b/arch/arm64/boot/dts/realtek/rtd1319-pymparticles.dts new file mode 100644 index 000000000000..e0b3c3707a85 --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1319-pymparticles.dts @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Copyright (c) 2019-2020 Realtek Semiconductor Corp. + */ + +/dts-v1/; + +#include "rtd1319.dtsi" + +/ { + compatible = "realtek,pym-particles", "realtek,rtd1319"; + model = "Realtek Pym Particles EVB"; + + memory@2e000 { + device_type = "memory"; + reg = <0x2e000 0x3ffd2000>; /* boot ROM to 1 GiB or 2 GiB */ + }; + + chosen { + stdout-path = "serial0:460800n8"; + }; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + }; +}; + +/* debug console (J1) */ +&uart0 { + status = "okay"; +}; + +/* M.2 slots (CON2, CON8) and J14 */ +&uart1 { + status = "disabled"; +}; + +/* GPIO connector (T1) */ +&uart2 { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd1319.dtsi b/arch/arm64/boot/dts/realtek/rtd1319.dtsi new file mode 100644 index 000000000000..1dcee00009cd --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1319.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Realtek RTD1319 SoC + * + * Copyright (c) 2019 Realtek Semiconductor Corp. + */ + +#include "rtd13xx.dtsi" + +/ { + compatible = "realtek,rtd1319"; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd13xx.dtsi b/arch/arm64/boot/dts/realtek/rtd13xx.dtsi new file mode 100644 index 000000000000..8c5b6fc7b8eb --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd13xx.dtsi @@ -0,0 +1,213 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) +/* + * Realtek RTD13xx SoC family + * + * Copyright (c) 2019-2020 Realtek Semiconductor Corp. + */ + +/memreserve/ 0x0000000000000000 0x000000000002e000; /* Boot ROM */ +/memreserve/ 0x000000000002e000 0x0000000000100000; /* Boot loader */ +/memreserve/ 0x000000000f400000 0x0000000000500000; /* Video FW */ +/memreserve/ 0x000000000f900000 0x0000000000500000; /* Audio FW */ +/memreserve/ 0x0000000010000000 0x0000000000014000; /* Audio FW RAM */ + +#include +#include + +/ { + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rpc_comm: rpc@3f000 { + reg = <0x3f000 0x1000>; + }; + + rpc_ringbuf: rpc@1ffe000 { + reg = <0x1ffe000 0x4000>; + }; + + tee: tee@10100000 { + reg = <0x10100000 0xf00000>; + no-map; + }; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x100>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu@200 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x200>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu@300 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x300>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache { + compatible = "cache"; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + , + ; + }; + + arm_pmu: pmu { + compatible = "arm,cortex-a55-pmu"; + interrupts = ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + osc27M: osc { + compatible = "fixed-clock"; + clock-frequency = <27000000>; + clock-output-names = "osc27M"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x00000000 0x0002e000>, /* boot ROM */ + <0xff100000 0xff100000 0x00200000>, /* GIC */ + <0x98000000 0x98000000 0x00200000>; /* rbus */ + + rbus: bus@98000000 { + compatible = "simple-bus"; + reg = <0x98000000 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x98000000 0x200000>; + + crt: syscon@0 { + compatible = "syscon", "simple-mfd"; + reg = <0x0 0x1000>; + reg-io-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x1000>; + }; + + iso: syscon@7000 { + compatible = "syscon", "simple-mfd"; + reg = <0x7000 0x1000>; + reg-io-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x7000 0x1000>; + }; + + sb2: syscon@1a000 { + compatible = "syscon", "simple-mfd"; + reg = <0x1a000 0x1000>; + reg-io-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1a000 0x1000>; + }; + + misc: syscon@1b000 { + compatible = "syscon", "simple-mfd"; + reg = <0x1b000 0x1000>; + reg-io-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1b000 0x1000>; + }; + + scpu_wrapper: syscon@1d000 { + compatible = "syscon", "simple-mfd"; + reg = <0x1d000 0x1000>; + reg-io-width = <4>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x1d000 0x1000>; + }; + }; + + gic: interrupt-controller@ff100000 { + compatible = "arm,gic-v3"; + reg = <0xff100000 0x10000>, + <0xff140000 0x80000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + }; + }; +}; + +&iso { + uart0: serial0@800 { + compatible = "snps,dw-apb-uart"; + reg = <0x800 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + clock-frequency = <432000000>; + status = "disabled"; + }; +}; + +&misc { + uart1: serial1@200 { + compatible = "snps,dw-apb-uart"; + reg = <0x200 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + clock-frequency = <432000000>; + status = "disabled"; + }; + + uart2: serial2@400 { + compatible = "snps,dw-apb-uart"; + reg = <0x400 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + clock-frequency = <432000000>; + status = "disabled"; + }; +};