From patchwork Fri Jun 26 15:41:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 191870 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp601657ilg; Fri, 26 Jun 2020 08:43:35 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzxIhQO7Gv4Edz67gGP7D5Y9aFxOgJ91B5DOW4fzMSdjycNAP1Y+1bKIlwcJmMh5FvuQLhO X-Received: by 2002:a17:906:7208:: with SMTP id m8mr3242979ejk.544.1593186215773; Fri, 26 Jun 2020 08:43:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593186215; cv=none; d=google.com; s=arc-20160816; b=p6NJO54OTO3CnyF5OXR6N+cd/8ZddLuwqNA0LAWdYL/0KA+iElt2lLqSYzZBf3XN7C aPxGqazi1ryXl25BYZTrcyNRGQKGhFespyycwQ4ZcjtY10BCEUWXppxT929AbbV9yip9 fXr65+FKkKXeNrYGqIp+pgoo6eTZS0Rdj1qIG37GBITP6yVJ79ujAT8kmTm5zTxfzsBg P6WA+5ZTRhOuEwlPE/BzOrW2VVBjxYtVrk5yoth5rAA+kQGyWM32XK6SolcKpxaSBwTU nFEUCwYN6lk5juNFTCyQvkzA50w35nglFpPcdKFB/1yb/04DxwKnvx1iFNYSHhnGT9xh Kwzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=GG7iVTtH66CFQ0+sz3xhPwwA2xGTNJWkclGWewHyGf4=; b=pel5zS9bGwdxJIMquCBfNZ3Gw5Q6yeRCNlHUu1WgoJIDYK8gQLf3ebCqjj0sV3vc+6 db6ytjktC0MKIyQd3WAiLuBDnrX8n67agufnQL3NsVhz/9e6i1PSDHUTI6+MK9KCv9LD DHjXohWPMtMDL46utEXTmJD1kIoVVmRR8xTCu+WcRn8PNKR5h2AalEQYSnckECxr1kpO i8FtBlAM6TLCZ9YbORhAw2mSXEyNyI2BgrJOS6wZUTbU7yAqEwnfUut8G4hH9AIQah3j czjQFnbjPew4lYUI6TWvktE7yOSJoBxQWzTd/LpfHvZJZ//rnkd8rNSFxOqXofiDzbnr nD2w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=fnVlztAX; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r17si17746028edw.77.2020.06.26.08.43.35; Fri, 26 Jun 2020 08:43:35 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=fnVlztAX; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729857AbgFZPn2 (ORCPT + 6 others); Fri, 26 Jun 2020 11:43:28 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:42740 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729850AbgFZPn1 (ORCPT ); Fri, 26 Jun 2020 11:43:27 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05QFgZOk078944; Fri, 26 Jun 2020 10:42:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1593186155; bh=GG7iVTtH66CFQ0+sz3xhPwwA2xGTNJWkclGWewHyGf4=; h=From:To:CC:Subject:Date; b=fnVlztAXaTajtyS5dLlDODhRhfpgylx93bLHM3hdaZtiPXS0Zui18+i5EXb10qVJa /2XuVFOg+iQ4hc6v4MYLzisidZyjARrxjQesYNKrEgllSoq+6xJ/C/ULzQxNUgEqEn ZE6/4NldMpDVL+MJqBkXwn8pmecPxDDooCle1QL8= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 05QFgZSe020449 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 26 Jun 2020 10:42:35 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 26 Jun 2020 10:42:35 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 26 Jun 2020 10:42:35 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05QFgYBX083829; Fri, 26 Jun 2020 10:42:34 -0500 From: Dan Murphy To: , , , CC: , , , , Dan Murphy Subject: [PATCH 1/4] ASoC: tas2562: Add right and left channel slot programming Date: Fri, 26 Jun 2020 10:41:40 -0500 Message-ID: <20200626154143.20351-1-dmurphy@ti.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add programming for the tdm slots for the right and left. This also requires configuring the RX/TX offsets for the DAI format type. Signed-off-by: Dan Murphy --- sound/soc/codecs/tas2562.c | 71 +++++++++++++++++++++++++++++--------- sound/soc/codecs/tas2562.h | 5 ++- 2 files changed, 59 insertions(+), 17 deletions(-) -- 2.26.2 diff --git a/sound/soc/codecs/tas2562.c b/sound/soc/codecs/tas2562.c index d26e30a2948c..1d3c381aeefe 100644 --- a/sound/soc/codecs/tas2562.c +++ b/sound/soc/codecs/tas2562.c @@ -175,7 +175,37 @@ static int tas2562_set_dai_tdm_slot(struct snd_soc_dai *dai, { struct snd_soc_component *component = dai->component; struct tas2562_data *tas2562 = snd_soc_component_get_drvdata(component); - int ret = 0; + int left_slot, right_slot; + int slots_cfg; + int ret; + + if (!tx_mask) { + dev_err(component->dev, "tx masks must not be 0\n"); + return -EINVAL; + } + + if (slots == 1) { + if (tx_mask != 1) + return -EINVAL; + + left_slot = 0; + right_slot = 0; + } else { + left_slot = __ffs(tx_mask); + tx_mask &= ~(1 << left_slot); + if (tx_mask == 0) { + right_slot = left_slot; + } else { + right_slot = __ffs(tx_mask); + tx_mask &= ~(1 << right_slot); + } + } + + slots_cfg = (right_slot << TAS2562_RIGHT_SLOT_SHIFT) | left_slot; + + ret = snd_soc_component_write(component, TAS2562_TDM_CFG3, slots_cfg); + if (ret < 0) + return ret; switch (slot_width) { case 16: @@ -208,6 +238,18 @@ static int tas2562_set_dai_tdm_slot(struct snd_soc_dai *dai, if (ret < 0) return ret; + ret = snd_soc_component_update_bits(component, TAS2562_TDM_CFG5, + TAS2562_TDM_CFG5_VSNS_SLOT_MASK, + tas2562->v_sense_slot); + if (ret < 0) + return ret; + + ret = snd_soc_component_update_bits(component, TAS2562_TDM_CFG6, + TAS2562_TDM_CFG6_ISNS_SLOT_MASK, + tas2562->i_sense_slot); + if (ret < 0) + return ret; + return 0; } @@ -285,7 +327,8 @@ static int tas2562_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) { struct snd_soc_component *component = dai->component; struct tas2562_data *tas2562 = snd_soc_component_get_drvdata(component); - u8 tdm_rx_start_slot = 0, asi_cfg_1 = 0; + u8 asi_cfg_1 = 0; + u8 tdm_rx_start_slot = 0; int ret; switch (fmt & SND_SOC_DAIFMT_INV_MASK) { @@ -307,27 +350,23 @@ static int tas2562_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) dev_err(tas2562->dev, "Failed to set RX edge\n"); return ret; } - switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { - case (SND_SOC_DAIFMT_I2S): - case (SND_SOC_DAIFMT_DSP_A): - case (SND_SOC_DAIFMT_DSP_B): - tdm_rx_start_slot = BIT(1); - break; - case (SND_SOC_DAIFMT_LEFT_J): + case SND_SOC_DAIFMT_LEFT_J: + case SND_SOC_DAIFMT_DSP_B: tdm_rx_start_slot = 0; break; - default: - dev_err(tas2562->dev, "DAI Format is not found, fmt=0x%x\n", - fmt); - ret = -EINVAL; + case SND_SOC_DAIFMT_I2S: + case SND_SOC_DAIFMT_DSP_A: + tdm_rx_start_slot = 1; break; + default: + dev_err(tas2562->dev, + "DAI Format is not found, fmt=0x%x\n", fmt); + return -EINVAL; } ret = snd_soc_component_update_bits(component, TAS2562_TDM_CFG1, - TAS2562_TDM_CFG1_RX_OFFSET_MASK, - tdm_rx_start_slot); - + TAS2562_RX_OFF_MASK, (tdm_rx_start_slot << 1)); if (ret < 0) return ret; diff --git a/sound/soc/codecs/tas2562.h b/sound/soc/codecs/tas2562.h index 28e75fc431d0..18209f397921 100644 --- a/sound/soc/codecs/tas2562.h +++ b/sound/soc/codecs/tas2562.h @@ -34,6 +34,10 @@ #define TAS2562_TDM_DET TAS2562_REG(0, 0x11) #define TAS2562_REV_ID TAS2562_REG(0, 0x7d) +#define TAS2562_RX_OFF_MASK GENMASK(5, 1) +#define TAS2562_TX_OFF_MASK GENMASK(3, 1) +#define TAS2562_RIGHT_SLOT_SHIFT 4 + /* Page 2 */ #define TAS2562_DVC_CFG1 TAS2562_REG(2, 0x0c) #define TAS2562_DVC_CFG2 TAS2562_REG(2, 0x0d) @@ -49,7 +53,6 @@ #define TAS2562_TDM_CFG1_RX_EDGE_MASK BIT(0) #define TAS2562_TDM_CFG1_RX_FALLING 1 -#define TAS2562_TDM_CFG1_RX_OFFSET_MASK GENMASK(4, 0) #define TAS2562_TDM_CFG0_RAMPRATE_MASK BIT(5) #define TAS2562_TDM_CFG0_RAMPRATE_44_1 BIT(5) From patchwork Fri Jun 26 15:41:41 2020 Content-Type: text/plain; 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[23.128.96.18]) by mx.google.com with ESMTP id dm6si3029375edb.169.2020.06.26.08.42.56; Fri, 26 Jun 2020 08:42:56 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="oyj/NEPj"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727054AbgFZPmz (ORCPT + 6 others); Fri, 26 Jun 2020 11:42:55 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:59380 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726361AbgFZPmz (ORCPT ); Fri, 26 Jun 2020 11:42:55 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05QFgejC096131; Fri, 26 Jun 2020 10:42:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1593186160; bh=nvx312mv4VGvwwIjEoy4EfaLo8OvbsRscw5gPQDVBlY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=oyj/NEPjKelpOnJyCG7t0Xv9vr3fhklcM10K6XnRfhzmqb7V0IrN3cGEXKqzCS7uI qitjly3MmvGkJJATXnZvNsQXRgNSmEI85On+/wuQ/HEsR50VAwTgrUgTNalOGTkOkk LbjuHYRKrfmPYxUZ9SokGS3ktU/mtRr/GNdufxPY= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 05QFgei8080472 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 26 Jun 2020 10:42:40 -0500 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 26 Jun 2020 10:42:40 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 26 Jun 2020 10:42:40 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05QFge5p083900; Fri, 26 Jun 2020 10:42:40 -0500 From: Dan Murphy To: , , , CC: , , , , Dan Murphy Subject: [PATCH 2/4] dt-bindings: tas2562: Add voltage sense slot property Date: Fri, 26 Jun 2020 10:41:41 -0500 Message-ID: <20200626154143.20351-2-dmurphy@ti.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200626154143.20351-1-dmurphy@ti.com> References: <20200626154143.20351-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a property to configure the slot for the voltage sense monitoring of the device. Vsense data will be sent to the processor via the slot defined by the property Signed-off-by: Dan Murphy --- Documentation/devicetree/bindings/sound/tas2562.txt | 3 +++ 1 file changed, 3 insertions(+) -- 2.26.2 diff --git a/Documentation/devicetree/bindings/sound/tas2562.txt b/Documentation/devicetree/bindings/sound/tas2562.txt index fd0ac8636c01..dc6d7362ded7 100644 --- a/Documentation/devicetree/bindings/sound/tas2562.txt +++ b/Documentation/devicetree/bindings/sound/tas2562.txt @@ -11,6 +11,8 @@ Required properties: - compatible: - Should contain "ti,tas2562", "ti,tas2563". - reg: - The i2c address. Should be 0x4c, 0x4d, 0x4e or 0x4f. - ti,imon-slot-no:- TDM TX current sense time slot. + - ti,vmon-slot-no:- TDM TX voltage sense time slot. This slot must always be + greater then ti,imon-slot-no. Optional properties: - interrupt-parent: phandle to the interrupt controller which provides @@ -30,5 +32,6 @@ tas2562@4c { shut-down-gpio = <&gpio1 15 0>; ti,imon-slot-no = <0>; + ti,vmon-slot-no = <1>; }; From patchwork Fri Jun 26 15:41:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 191869 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp601559ilg; Fri, 26 Jun 2020 08:43:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyXJchAUZ1QfbyTV68Ni12nRVWaaDaS/GQ3cx3oEAWeUUUF+07rnXxyiIwJRn9ch3+PvIho X-Received: by 2002:a17:906:76c4:: with SMTP id q4mr3239656ejn.371.1593186209236; Fri, 26 Jun 2020 08:43:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593186209; cv=none; d=google.com; s=arc-20160816; b=Qpohu1uurWgGbYxrd4b8qyAJ/Ot2kDJCsoMlpav2NDT63IlduqBUl4pkOYSZpWLTPH BhsDO+HNP6PzlchLQM1f9yLsoS+K3lLXaXDyLAVbaPtTmVeH3UU5hX7h9BnqA8l7ovEQ RvoAcPuwP6RahSib2X6AG9icqyA2F6bMxRCytY+IbljhP6J2OW4BOWM53A3Bc4fj8xkh OjB66j51e2NVNRU4+WWbcy8FosJD/I4ChrFJGNEVZVOdBvySiMjF6SyiCnTwdnH5p8Ft lMOyedg4AYeomAYDupzmWgzWh6S3HfpIdvwqCSs6FI4zU8LO2ZvsTBr+icruLqm4kTSQ 3twg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=EW2A9uRIGHHuM09Q2Wz7LAYeQOWX5tSnZ+cfBXr43XA=; b=hfhRFzGCOhkyVQYfInsKdAtxcf4GQim6GsP6tkYOuv8O/PhztcauzSwo5e+7mFKNiR dsvXU1mwHdaAJDR/z5dBiaxSEwsZdAFCf96U6jTIsXM3exrFh32z41zbk0QfMr5Z6ypq GvsBgwg3mQNwOaF/QcmIeHbANzSLDMXB/ijmoMDbJ0yZvvHp84MfQtK4ZnRqM6jbBUrv vKAolhahcEFGGd/ZSRCaMn7foGRCHoz4JSB3Zfg2ard1afqBFVxolPghJuOASwbKQlpQ FROOKrrH8XXsei0eZBiv3SYKMoPQ2msfpEAlWK4bbrp+ZIikPUMqML5FoZI7LOG4H6n6 7VnQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="KYO2Eu/y"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q10si15642560ejp.503.2020.06.26.08.43.29; Fri, 26 Jun 2020 08:43:29 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="KYO2Eu/y"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729852AbgFZPn1 (ORCPT + 6 others); Fri, 26 Jun 2020 11:43:27 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:59412 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726607AbgFZPn1 (ORCPT ); Fri, 26 Jun 2020 11:43:27 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 05QFgj9D096147; Fri, 26 Jun 2020 10:42:45 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1593186165; bh=EW2A9uRIGHHuM09Q2Wz7LAYeQOWX5tSnZ+cfBXr43XA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=KYO2Eu/yixigv8qpY3KFnVxeMkfl4LF75K5IQeT9gMx+OVjW3PjMRrujG7IH3hGk9 SXJl/4E8wYs9ftgVGLmRetbcHX6L2S4TijmQgY6pi3ANQwwEaQxBIrw9TvYxIqAwfC WyMa3y01UksL9dN39v0OroGPuHxKkI7Q5YynEfVo= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 05QFgjRC080515 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 26 Jun 2020 10:42:45 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 26 Jun 2020 10:42:45 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 26 Jun 2020 10:42:45 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 05QFgjVR085983; Fri, 26 Jun 2020 10:42:45 -0500 From: Dan Murphy To: , , , CC: , , , , Dan Murphy Subject: [PATCH 3/4] ASoC: tas2562: Add voltage sense slot configuration Date: Fri, 26 Jun 2020 10:41:42 -0500 Message-ID: <20200626154143.20351-3-dmurphy@ti.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200626154143.20351-1-dmurphy@ti.com> References: <20200626154143.20351-1-dmurphy@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add Vsense slot configuration based on the device tree. Adding this property enables the slot programming to be moved to the tdm_set_slot callback. This in affect sets the slots for the Isense and Vsense and enabling this these modes are now based on whether these features were powered on or not. Signed-off-by: Dan Murphy --- sound/soc/codecs/tas2562.c | 65 ++++++++++++++++++++++++++++++-------- 1 file changed, 51 insertions(+), 14 deletions(-) -- 2.26.2 diff --git a/sound/soc/codecs/tas2562.c b/sound/soc/codecs/tas2562.c index 1d3c381aeefe..5c28af370bd4 100644 --- a/sound/soc/codecs/tas2562.c +++ b/sound/soc/codecs/tas2562.c @@ -250,12 +250,26 @@ static int tas2562_set_dai_tdm_slot(struct snd_soc_dai *dai, if (ret < 0) return ret; + ret = snd_soc_component_update_bits(component, TAS2562_TDM_CFG5, + TAS2562_TDM_CFG5_VSNS_SLOT_MASK, + tas2562->v_sense_slot); + if (ret < 0) + return ret; + + ret = snd_soc_component_update_bits(component, TAS2562_TDM_CFG6, + TAS2562_TDM_CFG6_ISNS_SLOT_MASK, + tas2562->i_sense_slot); + if (ret < 0) + return ret; + return 0; } static int tas2562_set_bitwidth(struct tas2562_data *tas2562, int bitwidth) { int ret; + int val; + int sense_en; switch (bitwidth) { case SNDRV_PCM_FORMAT_S16_LE: @@ -263,21 +277,18 @@ static int tas2562_set_bitwidth(struct tas2562_data *tas2562, int bitwidth) TAS2562_TDM_CFG2, TAS2562_TDM_CFG2_RXWLEN_MASK, TAS2562_TDM_CFG2_RXWLEN_16B); - tas2562->v_sense_slot = tas2562->i_sense_slot + 2; break; case SNDRV_PCM_FORMAT_S24_LE: snd_soc_component_update_bits(tas2562->component, TAS2562_TDM_CFG2, TAS2562_TDM_CFG2_RXWLEN_MASK, TAS2562_TDM_CFG2_RXWLEN_24B); - tas2562->v_sense_slot = tas2562->i_sense_slot + 4; break; case SNDRV_PCM_FORMAT_S32_LE: snd_soc_component_update_bits(tas2562->component, TAS2562_TDM_CFG2, TAS2562_TDM_CFG2_RXWLEN_MASK, TAS2562_TDM_CFG2_RXWLEN_32B); - tas2562->v_sense_slot = tas2562->i_sense_slot + 4; break; default: @@ -285,17 +296,27 @@ static int tas2562_set_bitwidth(struct tas2562_data *tas2562, int bitwidth) return -EINVAL; } - ret = snd_soc_component_update_bits(tas2562->component, - TAS2562_TDM_CFG5, - TAS2562_TDM_CFG5_VSNS_EN | TAS2562_TDM_CFG5_VSNS_SLOT_MASK, - TAS2562_TDM_CFG5_VSNS_EN | tas2562->v_sense_slot); + val = snd_soc_component_read(tas2562->component, TAS2562_PWR_CTRL); + if (val < 0) + return val; + + if (val & (1 << TAS2562_VSENSE_POWER_EN)) + sense_en = 0; + else + sense_en = TAS2562_TDM_CFG5_VSNS_EN; + + ret = snd_soc_component_update_bits(tas2562->component, TAS2562_TDM_CFG5, + TAS2562_TDM_CFG5_VSNS_EN, sense_en); if (ret < 0) return ret; - ret = snd_soc_component_update_bits(tas2562->component, - TAS2562_TDM_CFG6, - TAS2562_TDM_CFG6_ISNS_EN | TAS2562_TDM_CFG6_ISNS_SLOT_MASK, - TAS2562_TDM_CFG6_ISNS_EN | tas2562->i_sense_slot); + if (val & (1 << TAS2562_ISENSE_POWER_EN)) + sense_en = 0; + else + sense_en = TAS2562_TDM_CFG6_ISNS_EN; + + ret = snd_soc_component_update_bits(tas2562->component, TAS2562_TDM_CFG6, + TAS2562_TDM_CFG6_ISNS_EN, sense_en); if (ret < 0) return ret; @@ -669,9 +690,25 @@ static int tas2562_parse_dt(struct tas2562_data *tas2562) ret = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no", &tas2562->i_sense_slot); - if (ret) - dev_err(dev, "Looking up %s property failed %d\n", - "ti,imon-slot-no", ret); + if (ret) { + dev_err(dev, "Property %s is missing setting default slot\n", + "ti,imon-slot-no"); + tas2562->i_sense_slot = 0; + } + + + ret = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no", + &tas2562->v_sense_slot); + if (ret) { + dev_info(dev, "Property %s is missing setting default slot\n", + "ti,vmon-slot-no"); + tas2562->v_sense_slot = 2; + } + + if (tas2562->v_sense_slot < tas2562->i_sense_slot) { + dev_err(dev, "Vsense slot must be greater than Isense slot\n"); + return -EINVAL; + } return ret; } From patchwork Fri Jun 26 15:41:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Murphy X-Patchwork-Id: 191871 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp601703ilg; Fri, 26 Jun 2020 08:43:37 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwAp3GbN4dkqkLftxk4txNtIUMFU+AFBTRpJFG2sL0uB9lRjKt//P4BBeUR2lkds/c2W+NI X-Received: by 2002:a50:ab53:: with SMTP id t19mr4022315edc.179.1593186217664; Fri, 26 Jun 2020 08:43:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593186217; cv=none; d=google.com; s=arc-20160816; b=fzQYhidRG1+Z07ITaO0B5dkvfBuN2N6pA4R+tblPAMmJlH7pDXTVrTWJ3SFJOfHwtO /GmGcv2eaJDJDxOUl2+xPKtUEA9zHt617GnegUzOig7BDEvecm4XjQxoCAJO6JJuOTJS ptZTaoNoV0mt1sXsCFxIAWBnn/XFTi5l1RH85Pnr4Rj+DhbwX8FSkeClwSni7YPv/JPa uQk0lr+Hp9x1+H2/RMuA/h/k3hqp4hr6DoJEN2LAcdQ0mGj4j7DhhqafQ+F5P01bM9ir BRho3kqjE1GsJDoCvQ7HlpHJJfyKlwvEAN0Kp9/5lEfH9gCtOP4/E+ThYNcW1smXWqFZ zRXg== ARC-Message-Signature: i=1; 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Signed-off-by: Dan Murphy --- .../devicetree/bindings/sound/tas2562.txt | 37 --------- .../devicetree/bindings/sound/tas2562.yaml | 77 +++++++++++++++++++ 2 files changed, 77 insertions(+), 37 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/tas2562.txt create mode 100644 Documentation/devicetree/bindings/sound/tas2562.yaml -- 2.26.2 diff --git a/Documentation/devicetree/bindings/sound/tas2562.txt b/Documentation/devicetree/bindings/sound/tas2562.txt deleted file mode 100644 index dc6d7362ded7..000000000000 --- a/Documentation/devicetree/bindings/sound/tas2562.txt +++ /dev/null @@ -1,37 +0,0 @@ -Texas Instruments TAS2562 Smart PA - -The TAS2562 is a mono, digital input Class-D audio amplifier optimized for -efficiently driving high peak power into small loudspeakers. -Integrated speaker voltage and current sense provides for -real time monitoring of loudspeaker behavior. - -Required properties: - - #address-cells - Should be <1>. - - #size-cells - Should be <0>. - - compatible: - Should contain "ti,tas2562", "ti,tas2563". - - reg: - The i2c address. Should be 0x4c, 0x4d, 0x4e or 0x4f. - - ti,imon-slot-no:- TDM TX current sense time slot. - - ti,vmon-slot-no:- TDM TX voltage sense time slot. This slot must always be - greater then ti,imon-slot-no. - -Optional properties: -- interrupt-parent: phandle to the interrupt controller which provides - the interrupt. -- interrupts: (GPIO) interrupt to which the chip is connected. -- shut-down-gpio: GPIO used to control the state of the device. - -Examples: -tas2562@4c { - #address-cells = <1>; - #size-cells = <0>; - compatible = "ti,tas2562"; - reg = <0x4c>; - - interrupt-parent = <&gpio1>; - interrupts = <14>; - - shut-down-gpio = <&gpio1 15 0>; - ti,imon-slot-no = <0>; - ti,vmon-slot-no = <1>; -}; - diff --git a/Documentation/devicetree/bindings/sound/tas2562.yaml b/Documentation/devicetree/bindings/sound/tas2562.yaml new file mode 100644 index 000000000000..1fb467e14d4c --- /dev/null +++ b/Documentation/devicetree/bindings/sound/tas2562.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) +# Copyright (C) 2019 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/sound/tas2562.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Texas Instruments TAS2562 Smart PA + +maintainers: + - Dan Murphy + +description: | + The TAS2562 is a mono, digital input Class-D audio amplifier optimized for + efficiently driving high peak power into small loudspeakers. + Integrated speaker voltage and current sense provides for + real time monitoring of loudspeaker behavior. + +properties: + compatible: + enum: + - ti,tas2562 + - ti,tas2563 + + reg: + maxItems: 1 + description: | + I2C address of the device can be one of these 0x4c, 0x4d, 0x4e or 0x4f + + shut-down-gpio: + description: GPIO used to control the state of the device. + deprecated: true + + shutdown-gpio: + description: GPIO used to control the state of the device. + + interrupts: + maxItems: 1 + + ti,imon-slot-no: + $ref: /schemas/types.yaml#/definitions/uint32 + description: TDM TX current sense time slot. + + ti,vmon-slot-no: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + TDM TX voltage sense time slot. This slot must always be greater then + ti,imon-slot-no. + + '#sound-dai-cells': + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + codec: codec@4c { + compatible = "ti,tas2562"; + reg = <0x4c>; + #sound-dai-cells = <1>; + interrupt-parent = <&gpio1>; + interrupts = <14>; + shutdown-gpio = <&gpio1 15 0>; + ti,imon-slot-no = <0>; + ti,vmon-slot-no = <2>; + }; + }; + +...