From patchwork Wed Feb 1 17:28:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 93077 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp2524707qgi; Wed, 1 Feb 2017 09:32:14 -0800 (PST) X-Received: by 10.98.160.140 with SMTP id p12mr4924335pfl.97.1485970334083; Wed, 01 Feb 2017 09:32:14 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h7si19742312plk.119.2017.02.01.09.32.13; Wed, 01 Feb 2017 09:32:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753785AbdBARcC (ORCPT + 25 others); Wed, 1 Feb 2017 12:32:02 -0500 Received: from mail-ot0-f172.google.com ([74.125.82.172]:34144 "EHLO mail-ot0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753748AbdBARb5 (ORCPT ); Wed, 1 Feb 2017 12:31:57 -0500 Received: by mail-ot0-f172.google.com with SMTP id f9so295333584otd.1 for ; Wed, 01 Feb 2017 09:31:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=f6wk0/eJ4ZGUfdpxSvlKzQmPNHvtr/t3qXWvFobp6CI=; b=Jl9lwGEM1ybCYioqfxaLbJnuMFKdCFgILyNhFTeOHSUMeyRJG4tM8m27/xwE0yxc8n bUy1sMhv8pA95QG4aJXbFX1WoKJ4Ohdv4G1h00wmdffdJOj3/LIVi52lYi5h8jfv+wXB nTqAJwqiZq0qGMxti07BPnlpZFvhMV9G7mYwA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=f6wk0/eJ4ZGUfdpxSvlKzQmPNHvtr/t3qXWvFobp6CI=; b=Y26fhLGgqZPTigfPNr+ha7U8T8Ql7F3H3R0EmuoWYtueQ7tLXIX2RLtMGKenQISPyF tKd3nApk8ggYUIfN3LxBCdIgkDLKrO7KCyYhTqu/+ZPGL/b6OtSlmRrMQ8yG5hFPTUOo GIjk3dUcZpmTBcZhebIfiQwqIfGYRdQpB9quQvFkQsR4Gtkhr6H47CasnHqEI0uNesvN FafuME14gRx5WTlZYsvP/Ah+i5clMLCGYJzN8ifBjmHVIm9ZRjZFXq6WjJ9HvDsvmXtv 9dnmJnli/N9GvQcRsJbeq7Su0z8YtnczCHDGB2quF3yvpplf6kPD3+2muydd7pm19qZ9 boSA== X-Gm-Message-State: AIkVDXJ+w4BOicpXza4ZS4WCVIQQrNs/6lX6Ofju9+K2ClkuX2rMpDk0wwSl0tFTqnyUsucO X-Received: by 10.157.5.161 with SMTP id 30mr1789612otd.74.1485970316096; Wed, 01 Feb 2017 09:31:56 -0800 (PST) Received: from localhost ([2602:306:3406:6500:9818:4608:a55b:37e]) by smtp.gmail.com with ESMTPSA id r130sm10718114oif.20.2017.02.01.09.31.55 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Wed, 01 Feb 2017 09:31:55 -0800 (PST) From: Andy Gross To: linux-arm-kernel@lists.infradead.org Cc: lorenzo.pieralisi@arm.com, linux-arm-msm@vger.kernel.org, will.deacon@arm.com, linux-kernel@vger.kernel.org, Bjorn Andersson , Kevin Hilman , Olof Johansson , linux@armlinux.org.uk, Andy Gross Subject: [Patch v6 1/2] arm: kernel: Add SMC structure parameter Date: Wed, 1 Feb 2017 11:28:27 -0600 Message-Id: <1485970108-14177-2-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1485970108-14177-1-git-send-email-andy.gross@linaro.org> References: <1485970108-14177-1-git-send-email-andy.gross@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds a quirk parameter to the arm_smccc_(smc/hvc) calls. The quirk structure allows for specialized SMC operations due to SoC specific requirements. The current arm_smccc_(smc/hvc) is renamed and macros are used instead to specify the standard arm_smccc_(smc/hvc) or the arm_smccc_(smc/hvc)_quirk function. This patch and partial implementation was suggested by Will Deacon. Signed-off-by: Andy Gross Reviewed-by: Will Deacon --- arch/arm/kernel/armksyms.c | 4 ++-- arch/arm/kernel/smccc-call.S | 14 ++++++++------ arch/arm64/kernel/arm64ksyms.c | 4 ++-- arch/arm64/kernel/asm-offsets.c | 7 +++++-- arch/arm64/kernel/smccc-call.S | 14 ++++++++------ include/linux/arm-smccc.h | 40 ++++++++++++++++++++++++++++++++-------- 6 files changed, 57 insertions(+), 26 deletions(-) -- 1.9.1 diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index 7e45f69..8e8d20c 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -178,6 +178,6 @@ #endif #ifdef CONFIG_HAVE_ARM_SMCCC -EXPORT_SYMBOL(arm_smccc_smc); -EXPORT_SYMBOL(arm_smccc_hvc); +EXPORT_SYMBOL(__arm_smccc_smc); +EXPORT_SYMBOL(__arm_smccc_hvc); #endif diff --git a/arch/arm/kernel/smccc-call.S b/arch/arm/kernel/smccc-call.S index 2e48b67..e5d4306 100644 --- a/arch/arm/kernel/smccc-call.S +++ b/arch/arm/kernel/smccc-call.S @@ -46,17 +46,19 @@ UNWIND( .fnend) /* * void smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, * unsigned long a3, unsigned long a4, unsigned long a5, - * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) + * unsigned long a6, unsigned long a7, struct arm_smccc_res *res, + * struct arm_smccc_quirk *quirk) */ -ENTRY(arm_smccc_smc) +ENTRY(__arm_smccc_smc) SMCCC SMCCC_SMC -ENDPROC(arm_smccc_smc) +ENDPROC(__arm_smccc_smc) /* * void smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, * unsigned long a3, unsigned long a4, unsigned long a5, - * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) + * unsigned long a6, unsigned long a7, struct arm_smccc_res *res, + * struct arm_smccc_quirk *quirk) */ -ENTRY(arm_smccc_hvc) +ENTRY(__arm_smccc_hvc) SMCCC SMCCC_HVC -ENDPROC(arm_smccc_hvc) +ENDPROC(__arm_smccc_hvc) diff --git a/arch/arm64/kernel/arm64ksyms.c b/arch/arm64/kernel/arm64ksyms.c index 78f3680..e9c4dc9 100644 --- a/arch/arm64/kernel/arm64ksyms.c +++ b/arch/arm64/kernel/arm64ksyms.c @@ -73,5 +73,5 @@ #endif /* arm-smccc */ -EXPORT_SYMBOL(arm_smccc_smc); -EXPORT_SYMBOL(arm_smccc_hvc); +EXPORT_SYMBOL(__arm_smccc_smc); +EXPORT_SYMBOL(__arm_smccc_hvc); diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c index bc049af..b3bb7ef 100644 --- a/arch/arm64/kernel/asm-offsets.c +++ b/arch/arm64/kernel/asm-offsets.c @@ -143,8 +143,11 @@ int main(void) DEFINE(SLEEP_STACK_DATA_SYSTEM_REGS, offsetof(struct sleep_stack_data, system_regs)); DEFINE(SLEEP_STACK_DATA_CALLEE_REGS, offsetof(struct sleep_stack_data, callee_saved_regs)); #endif - DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0)); - DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); + DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0)); + DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); + DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id)); + DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state)); + BLANK(); DEFINE(HIBERN_PBE_ORIG, offsetof(struct pbe, orig_address)); DEFINE(HIBERN_PBE_ADDR, offsetof(struct pbe, address)); diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S index ae0496f..ba60a8c 100644 --- a/arch/arm64/kernel/smccc-call.S +++ b/arch/arm64/kernel/smccc-call.S @@ -27,17 +27,19 @@ /* * void arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, * unsigned long a3, unsigned long a4, unsigned long a5, - * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) + * unsigned long a6, unsigned long a7, struct arm_smccc_res *res, + * struct arm_smccc_quirk *quirk) */ -ENTRY(arm_smccc_smc) +ENTRY(__arm_smccc_smc) SMCCC smc -ENDPROC(arm_smccc_smc) +ENDPROC(__arm_smccc_smc) /* * void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, * unsigned long a3, unsigned long a4, unsigned long a5, - * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) + * unsigned long a6, unsigned long a7, struct arm_smccc_res *res, + * struct arm_smccc_quirk *quirk) */ -ENTRY(arm_smccc_hvc) +ENTRY(__arm_smccc_hvc) SMCCC hvc -ENDPROC(arm_smccc_hvc) +ENDPROC(__arm_smccc_hvc) diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index b5abfda..c66f8ae 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -72,33 +72,57 @@ struct arm_smccc_res { }; /** - * arm_smccc_smc() - make SMC calls + * struct arm_smccc_quirk - Contains quirk information + * @id: quirk identification + * @state: quirk specific information + * @a6: Qualcomm quirk entry for returning post-smc call contents of a6 + */ +struct arm_smccc_quirk { + int id; + union { + unsigned long a6; + } state; +}; + +/** + * __arm_smccc_smc() - make SMC calls * @a0-a7: arguments passed in registers 0 to 7 * @res: result values from registers 0 to 3 + * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. * * This function is used to make SMC calls following SMC Calling Convention. * The content of the supplied param are copied to registers 0 to 7 prior * to the SMC instruction. The return values are updated with the content - * from register 0 to 3 on return from the SMC instruction. + * from register 0 to 3 on return from the SMC instruction. An optional + * quirk structure provides vendor specific behavior. */ -asmlinkage void arm_smccc_smc(unsigned long a0, unsigned long a1, +asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, unsigned long a4, unsigned long a5, unsigned long a6, unsigned long a7, - struct arm_smccc_res *res); + struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); /** - * arm_smccc_hvc() - make HVC calls + * __arm_smccc_hvc() - make HVC calls * @a0-a7: arguments passed in registers 0 to 7 * @res: result values from registers 0 to 3 * * This function is used to make HVC calls following SMC Calling * Convention. The content of the supplied param are copied to registers 0 * to 7 prior to the HVC instruction. The return values are updated with - * the content from register 0 to 3 on return from the HVC instruction. + * the content from register 0 to 3 on return from the HVC instruction. An + * optional quirk structure provides vendor specific behavior. */ -asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1, +asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, unsigned long a3, unsigned long a4, unsigned long a5, unsigned long a6, unsigned long a7, - struct arm_smccc_res *res); + struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); + +#define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL) + +#define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__) + +#define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL) + +#define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__) #endif /*__LINUX_ARM_SMCCC_H*/ From patchwork Wed Feb 1 17:28:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 93078 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp2524712qgi; Wed, 1 Feb 2017 09:32:14 -0800 (PST) X-Received: by 10.84.217.221 with SMTP id d29mr6157599plj.47.1485970334478; Wed, 01 Feb 2017 09:32:14 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h7si19742312plk.119.2017.02.01.09.32.14; Wed, 01 Feb 2017 09:32:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753815AbdBARcG (ORCPT + 25 others); Wed, 1 Feb 2017 12:32:06 -0500 Received: from mail-oi0-f54.google.com ([209.85.218.54]:35452 "EHLO mail-oi0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753748AbdBARcD (ORCPT ); Wed, 1 Feb 2017 12:32:03 -0500 Received: by mail-oi0-f54.google.com with SMTP id j15so238036551oih.2 for ; Wed, 01 Feb 2017 09:32:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/pi5a+9zdTj10LhR1CM7GGBKYrcH6wFDMxH361DnodA=; b=F8pj/eLrjkjJ7w5rxT4dDtNaQebvwuchlBEX4S2QFr0Y08RGCkgwAlr+jz3JlL8aFQ i7JN6Vb5IW+BlWQWWDteVay78q8+wb8sSuFcJYwXzVWabnCSc93aGzUyAQRRFNRibILX 7VBDZdL9yReF4OAyN2m1KzkbT6TiaABYYbj+E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/pi5a+9zdTj10LhR1CM7GGBKYrcH6wFDMxH361DnodA=; b=kgqRdZgR5QyRFlJza9QJ1jh18GD8xBhXr88eJUkXfCtB1onm7IanM1+BNqKPDUMWvn x3P4Rb8oQms7dn6UrKEro87Sy4PCol4fSdlsyz3g6CgUYlgnFBHABroFaTaas1noB+6z JqsOUtAx6K9n3H84emQcspQ1AO+2FdEODwiq9wi7frM0D7C4pdiCfLL3uCPtoC3fycfe 9dlgbFHse6rW99KMRYS3dtC/rs/CuPOmmVXhLHpts9S0HQE+3Ta4YDLEeJhmxYA9sY5q r3paZ5eebFkMN3pBi22CMSmrf2FAlB8Jd7rzTc376/MTFzNrO895T6h+GVFSCaqom2Oh r2rA== X-Gm-Message-State: AIkVDXKayclcCq3r+mNbY1IEM16O5q0ViEyHDPTRSwESE48iujNnNlae0VVlJ04dk0pEoT2X X-Received: by 10.202.87.211 with SMTP id l202mr1751631oib.112.1485970317377; Wed, 01 Feb 2017 09:31:57 -0800 (PST) Received: from localhost ([2602:306:3406:6500:9818:4608:a55b:37e]) by smtp.gmail.com with ESMTPSA id r131sm10924000oib.25.2017.02.01.09.31.56 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Wed, 01 Feb 2017 09:31:56 -0800 (PST) From: Andy Gross To: linux-arm-kernel@lists.infradead.org Cc: lorenzo.pieralisi@arm.com, linux-arm-msm@vger.kernel.org, will.deacon@arm.com, linux-kernel@vger.kernel.org, Bjorn Andersson , Kevin Hilman , Olof Johansson , linux@armlinux.org.uk, Andy Gross Subject: [Patch v6 2/2] firmware: qcom: scm: Fix interrupted SCM calls Date: Wed, 1 Feb 2017 11:28:28 -0600 Message-Id: <1485970108-14177-3-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1485970108-14177-1-git-send-email-andy.gross@linaro.org> References: <1485970108-14177-1-git-send-email-andy.gross@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds a Qualcomm specific quirk to the arm_smccc_smc call. On Qualcomm ARM64 platforms, the SMC call can return before it has completed. If this occurs, the call can be restarted, but it requires using the returned session ID value from the interrupted SMC call. The quirk stores off the session ID from the interrupted call in the quirk structure so that it can be used by the caller. This patch folds in a fix given by Sricharan R: https://lkml.org/lkml/2016/9/28/272 Signed-off-by: Andy Gross Reviewed-by: Will Deacon --- arch/arm64/kernel/smccc-call.S | 9 ++++++++- drivers/firmware/qcom_scm-64.c | 13 ++++++++++--- include/linux/arm-smccc.h | 11 ++++++++--- 3 files changed, 26 insertions(+), 7 deletions(-) -- 1.9.1 diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S index ba60a8c..6252234 100644 --- a/arch/arm64/kernel/smccc-call.S +++ b/arch/arm64/kernel/smccc-call.S @@ -12,6 +12,7 @@ * */ #include +#include #include .macro SMCCC instr @@ -20,7 +21,13 @@ ldr x4, [sp] stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS] stp x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS] - ret + ldr x4, [sp, #8] + cbz x4, 1f /* no quirk structure */ + ldr x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS] + cmp x9, #ARM_SMCCC_QUIRK_QCOM_A6 + b.ne 1f + str x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS] +1: ret .cfi_endproc .endm diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c index 4a0f5ea..1e2e519 100644 --- a/drivers/firmware/qcom_scm-64.c +++ b/drivers/firmware/qcom_scm-64.c @@ -91,6 +91,7 @@ static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id, dma_addr_t args_phys = 0; void *args_virt = NULL; size_t alloc_len; + struct arm_smccc_quirk quirk = {.id = ARM_SMCCC_QUIRK_QCOM_A6}; if (unlikely(arglen > N_REGISTER_ARGS)) { alloc_len = N_EXT_QCOM_SCM_ARGS * sizeof(u64); @@ -131,10 +132,16 @@ static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id, qcom_smccc_convention, ARM_SMCCC_OWNER_SIP, fn_id); + quirk.state.a6 = 0; + do { - arm_smccc_smc(cmd, desc->arginfo, desc->args[0], - desc->args[1], desc->args[2], x5, 0, 0, - res); + arm_smccc_smc_quirk(cmd, desc->arginfo, desc->args[0], + desc->args[1], desc->args[2], x5, + quirk.state.a6, 0, res, &quirk); + + if (res->a0 == QCOM_SCM_INTERRUPTED) + cmd = res->a0; + } while (res->a0 == QCOM_SCM_INTERRUPTED); mutex_unlock(&qcom_scm_lock); diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index c66f8ae..b679341 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -14,9 +14,6 @@ #ifndef __LINUX_ARM_SMCCC_H #define __LINUX_ARM_SMCCC_H -#include -#include - /* * This file provides common defines for ARM SMC Calling Convention as * specified in @@ -60,6 +57,13 @@ #define ARM_SMCCC_OWNER_TRUSTED_OS 50 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 +#define ARM_SMCCC_QUIRK_NONE 0 +#define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ + +#ifndef __ASSEMBLY__ + +#include +#include /** * struct arm_smccc_res - Result from SMC/HVC call * @a0-a3 result values from registers 0 to 3 @@ -125,4 +129,5 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1, #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__) +#endif /*__ASSEMBLY__*/ #endif /*__LINUX_ARM_SMCCC_H*/