From patchwork Fri Jun 26 15:43:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Gupta X-Patchwork-Id: 198430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA219C433E0 for ; Fri, 26 Jun 2020 15:44:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BC75720706 for ; Fri, 26 Jun 2020 15:44:23 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="SJss+3SV" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729932AbgFZPoS (ORCPT ); Fri, 26 Jun 2020 11:44:18 -0400 Received: from hqnvemgate24.nvidia.com ([216.228.121.143]:7404 "EHLO hqnvemgate24.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726895AbgFZPoS (ORCPT ); Fri, 26 Jun 2020 11:44:18 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate24.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 26 Jun 2020 08:42:43 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 26 Jun 2020 08:44:18 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 26 Jun 2020 08:44:18 -0700 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 26 Jun 2020 15:44:14 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Fri, 26 Jun 2020 15:44:14 +0000 Received: from sumitg-l4t.nvidia.com (Not Verified[10.24.37.103]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Fri, 26 Jun 2020 08:44:13 -0700 From: Sumit Gupta To: , , , , , , , , , , , , CC: , , Subject: [TEGRA194_CPUFREQ PATCH v4 2/4] arm64: tegra: Add t194 ccplex compatible and bpmp property Date: Fri, 26 Jun 2020 21:13:54 +0530 Message-ID: <1593186236-12760-3-git-send-email-sumitg@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593186236-12760-1-git-send-email-sumitg@nvidia.com> References: <1593186236-12760-1-git-send-email-sumitg@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1593186163; bh=TpthJr1iU0Z8U18qrY6XTkSfu4UJS8h2L2M4yxyYoSY=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=SJss+3SVYoVyw3hk76qQCnfqfE3+M6RmWd8wKhQf87N+OFvV3m3w4jAweaSg1n9fQ LMs5r2abT3NQSTVHKnmHUPTBTGj54e2UxuNR/6iSs3PNnYiJCd96kTAC5BqGKpdtge rGY+wDH6nskrRPgDtt3LiNMw/uCOD6bht2CT3MgiTx4yavuPLHiOuqTHcU12R7gHXy Dcgt0avZyMSi5gvQ9aNF94IFnJnfKFX2mu33SVPsKOFNXIeh5hLIWqHLwEk8aOjS25 iUBbUShiDXBEL8yAGWkSm61wyi1b6AWL0hzlTaPlUlOkRXlBlV7i3u4LSh9S4c1bkv em9koXVuenJCw== Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Tegra194, data on valid operating points for the CPUs needs to be queried from BPMP. In T194, there is no node representing CPU complex. So, add compatible string to the 'cpus' node instead of using dummy node to bind cpufreq driver. Also, add reference to the BPMP instance for the CPU complex. Signed-off-by: Sumit Gupta --- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 7c9511a..0abf287 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -1764,6 +1764,8 @@ }; cpus { + compatible = "nvidia,tegra194-ccplex"; + nvidia,bpmp = <&bpmp>; #address-cells = <1>; #size-cells = <0>; From patchwork Fri Jun 26 15:43:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sumit Gupta X-Patchwork-Id: 198429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 419B4C433E1 for ; Fri, 26 Jun 2020 15:44:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 161BC20836 for ; Fri, 26 Jun 2020 15:44:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="XetReN6S" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729957AbgFZPoa (ORCPT ); Fri, 26 Jun 2020 11:44:30 -0400 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:2853 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726895AbgFZPo3 (ORCPT ); Fri, 26 Jun 2020 11:44:29 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 26 Jun 2020 08:44:16 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 26 Jun 2020 08:44:29 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 26 Jun 2020 08:44:29 -0700 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 26 Jun 2020 15:44:24 +0000 Received: from hqnvemgw03.nvidia.com (10.124.88.68) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Fri, 26 Jun 2020 15:44:24 +0000 Received: from sumitg-l4t.nvidia.com (Not Verified[10.24.37.103]) by hqnvemgw03.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Fri, 26 Jun 2020 08:44:24 -0700 From: Sumit Gupta To: , , , , , , , , , , , , CC: , , Subject: [TEGRA194_CPUFREQ PATCH v4 4/4] arm64: defconfig: Enable CONFIG_ARM_TEGRA194_CPUFREQ Date: Fri, 26 Jun 2020 21:13:56 +0530 Message-ID: <1593186236-12760-5-git-send-email-sumitg@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593186236-12760-1-git-send-email-sumitg@nvidia.com> References: <1593186236-12760-1-git-send-email-sumitg@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1593186256; bh=lHNVU7VOn42qEJNEwY78N3Q41Uu/bIGWrHx8p5IG6bc=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=XetReN6SVVpms5zHvzqZwInTLvW1WTJBJVn8Ye3ndTK7P7KkinQg1Jnm6ebQfq/Mv zp7poCYHjjUWnmLtknDwFSFG4/2ooq1wcg7X8LCymLpKGb0cEDMEaPGD2zNYyiX1kG JwISV+6wXDleyPguI9VYp3KQUv3o7B3kNJdeFWQRKPR31ySOH7rE4NTYLmSVkK8OY/ YvuXjxeDQECztl4B2/rfDqP2D5M71VhIQGHJl4gGmBwKcc/Vx2JLUN9cThB56EE8Hs rHt+gx6/6XrhvuHBt+5hhRsYwuUVOB1mTJ7IRtgAGRoUW1LHrApQ82mMXZxSdGdSqb 9CbF/5HM5W7Wg== Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable Tegra194 CPU frequency scaling support by default. Signed-off-by: Sumit Gupta --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index f9d378d..385bd35 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -91,6 +91,7 @@ CONFIG_ARM_QCOM_CPUFREQ_NVMEM=y CONFIG_ARM_QCOM_CPUFREQ_HW=y CONFIG_ARM_RASPBERRYPI_CPUFREQ=m CONFIG_ARM_TEGRA186_CPUFREQ=y +CONFIG_ARM_TEGRA194_CPUFREQ=y CONFIG_QORIQ_CPUFREQ=y CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_RASPBERRYPI_FIRMWARE=y