From patchwork Sun Aug 13 15:11:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 109955 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp3298748qge; Sun, 13 Aug 2017 08:12:03 -0700 (PDT) X-Received: by 10.99.5.135 with SMTP id 129mr14221288pgf.298.1502637123171; Sun, 13 Aug 2017 08:12:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1502637123; cv=none; d=google.com; s=arc-20160816; b=vxeTXcF3lgod3lKXwJfXbPRLyeWYIx9SfOArnMCjPfjUKlFFVXL3z4jMw78rcXJq+T wqc+9ZrFsf6D56G7O+svtDVWuDgYzVAzbkAAvhkM0ZNkxTsYsHA6rFWAHnDCOSNjwE9D zjYLCjdfquqSs+CKQRHT7zt8ZFEhhlwnSU8aE9T3ZKLhxwByq10nyv3XgBNwAdhdi+8N KRYYpVIRYmeHnRSUsb9FGCGf9aBmqycc7av9l2B9YzhkxBnFK0WFxfoFaE3PjCX1z81G fecDPE5LK08h4RxvQ6zVIUklJmQ0GDeUQZm5QJ0/JibjUy42lKu0qWY74TIke/6T8bZ1 r/ew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to :arc-authentication-results; bh=6S8kUvB1vX6CQWDWt9BVRWq6LOWfiQxdoOSqSz9RTzY=; b=qn8uyx1OtPPtuIHW+hcv4p7tH8JM2L4sx07RIl3AqP2aNqft0bzEOAGCmHkzs9S0P3 /k2RyAEBpdyzIRbToYE/dSxuVQ7VUoo5lRywTuWshBry5zvj1j44ghNoGYhGGBNtky7k nLta+X5XVD5WOxsarojzcxzbx6LLtoXZjP+vfNZtES8wodR/m1rHrjK/zOPuDolKAQTf t4FDxgY55xIyK3AONjnYn+alVebLqGsOqCG4aFUA+F611cpL6zDfRdp+Hy/b4jra5K9o e3XcWMgVs5GDT5pzUAguMv+OQKZw/d4eHwJBFwz1YCtwcHamZ7zOgaWK/vEaOIdK2Jyq FgpQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=inEAtDRa; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id 65si3393425pld.896.2017.08.13.08.12.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 13 Aug 2017 08:12:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=inEAtDRa; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DC1D16E058; Sun, 13 Aug 2017 15:12:01 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x229.google.com (mail-lf0-x229.google.com [IPv6:2a00:1450:4010:c07::229]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4DD5B6E058 for ; Sun, 13 Aug 2017 15:12:00 +0000 (UTC) Received: by mail-lf0-x229.google.com with SMTP id y15so31328910lfd.5 for ; Sun, 13 Aug 2017 08:12:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3wt4HjoN+5FbMRujUmxA1g9siOe7u96UC+huyJQbWU0=; b=inEAtDRaGIa1SxnEyBO9ifY4nTLRa4KiGxPw9BGI3OOqQDPYEpHYoTyAj5QlUeotsd /jk6kovdjrDrpQRyI4t/Ke9yuGv6BTggVAd01tXPRnoJVDnvpXR3R6GJiPMovou87y7n bDizll5zQVbR0zoiUjEdQ9JhWh3e0dhmSnr+Q= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3wt4HjoN+5FbMRujUmxA1g9siOe7u96UC+huyJQbWU0=; b=TLsdgYGGXhovCqYNakeiqVHyA+x5zu9P4gQfB21OGdPP6KDrvEja29FUJpNtwDuG8M qcjboISLPj8A47VVvTAprg7tTwILfhu7Q7ObTOTl6HVFX/PnHf8IhqEmtN1vqe4nzYvL Gt6KyeQ/XGImUB1ike1exIkg0hs5q3Y0uckA2g5WEhFLloYDfjR3CMbLBj3Cesz67ds2 SosC34kDgP0H3enFJnWMS8oHf/qT/UHS+VDovt2C/CFxsRUZUYWbP8rbZ6RcmmOEY0Iv jJSk6kzvbi+FgWqhj/H07CI9xU+s0eKGtjscaTer5mEaKfGzSQjTn48Kjv8ACMAp4qK/ GTuw== X-Gm-Message-State: AHYfb5gelDbhtsxcgfBFpbfdGCeorFy3eYU98reomcBNul1GNiv+wpz7 VrlcyiFmuzkGM3LrTEil1g== X-Received: by 10.46.21.72 with SMTP id 8mr7237318ljv.115.1502637117724; Sun, 13 Aug 2017 08:11:57 -0700 (PDT) Received: from fabina.bredbandsbolaget.se (c-277e71d5.014-348-6c756e10.cust.bredbandsbolaget.se. [213.113.126.39]) by smtp.gmail.com with ESMTPSA id e195sm1064062lfg.17.2017.08.13.08.11.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 13 Aug 2017 08:11:56 -0700 (PDT) From: Linus Walleij To: dri-devel@lists.freedesktop.org, Eric Anholt , Daniel Vetter , Jani Nikula , Sean Paul Subject: [PATCH 2/4] drm/tve200: Add new driver for TVE200 Date: Sun, 13 Aug 2017 17:11:30 +0200 Message-Id: <20170813151132.24736-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.4 In-Reply-To: <20170813151132.24736-1-linus.walleij@linaro.org> References: <20170813151132.24736-1-linus.walleij@linaro.org> Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This adds a new DRM driver for the Faraday Technology TVE200 block. This "TV Encoder" encodes a ITU-T BT.656 stream and can be found in the StorLink SL3516 (later Cortina Systems CS3516) as well as the Grain Media GM8180. I do not have definitive word from anyone at Faraday that this IP block is theirs, but it bears the hallmark of their 3-digit version code (200) and is used in two SoCs from completely different companies. (Grain Media was fully owned by Faraday until it was transferred to NovoTek this january, and Faraday did lots of work on the StorLink SoCs.) The D-Link DIR-685 uses this in connection with the Ilitek ILI9322 panel driver that supports BT.656 input, while the GM8180 apparently has been used with the Cirrus Logic CS4954 digital video encoder. The oldest user seems to be something called Techwall 2835. This driver is heavily inspired by Eric Anholt's PL111 driver and therefore I have mentioned all the ancestor authors in the header file. Signed-off-by: Linus Walleij Acked-by: Daniel Vetter Reviewed-by: Eric Anholt --- Documentation/gpu/index.rst | 1 + Documentation/gpu/tve200.rst | 6 + MAINTAINERS | 6 + drivers/gpu/drm/Kconfig | 2 + drivers/gpu/drm/Makefile | 1 + drivers/gpu/drm/tve200/Kconfig | 15 ++ drivers/gpu/drm/tve200/Makefile | 5 + drivers/gpu/drm/tve200/tve200_connector.c | 126 +++++++++++ drivers/gpu/drm/tve200/tve200_display.c | 346 ++++++++++++++++++++++++++++++ drivers/gpu/drm/tve200/tve200_drm.h | 129 +++++++++++ drivers/gpu/drm/tve200/tve200_drv.c | 277 ++++++++++++++++++++++++ 11 files changed, 914 insertions(+) create mode 100644 Documentation/gpu/tve200.rst create mode 100644 drivers/gpu/drm/tve200/Kconfig create mode 100644 drivers/gpu/drm/tve200/Makefile create mode 100644 drivers/gpu/drm/tve200/tve200_connector.c create mode 100644 drivers/gpu/drm/tve200/tve200_display.c create mode 100644 drivers/gpu/drm/tve200/tve200_drm.h create mode 100644 drivers/gpu/drm/tve200/tve200_drv.c diff --git a/Documentation/gpu/index.rst b/Documentation/gpu/index.rst index 35d673bf9b56..c36586dad29d 100644 --- a/Documentation/gpu/index.rst +++ b/Documentation/gpu/index.rst @@ -15,6 +15,7 @@ Linux GPU Driver Developer's Guide pl111 tegra tinydrm + tve200 vc4 vga-switcheroo vgaarbiter diff --git a/Documentation/gpu/tve200.rst b/Documentation/gpu/tve200.rst new file mode 100644 index 000000000000..69b17b324e12 --- /dev/null +++ b/Documentation/gpu/tve200.rst @@ -0,0 +1,6 @@ +================================== + drm/tve200 Faraday TV Encoder 200 +================================== + +.. kernel-doc:: drivers/gpu/drm/tve200/tve200_drv.c + :doc: Faraday TV Encoder 200 diff --git a/MAINTAINERS b/MAINTAINERS index e87cba115ea4..c3d42d68253a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4305,6 +4305,12 @@ T: git git://anongit.freedesktop.org/drm/drm-misc S: Maintained F: drivers/gpu/drm/bochs/ +DRM DRIVER FOR FARADAY TVE200 TV ENCODER +M: Linus Walleij +T: git git://anongit.freedesktop.org/drm/drm-misc +S: Maintained +F: drivers/gpu/drm/tve200/ + DRM DRIVER FOR INTEL I810 VIDEO CARDS S: Orphan / Obsolete F: drivers/gpu/drm/i810/ diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 83cb2a88c204..c5e1a8409285 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig @@ -278,6 +278,8 @@ source "drivers/gpu/drm/tinydrm/Kconfig" source "drivers/gpu/drm/pl111/Kconfig" +source "drivers/gpu/drm/tve200/Kconfig" + # Keep legacy drivers last menuconfig DRM_LEGACY diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile index 24a066e1841c..cc81813e2238 100644 --- a/drivers/gpu/drm/Makefile +++ b/drivers/gpu/drm/Makefile @@ -100,3 +100,4 @@ obj-$(CONFIG_DRM_ZTE) += zte/ obj-$(CONFIG_DRM_MXSFB) += mxsfb/ obj-$(CONFIG_DRM_TINYDRM) += tinydrm/ obj-$(CONFIG_DRM_PL111) += pl111/ +obj-$(CONFIG_DRM_TVE200) += tve200/ diff --git a/drivers/gpu/drm/tve200/Kconfig b/drivers/gpu/drm/tve200/Kconfig new file mode 100644 index 000000000000..21d9841ddb88 --- /dev/null +++ b/drivers/gpu/drm/tve200/Kconfig @@ -0,0 +1,15 @@ +config DRM_TVE200 + tristate "DRM Support for Faraday TV Encoder TVE200" + depends on DRM + depends on CMA + depends on ARM || COMPILE_TEST + depends on OF + select DRM_PANEL + select DRM_KMS_HELPER + select DRM_KMS_CMA_HELPER + select DRM_GEM_CMA_HELPER + select VT_HW_CONSOLE_BINDING if FRAMEBUFFER_CONSOLE + help + Choose this option for DRM support for the Faraday TV Encoder + TVE200 Controller. + If M is selected the module will be called tve200_drm. diff --git a/drivers/gpu/drm/tve200/Makefile b/drivers/gpu/drm/tve200/Makefile new file mode 100644 index 000000000000..a9dba54f7ee5 --- /dev/null +++ b/drivers/gpu/drm/tve200/Makefile @@ -0,0 +1,5 @@ +tve200_drm-y += tve200_connector.o \ + tve200_display.o \ + tve200_drv.o + +obj-$(CONFIG_DRM_TVE200) += tve200_drm.o diff --git a/drivers/gpu/drm/tve200/tve200_connector.c b/drivers/gpu/drm/tve200/tve200_connector.c new file mode 100644 index 000000000000..93e99156d375 --- /dev/null +++ b/drivers/gpu/drm/tve200/tve200_connector.c @@ -0,0 +1,126 @@ +/* + * Copyright (C) 2017 Linus Walleij + * Parts of this file were based on sources as follows: + * + * Copyright (C) 2006-2008 Intel Corporation + * Copyright (C) 2007 Amos Lee + * Copyright (C) 2007 Dave Airlie + * Copyright (C) 2011 Texas Instruments + * Copyright (C) 2017 Eric Anholt + * + * This program is free software and is provided to you under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation, and any use by you of this program is subject to the terms of + * such GNU licence. + */ + +/** + * tve200_drm_connector.c + * Implementation of the connector functions for the Faraday TV Encoder + */ +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "tve200_drm.h" + +static void tve200_connector_destroy(struct drm_connector *connector) +{ + struct tve200_drm_connector *tve200con = + to_tve200_connector(connector); + + if (tve200con->panel) + drm_panel_detach(tve200con->panel); + + drm_connector_unregister(connector); + drm_connector_cleanup(connector); +} + +static enum drm_connector_status tve200_connector_detect(struct drm_connector + *connector, bool force) +{ + struct tve200_drm_connector *tve200con = + to_tve200_connector(connector); + + return (tve200con->panel ? + connector_status_connected : + connector_status_disconnected); +} + +static int tve200_connector_helper_get_modes(struct drm_connector *connector) +{ + struct tve200_drm_connector *tve200con = + to_tve200_connector(connector); + + if (!tve200con->panel) + return 0; + + return drm_panel_get_modes(tve200con->panel); +} + +static const struct drm_connector_funcs connector_funcs = { + .fill_modes = drm_helper_probe_single_connector_modes, + .destroy = tve200_connector_destroy, + .detect = tve200_connector_detect, + .dpms = drm_atomic_helper_connector_dpms, + .reset = drm_atomic_helper_connector_reset, + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, +}; + +static const struct drm_connector_helper_funcs connector_helper_funcs = { + .get_modes = tve200_connector_helper_get_modes, +}; + +/* + * Walks the OF graph to find the panel node and then asks DRM to look + * up the panel. + */ +static struct drm_panel *tve200_get_panel(struct device *dev) +{ + struct device_node *endpoint, *panel_node; + struct device_node *np = dev->of_node; + struct drm_panel *panel; + + endpoint = of_graph_get_next_endpoint(np, NULL); + if (!endpoint) { + dev_err(dev, "no endpoint to fetch panel\n"); + return NULL; + } + + /* Don't proceed if we have an endpoint but no panel_node tied to it */ + panel_node = of_graph_get_remote_port_parent(endpoint); + of_node_put(endpoint); + if (!panel_node) { + dev_err(dev, "no valid panel node\n"); + return NULL; + } + + panel = of_drm_find_panel(panel_node); + of_node_put(panel_node); + + return panel; +} + +int tve200_connector_init(struct drm_device *dev) +{ + struct tve200_drm_dev_private *priv = dev->dev_private; + struct tve200_drm_connector *tve200con = &priv->connector; + struct drm_connector *connector = &tve200con->connector; + + drm_connector_init(dev, connector, &connector_funcs, + DRM_MODE_CONNECTOR_DPI); + drm_connector_helper_add(connector, &connector_helper_funcs); + + tve200con->panel = tve200_get_panel(dev->dev); + if (tve200con->panel) + drm_panel_attach(tve200con->panel, connector); + + return 0; +} diff --git a/drivers/gpu/drm/tve200/tve200_display.c b/drivers/gpu/drm/tve200/tve200_display.c new file mode 100644 index 000000000000..027553aacb33 --- /dev/null +++ b/drivers/gpu/drm/tve200/tve200_display.c @@ -0,0 +1,346 @@ +/* + * Copyright (C) 2017 Linus Walleij + * Parts of this file were based on sources as follows: + * + * Copyright (C) 2006-2008 Intel Corporation + * Copyright (C) 2007 Amos Lee + * Copyright (C) 2007 Dave Airlie + * Copyright (C) 2011 Texas Instruments + * Copyright (C) 2017 Eric Anholt + * + * This program is free software and is provided to you under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation, and any use by you of this program is subject to the terms of + * such GNU licence. + */ +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "tve200_drm.h" + +irqreturn_t tve200_irq(int irq, void *data) +{ + struct tve200_drm_dev_private *priv = data; + u32 stat; + u32 val; + + stat = readl(priv->regs + TVE200_INT_STAT); + + if (!stat) + return IRQ_NONE; + + /* + * Vblank IRQ + * + * The hardware is a bit tilted: the line stays high after clearing + * the vblank IRQ, fireing many more interrupts. We counter this + * by toggling the IRQ back and forth from fireing at vblank and + * fireing at start of active image, which works around the problem + * since those occur strictly in sequence, and we get two IRQs for each + * frame, one at start of Vblank (that we make call into the CRTC) and + * another one at the start of the image (that we discard). + */ + if (stat & TVE200_INT_V_STATUS) { + val = readl(priv->regs + TVE200_CTRL); + /* We have an actual start of vsync */ + if (!(val & TVE200_VSTSTYPE_BITS)) { + drm_crtc_handle_vblank(&priv->pipe.crtc); + /* Toggle trigger to start of active image */ + val |= TVE200_VSTSTYPE_VAI; + } else { + /* Toggle trigger back to start of vsync */ + val &= ~TVE200_VSTSTYPE_BITS; + } + writel(val, priv->regs + TVE200_CTRL); + } else + dev_err(priv->drm->dev, "stray IRQ %08x\n", stat); + + /* Clear the interrupt once done */ + writel(stat, priv->regs + TVE200_INT_CLR); + + return IRQ_HANDLED; +} + +static int tve200_display_check(struct drm_simple_display_pipe *pipe, + struct drm_plane_state *pstate, + struct drm_crtc_state *cstate) +{ + const struct drm_display_mode *mode = &cstate->mode; + struct drm_framebuffer *old_fb = pipe->plane.state->fb; + struct drm_framebuffer *fb = pstate->fb; + struct drm_connector *connector = pipe->connector; + struct drm_device *drm = connector->dev; + + /* + * We support these specific resolutions and nothing else. + */ + if (!(mode->hdisplay == 352 && mode->vdisplay == 240) && /* SIF(525) */ + !(mode->hdisplay == 352 && mode->vdisplay == 288) && /* CIF(625) */ + !(mode->hdisplay == 640 && mode->vdisplay == 480) && /* VGA */ + !(mode->hdisplay == 720 && mode->vdisplay == 480) && /* D1 */ + !(mode->hdisplay == 720 && mode->vdisplay == 576)) { /* D1 */ + dev_err(drm->dev, "unsupported display mode (%u x %u)\n", + mode->hdisplay, mode->vdisplay); + return -EINVAL; + } + + if (fb) { + u32 offset = drm_fb_cma_get_gem_addr(fb, pstate, 0); + + /* FB base address must be dword aligned. */ + if (offset & 3) { + dev_err(drm->dev, "FB not 32-bit aligned\n"); + return -EINVAL; + } + + /* + * There's no pitch register, the mode's hdisplay + * controls this. + */ + if (fb->pitches[0] != mode->hdisplay * fb->format->cpp[0]) { + dev_err(drm->dev, "can't handle pitches\n"); + return -EINVAL; + } + + /* + * We can't change the FB format in a flicker-free + * manner (and only update it during CRTC enable). + */ + if (old_fb && old_fb->format != fb->format) + cstate->mode_changed = true; + } + + return 0; +} + +static void tve200_display_enable(struct drm_simple_display_pipe *pipe, + struct drm_crtc_state *cstate) +{ + struct drm_crtc *crtc = &pipe->crtc; + struct drm_plane *plane = &pipe->plane; + struct drm_device *drm = crtc->dev; + struct tve200_drm_dev_private *priv = drm->dev_private; + const struct drm_display_mode *mode = &cstate->mode; + struct drm_framebuffer *fb = plane->state->fb; + struct drm_connector *connector = &priv->connector.connector; + u32 format = fb->format->format; + u32 ctrl1 = 0; + + clk_prepare_enable(priv->clk); + + /* Function 1 */ + ctrl1 |= TVE200_CTRL_CSMODE; + /* Interlace mode for CCIR656: parameterize? */ + ctrl1 |= TVE200_CTRL_NONINTERLACE; + /* 32 words per burst */ + ctrl1 |= TVE200_CTRL_BURST_32_WORDS; + /* 16 retries */ + ctrl1 |= TVE200_CTRL_RETRYCNT_16; + /* NTSC mode: parametrize? */ + ctrl1 |= TVE200_CTRL_NTSC; + + /* Vsync IRQ at start of Vsync at first */ + ctrl1 |= TVE200_VSTSTYPE_VSYNC; + + if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE) + ctrl1 |= TVE200_CTRL_TVCLKP; + + if ((mode->hdisplay == 352 && mode->vdisplay == 240) || /* SIF(525) */ + (mode->hdisplay == 352 && mode->vdisplay == 288)) { /* CIF(625) */ + ctrl1 |= TVE200_CTRL_IPRESOL_CIF; + dev_info(drm->dev, "CIF mode\n"); + } else if (mode->hdisplay == 640 && mode->vdisplay == 480) { + ctrl1 |= TVE200_CTRL_IPRESOL_VGA; + dev_info(drm->dev, "VGA mode\n"); + } else if ((mode->hdisplay == 720 && mode->vdisplay == 480) || + (mode->hdisplay == 720 && mode->vdisplay == 576)) { + ctrl1 |= TVE200_CTRL_IPRESOL_D1; + dev_info(drm->dev, "D1 mode\n"); + } + + if (format & DRM_FORMAT_BIG_ENDIAN) { + ctrl1 |= TVE200_CTRL_BBBP; + format &= ~DRM_FORMAT_BIG_ENDIAN; + } + + switch (format) { + case DRM_FORMAT_XRGB8888: + ctrl1 |= TVE200_IPDMOD_RGB888; + break; + case DRM_FORMAT_RGB565: + ctrl1 |= TVE200_IPDMOD_RGB565; + break; + case DRM_FORMAT_XRGB1555: + ctrl1 |= TVE200_IPDMOD_RGB555; + break; + case DRM_FORMAT_XBGR8888: + ctrl1 |= TVE200_IPDMOD_RGB888 | TVE200_BGR; + break; + case DRM_FORMAT_BGR565: + ctrl1 |= TVE200_IPDMOD_RGB565 | TVE200_BGR; + break; + case DRM_FORMAT_XBGR1555: + ctrl1 |= TVE200_IPDMOD_RGB555 | TVE200_BGR; + break; + case DRM_FORMAT_YUYV: + ctrl1 |= TVE200_IPDMOD_YUV422; + ctrl1 |= TVE200_CTRL_YCBCRODR_CR0Y1CB0Y0; + break; + case DRM_FORMAT_YVYU: + ctrl1 |= TVE200_IPDMOD_YUV422; + ctrl1 |= TVE200_CTRL_YCBCRODR_CB0Y1CR0Y0; + break; + case DRM_FORMAT_UYVY: + ctrl1 |= TVE200_IPDMOD_YUV422; + ctrl1 |= TVE200_CTRL_YCBCRODR_Y1CR0Y0CB0; + break; + case DRM_FORMAT_VYUY: + ctrl1 |= TVE200_IPDMOD_YUV422; + ctrl1 |= TVE200_CTRL_YCBCRODR_Y1CB0Y0CR0; + break; + case DRM_FORMAT_YUV420: + ctrl1 |= TVE200_CTRL_YUV420; + ctrl1 |= TVE200_IPDMOD_YUV420; + break; + default: + dev_err(drm->dev, "Unknown FB format 0x%08x\n", + fb->format->format); + break; + } + + ctrl1 |= TVE200_TVEEN; + + drm_panel_prepare(priv->connector.panel); + + /* Turn it on */ + writel(ctrl1, priv->regs + TVE200_CTRL); + + drm_panel_enable(priv->connector.panel); + + drm_crtc_vblank_on(crtc); +} + +void tve200_display_disable(struct drm_simple_display_pipe *pipe) +{ + struct drm_crtc *crtc = &pipe->crtc; + struct drm_device *drm = crtc->dev; + struct tve200_drm_dev_private *priv = drm->dev_private; + + drm_crtc_vblank_off(crtc); + + drm_panel_disable(priv->connector.panel); + + /* Disable and Power Down */ + writel(0, priv->regs + TVE200_CTRL); + + drm_panel_unprepare(priv->connector.panel); + + clk_disable_unprepare(priv->clk); +} + +static void tve200_display_update(struct drm_simple_display_pipe *pipe, + struct drm_plane_state *old_pstate) +{ + struct drm_crtc *crtc = &pipe->crtc; + struct drm_device *drm = crtc->dev; + struct tve200_drm_dev_private *priv = drm->dev_private; + struct drm_pending_vblank_event *event = crtc->state->event; + struct drm_plane *plane = &pipe->plane; + struct drm_plane_state *pstate = plane->state; + struct drm_framebuffer *fb = pstate->fb; + + if (fb) { + /* For RGB, the Y component is used as base address */ + writel(drm_fb_cma_get_gem_addr(fb, pstate, 0), + priv->regs + TVE200_Y_FRAME_BASE_ADDR); + + /* For three plane YUV we need two more addresses */ + if (fb->format->format == DRM_FORMAT_YUV420) { + writel(drm_fb_cma_get_gem_addr(fb, pstate, 1), + priv->regs + TVE200_U_FRAME_BASE_ADDR); + writel(drm_fb_cma_get_gem_addr(fb, pstate, 2), + priv->regs + TVE200_V_FRAME_BASE_ADDR); + } + } + + if (event) { + crtc->state->event = NULL; + + spin_lock_irq(&crtc->dev->event_lock); + if (crtc->state->active && drm_crtc_vblank_get(crtc) == 0) + drm_crtc_arm_vblank_event(crtc, event); + else + drm_crtc_send_vblank_event(crtc, event); + spin_unlock_irq(&crtc->dev->event_lock); + } +} + +int tve200_enable_vblank(struct drm_device *drm, unsigned int crtc) +{ + struct tve200_drm_dev_private *priv = drm->dev_private; + + writel(TVE200_INT_V_STATUS, priv->regs + TVE200_INT_EN); + return 0; +} + +void tve200_disable_vblank(struct drm_device *drm, unsigned int crtc) +{ + struct tve200_drm_dev_private *priv = drm->dev_private; + + writel(0, priv->regs + TVE200_INT_EN); +} + +static int tve200_display_prepare_fb(struct drm_simple_display_pipe *pipe, + struct drm_plane_state *plane_state) +{ + return drm_fb_cma_prepare_fb(&pipe->plane, plane_state); +} + +const struct drm_simple_display_pipe_funcs tve200_display_funcs = { + .check = tve200_display_check, + .enable = tve200_display_enable, + .disable = tve200_display_disable, + .update = tve200_display_update, + .prepare_fb = tve200_display_prepare_fb, +}; + +int tve200_display_init(struct drm_device *drm) +{ + struct tve200_drm_dev_private *priv = drm->dev_private; + int ret; + static const u32 formats[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_XBGR8888, + DRM_FORMAT_RGB565, + DRM_FORMAT_BGR565, + DRM_FORMAT_XRGB1555, + DRM_FORMAT_XBGR1555, + /* + * The controller actually supports any YCbCr ordering, + * for packed YCbCr. This just lists the orderings that + * DRM supports. + */ + DRM_FORMAT_YUYV, + DRM_FORMAT_YVYU, + DRM_FORMAT_UYVY, + DRM_FORMAT_VYUY, + /* This uses three planes */ + DRM_FORMAT_YUV420, + }; + + ret = drm_simple_display_pipe_init(drm, &priv->pipe, + &tve200_display_funcs, + formats, ARRAY_SIZE(formats), + &priv->connector.connector); + if (ret) + return ret; + + return 0; +} diff --git a/drivers/gpu/drm/tve200/tve200_drm.h b/drivers/gpu/drm/tve200/tve200_drm.h new file mode 100644 index 000000000000..f00fc47a6bd1 --- /dev/null +++ b/drivers/gpu/drm/tve200/tve200_drm.h @@ -0,0 +1,129 @@ +/* + * Copyright (C) 2017 Linus Walleij + * Parts of this file were based on sources as follows: + * + * Copyright (C) 2006-2008 Intel Corporation + * Copyright (C) 2007 Amos Lee + * Copyright (C) 2007 Dave Airlie + * Copyright (C) 2011 Texas Instruments + * Copyright (C) 2017 Eric Anholt + * + * This program is free software and is provided to you under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation, and any use by you of this program is subject to the terms of + * such GNU licence. + */ + +#ifndef _TVE200_DRM_H_ +#define _TVE200_DRM_H_ + +/* Bits 2-31 are valid physical base addresses */ +#define TVE200_Y_FRAME_BASE_ADDR 0x00 +#define TVE200_U_FRAME_BASE_ADDR 0x04 +#define TVE200_V_FRAME_BASE_ADDR 0x08 + +#define TVE200_INT_EN 0x0C +#define TVE200_INT_CLR 0x10 +#define TVE200_INT_STAT 0x14 +#define TVE200_INT_BUS_ERR BIT(7) +#define TVE200_INT_V_STATUS BIT(6) /* vertical blank */ +#define TVE200_INT_V_NEXT_FRAME BIT(5) +#define TVE200_INT_U_NEXT_FRAME BIT(4) +#define TVE200_INT_Y_NEXT_FRAME BIT(3) +#define TVE200_INT_V_FIFO_UNDERRUN BIT(2) +#define TVE200_INT_U_FIFO_UNDERRUN BIT(1) +#define TVE200_INT_Y_FIFO_UNDERRUN BIT(0) +#define TVE200_FIFO_UNDERRUNS (TVE200_INT_V_FIFO_UNDERRUN | \ + TVE200_INT_U_FIFO_UNDERRUN | \ + TVE200_INT_Y_FIFO_UNDERRUN) + +#define TVE200_CTRL 0x18 +#define TVE200_CTRL_YUV420 BIT(31) +#define TVE200_CTRL_CSMODE BIT(30) +#define TVE200_CTRL_NONINTERLACE BIT(28) /* 0 = non-interlace CCIR656 */ +#define TVE200_CTRL_TVCLKP BIT(27) /* Inverted clock phase */ +/* Bits 24..26 define the burst size after arbitration on the bus */ +#define TVE200_CTRL_BURST_4_WORDS (0 << 24) +#define TVE200_CTRL_BURST_8_WORDS (1 << 24) +#define TVE200_CTRL_BURST_16_WORDS (2 << 24) +#define TVE200_CTRL_BURST_32_WORDS (3 << 24) +#define TVE200_CTRL_BURST_64_WORDS (4 << 24) +#define TVE200_CTRL_BURST_128_WORDS (5 << 24) +#define TVE200_CTRL_BURST_256_WORDS (6 << 24) +#define TVE200_CTRL_BURST_0_WORDS (7 << 24) /* ? */ +/* + * Bits 16..23 is the retry count*16 before issueing a new AHB transfer + * on the AHB bus. + */ +#define TVE200_CTRL_RETRYCNT_MASK GENMASK(23, 16) +#define TVE200_CTRL_RETRYCNT_16 (1 << 16) +#define TVE200_CTRL_BBBP BIT(15) /* 0 = little-endian */ +/* Bits 12..14 define the YCbCr ordering */ +#define TVE200_CTRL_YCBCRODR_CB0Y0CR0Y1 (0 << 12) +#define TVE200_CTRL_YCBCRODR_Y0CB0Y1CR0 (1 << 12) +#define TVE200_CTRL_YCBCRODR_CR0Y0CB0Y1 (2 << 12) +#define TVE200_CTRL_YCBCRODR_Y1CB0Y0CR0 (3 << 12) +#define TVE200_CTRL_YCBCRODR_CR0Y1CB0Y0 (4 << 12) +#define TVE200_CTRL_YCBCRODR_Y1CR0Y0CB0 (5 << 12) +#define TVE200_CTRL_YCBCRODR_CB0Y1CR0Y0 (6 << 12) +#define TVE200_CTRL_YCBCRODR_Y0CR0Y1CB0 (7 << 12) +/* Bits 10..11 define the input resolution (framebuffer size) */ +#define TVE200_CTRL_IPRESOL_CIF (0 << 10) +#define TVE200_CTRL_IPRESOL_VGA (1 << 10) +#define TVE200_CTRL_IPRESOL_D1 (2 << 10) +#define TVE200_CTRL_NTSC BIT(9) /* 0 = PAL, 1 = NTSC */ +#define TVE200_CTRL_INTERLACE BIT(8) /* 1 = interlace, only for D1 */ +#define TVE200_IPDMOD_RGB555 (0 << 6) /* TVE200_CTRL_YUV420 = 0 */ +#define TVE200_IPDMOD_RGB565 (1 << 6) +#define TVE200_IPDMOD_RGB888 (2 << 6) +#define TVE200_IPDMOD_YUV420 (2 << 6) /* TVE200_CTRL_YUV420 = 1 */ +#define TVE200_IPDMOD_YUV422 (3 << 6) +/* Bits 4 & 5 define when to fire the vblank IRQ */ +#define TVE200_VSTSTYPE_VSYNC (0 << 4) /* start of vsync */ +#define TVE200_VSTSTYPE_VBP (1 << 4) /* start of v back porch */ +#define TVE200_VSTSTYPE_VAI (2 << 4) /* start of v active image */ +#define TVE200_VSTSTYPE_VFP (3 << 4) /* start of v front porch */ +#define TVE200_VSTSTYPE_BITS (BIT(4) | BIT(5)) +#define TVE200_BGR BIT(1) /* 0 = RGB, 1 = BGR */ +#define TVE200_TVEEN BIT(0) /* Enable TVE block */ + +#define TVE200_CTRL_2 0x1c +#define TVE200_CTRL_3 0x20 + +#define TVE200_CTRL_4 0x24 +#define TVE200_CTRL_4_RESET BIT(0) /* triggers reset of TVE200 */ + +#include +#include + +struct tve200_drm_connector { + struct drm_connector connector; + struct drm_panel *panel; +}; + +struct tve200_drm_dev_private { + struct drm_device *drm; + + struct tve200_drm_connector connector; + struct drm_simple_display_pipe pipe; + struct drm_fbdev_cma *fbdev; + + void *regs; + struct clk *pclk; + struct clk *clk; +}; + +#define to_tve200_connector(x) \ + container_of(x, struct tve200_drm_connector, connector) + +int tve200_display_init(struct drm_device *dev); +int tve200_enable_vblank(struct drm_device *drm, unsigned int crtc); +void tve200_disable_vblank(struct drm_device *drm, unsigned int crtc); +irqreturn_t tve200_irq(int irq, void *data); +int tve200_connector_init(struct drm_device *dev); +int tve200_encoder_init(struct drm_device *dev); +int tve200_dumb_create(struct drm_file *file_priv, + struct drm_device *dev, + struct drm_mode_create_dumb *args); + +#endif /* _TVE200_DRM_H_ */ diff --git a/drivers/gpu/drm/tve200/tve200_drv.c b/drivers/gpu/drm/tve200/tve200_drv.c new file mode 100644 index 000000000000..9e34147e2617 --- /dev/null +++ b/drivers/gpu/drm/tve200/tve200_drv.c @@ -0,0 +1,277 @@ +/* + * Copyright (C) 2017 Linus Walleij + * Parts of this file were based on sources as follows: + * + * Copyright (C) 2006-2008 Intel Corporation + * Copyright (C) 2007 Amos Lee + * Copyright (C) 2007 Dave Airlie + * Copyright (C) 2011 Texas Instruments + * Copyright (C) 2017 Eric Anholt + * + * This program is free software and is provided to you under the terms of the + * GNU General Public License version 2 as published by the Free Software + * Foundation, and any use by you of this program is subject to the terms of + * such GNU licence. + */ + +/** + * DOC: Faraday TV Encoder TVE200 DRM Driver + * + * The Faraday TV Encoder TVE200 is also known as the Gemini TV Interface + * Controller (TVC) and is found in the Gemini Chipset from Storlink + * Semiconductor (later Storm Semiconductor, later Cortina Systems) + * but also in the Grain Media GM8180 chipset. On the Gemini the module + * is connected to 8 data lines and a single clock line, comprising an + * 8-bit BT.656 interface. + * + * This is a very basic YUV display driver. The datasheet specifies that + * it supports the ITU BT.656 standard. It requires a 27 MHz clock which is + * the hallmark of any TV encoder supporting both PAL and NTSC. + * + * This driver exposes a standard KMS interface for this TV encoder. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "tve200_drm.h" + +#define DRIVER_DESC "DRM module for Faraday TVE200" + +struct drm_mode_config_funcs mode_config_funcs = { + .fb_create = drm_fb_cma_create, + .atomic_check = drm_atomic_helper_check, + .atomic_commit = drm_atomic_helper_commit, +}; + +static int tve200_modeset_init(struct drm_device *dev) +{ + struct drm_mode_config *mode_config; + struct tve200_drm_dev_private *priv = dev->dev_private; + int ret = 0; + + drm_mode_config_init(dev); + mode_config = &dev->mode_config; + mode_config->funcs = &mode_config_funcs; + mode_config->min_width = 352; + mode_config->max_width = 720; + mode_config->min_height = 240; + mode_config->max_height = 576; + + ret = tve200_connector_init(dev); + if (ret) { + dev_err(dev->dev, "Failed to create tve200_drm_connector\n"); + goto out_config; + } + + /* + * Don't actually attach if we didn't find a drm_panel + * attached to us. + */ + if (!priv->connector.panel) { + dev_info(dev->dev, + "deferring due to lack of DRM panel device\n"); + ret = -EPROBE_DEFER; + goto out_config; + } + dev_info(dev->dev, "attached to panel %s\n", + dev_name(priv->connector.panel->dev)); + + ret = tve200_display_init(dev); + if (ret) { + dev_err(dev->dev, "failed to init display\n"); + goto out_config; + } + + ret = drm_vblank_init(dev, 1); + if (ret) { + dev_err(dev->dev, "failed to init vblank\n"); + goto out_config; + } + + drm_mode_config_reset(dev); + + /* + * Passing in 16 here will make the RGB656 mode the default + * Passing in 32 will use XRGB8888 mode + */ + priv->fbdev = drm_fbdev_cma_init(dev, 16, + dev->mode_config.num_connector); + drm_kms_helper_poll_init(dev); + + goto finish; + +out_config: + drm_mode_config_cleanup(dev); +finish: + return ret; +} + +DEFINE_DRM_GEM_CMA_FOPS(drm_fops); + +static void tve200_lastclose(struct drm_device *dev) +{ + struct tve200_drm_dev_private *priv = dev->dev_private; + + drm_fbdev_cma_restore_mode(priv->fbdev); +} + +static struct drm_driver tve200_drm_driver = { + .driver_features = + DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME | DRIVER_ATOMIC, + .lastclose = tve200_lastclose, + .ioctls = NULL, + .fops = &drm_fops, + .name = "tve200", + .desc = DRIVER_DESC, + .date = "20170703", + .major = 1, + .minor = 0, + .patchlevel = 0, + .dumb_create = drm_gem_cma_dumb_create, + .dumb_destroy = drm_gem_dumb_destroy, + .dumb_map_offset = drm_gem_cma_dumb_map_offset, + .gem_free_object = drm_gem_cma_free_object, + .gem_vm_ops = &drm_gem_cma_vm_ops, + + .enable_vblank = tve200_enable_vblank, + .disable_vblank = tve200_disable_vblank, + + .prime_handle_to_fd = drm_gem_prime_handle_to_fd, + .prime_fd_to_handle = drm_gem_prime_fd_to_handle, + .gem_prime_import = drm_gem_prime_import, + .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, + .gem_prime_export = drm_gem_prime_export, + .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, +}; + +static int tve200_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct tve200_drm_dev_private *priv; + struct drm_device *drm; + struct resource *res; + int irq; + int ret; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + drm = drm_dev_alloc(&tve200_drm_driver, dev); + if (IS_ERR(drm)) + return PTR_ERR(drm); + platform_set_drvdata(pdev, drm); + priv->drm = drm; + drm->dev_private = priv; + + /* Clock the silicon so we can access the registers */ + priv->pclk = devm_clk_get(dev, "PCLK"); + if (IS_ERR(priv->pclk)) { + dev_err(dev, "unable to get PCLK\n"); + ret = PTR_ERR(priv->pclk); + goto dev_unref; + } + ret = clk_prepare_enable(priv->pclk); + if (ret) { + dev_err(dev, "failed to enable PCLK\n"); + goto dev_unref; + } + + /* This clock is for the pixels (27MHz) */ + priv->clk = devm_clk_get(dev, "TVE"); + if (IS_ERR(priv->clk)) { + dev_err(dev, "unable to get TVE clock\n"); + ret = PTR_ERR(priv->clk); + goto clk_disable; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + priv->regs = devm_ioremap_resource(dev, res); + if (!priv->regs) { + dev_err(dev, "%s failed mmio\n", __func__); + ret = -EINVAL; + goto dev_unref; + } + + irq = platform_get_irq(pdev, 0); + if (!irq) { + ret = -EINVAL; + goto dev_unref; + } + + /* turn off interrupts before requesting the irq */ + writel(0, priv->regs + TVE200_INT_EN); + + ret = devm_request_irq(dev, irq, tve200_irq, 0, "tve200", priv); + if (ret) { + dev_err(dev, "failed to request irq %d\n", ret); + return ret; + } + + ret = tve200_modeset_init(drm); + if (ret) + goto dev_unref; + + ret = drm_dev_register(drm, 0); + if (ret < 0) + goto dev_unref; + + return 0; + +clk_disable: + clk_disable_unprepare(priv->pclk); +dev_unref: + drm_dev_unref(drm); + return ret; +} + +static int tve200_remove(struct platform_device *pdev) +{ + struct drm_device *drm = platform_get_drvdata(pdev); + struct tve200_drm_dev_private *priv = drm->dev_private; + + drm_dev_unregister(drm); + if (priv->fbdev) + drm_fbdev_cma_fini(priv->fbdev); + drm_mode_config_cleanup(drm); + clk_disable_unprepare(priv->pclk); + drm_dev_unref(drm); + + return 0; +} + +static const struct of_device_id tve200_of_match[] = { + { + .compatible = "faraday,tve200", + }, + {}, +}; + +static struct platform_driver tve200_driver = { + .driver = { + .name = "tve200", + .of_match_table = of_match_ptr(tve200_of_match), + }, + .probe = tve200_probe, + .remove = tve200_remove, +}; +module_platform_driver(tve200_driver); + +MODULE_DESCRIPTION(DRIVER_DESC); +MODULE_AUTHOR("Linus Walleij "); +MODULE_LICENSE("GPL"); From patchwork Sun Aug 13 15:11:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 109958 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp3299276qge; Sun, 13 Aug 2017 08:12:35 -0700 (PDT) X-Received: by 10.84.129.71 with SMTP id 65mr24232128plb.49.1502637155109; Sun, 13 Aug 2017 08:12:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1502637155; cv=none; d=google.com; s=arc-20160816; b=CnD7MaFMYTRbsh34+5WpwdMeWVS0n7IPneBRzaUugVjAJ+BpfBFbhfs62C+IlMX/j5 fyutli920BvjygY4MNEQqfa65tq7kTwgxRbZXKbLir151z4vK7L4WSugszDJpQKP175j MXwX4RL1jkXgbsztAifQZFrQySWTx5hBNnvU5uTCsP7zgagZbTDsBvxnt+/z4knxEg3O pNXI4ROyAszP84ucK/IwgtVix79tc73zAUiK5hM4obIJl+X1o5edrInIwCRK0wo5qObZ aR8TEZ0y8HCq39fYsOJbIOamNI671D8T/ECzGy48uk3P6SOlY8eTU+Rs/RNxxntGmxNq zH4A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to :arc-authentication-results; bh=MsVTtbw/wI80UTIow0HD2eP546W5fSFgamnL1MKsK+o=; b=luNACQ5cBEzgr5ipgxAN+ybuyUZx3gO+0A5ZZbvx0hNIolRM7TBY/Ty13vRh+AWAJB zfDNDsReOqH2JPRlx6r8iy7BT3GySn2poHCpU+rtG4aCzYPblnEmng2qr+8YWqWDGt1Z sJ80Ao+AouRAHGSovBMM62dzKDrVF4raC+Dt+gJz4GGgm4fYZYXJ84Sxn+T8ic4wy0ix thKNAVAjBtQowIonRKQ2OebraHQTcq3SX2FhqwEmXe3QKD7MQSNWSW5BsZ1xD9LeEGF7 /FX8pdeR52a59gSQiTxH+2UPmX9dZ9PzNEVYj4dq0WfLE8W1eMy4oNHfSr6DvcinplNt jFFQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=QTaZmSFN; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id u11si3062092pfi.238.2017.08.13.08.12.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 13 Aug 2017 08:12:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=QTaZmSFN; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E58766E0B1; Sun, 13 Aug 2017 15:12:03 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x234.google.com (mail-lf0-x234.google.com [IPv6:2a00:1450:4010:c07::234]) by gabe.freedesktop.org (Postfix) with ESMTPS id 479E06E0B1 for ; Sun, 13 Aug 2017 15:12:03 +0000 (UTC) Received: by mail-lf0-x234.google.com with SMTP id g25so31429676lfh.1 for ; Sun, 13 Aug 2017 08:12:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=dsGB3cyHgAF6+SCPv565XXIrH3sH5/CpfdvQBHJ5BXc=; b=QTaZmSFNeo4XtI56pg6x2Y34tKrjrFCF4Yw671TjWDPdQIAASlcW39pr2SZ13ZXjfq fi2YAfOzzAoQPN63M5Cd1eHnS6JZ88KrCkeTF7VYpUZDBs+P4jPPPa2eW6BhykZ6IuUG 7txkEM50FzNX0gxBfKSnDcxk6MLLjHI2dpjso= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=dsGB3cyHgAF6+SCPv565XXIrH3sH5/CpfdvQBHJ5BXc=; b=NiZMNKgSaEQ2KtpmvlmmMNA7HNS9M5gmOtlZ6HuPh3p9moMIyEPJWvFG9tD0ukhPRA spXuB6UHMMhrwMfcRmUdpa8iSOJiq8r5bGeplnlMcy+1exa2ACS6vH8fLsd3VjIDg1TD f8prQ/b2RUQzJGqiG2EMBGyRouXX7uJBl095iE9nxRZxLf3N/F5rXlIK+c2dvOD3+feo Y0D3hpgiD3ozSEOoJY/Q3KUI00cR65kpumCJpgCj8Iz4Drb8/i8ol8j6c8PuAVBhFF4x t2xgGOWWXhaF401dIWJ7nt3/NRLNK/LHU1J/W2Lu21qYie6GqgWgJXOKhoyKIwwC/szW EaMw== X-Gm-Message-State: AHYfb5htUVhaIw2bxhsO0Xj88Vl2gsyPuI9kGZRiDCwvVkzE9Tf+2S76 ZrKATTMpFyBRMS6TD5CWlg== X-Received: by 10.46.76.26 with SMTP id z26mr8150227lja.81.1502637121161; Sun, 13 Aug 2017 08:12:01 -0700 (PDT) Received: from fabina.bredbandsbolaget.se (c-277e71d5.014-348-6c756e10.cust.bredbandsbolaget.se. [213.113.126.39]) by smtp.gmail.com with ESMTPSA id e195sm1064062lfg.17.2017.08.13.08.11.59 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 13 Aug 2017 08:12:00 -0700 (PDT) From: Linus Walleij To: dri-devel@lists.freedesktop.org, Eric Anholt , Daniel Vetter , Jani Nikula , Sean Paul Subject: [PATCH 3/4] ARM: dts: Add TVE200 to the Gemini SoC DTSI Date: Sun, 13 Aug 2017 17:11:31 +0200 Message-Id: <20170813151132.24736-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.4 In-Reply-To: <20170813151132.24736-1-linus.walleij@linaro.org> References: <20170813151132.24736-1-linus.walleij@linaro.org> Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Faraday TVE200 is present in the Gemini SoC, sometimes under the name "TVC". Add it to the SoC DTSI file along with its resources. Signed-off-by: Linus Walleij --- DRM developers: I will merge this patch through the ARM SoC tree. It is only included in this series for completion. --- arch/arm/boot/dts/gemini.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/gemini.dtsi b/arch/arm/boot/dts/gemini.dtsi index c68e8d430234..f4957545e558 100644 --- a/arch/arm/boot/dts/gemini.dtsi +++ b/arch/arm/boot/dts/gemini.dtsi @@ -141,6 +141,12 @@ groups = "idegrp"; }; }; + tvc_default_pins: pinctrl-tvc { + mux { + function = "tvc"; + groups = "tvcgrp"; + }; + }; }; }; @@ -346,5 +352,18 @@ memcpy-bus-width = <32>; #dma-cells = <2>; }; + + tvc@6a000000 { + compatible = "cortina,gemini-tvc", "faraday,tve200"; + reg = <0x6a000000 0x1000>; + interrupts = <13 IRQ_TYPE_EDGE_RISING>; + resets = <&syscon GEMINI_RESET_TVC>; + clocks = <&syscon GEMINI_CLK_GATE_TVC>, + <&syscon GEMINI_CLK_TVC>; + clock-names = "PCLK", "TVE"; + pinctrl-names = "default"; + pinctrl-0 = <&tvc_default_pins>; + status = "disabled"; + }; }; }; From patchwork Sun Aug 13 15:11:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 109956 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp3298832qge; Sun, 13 Aug 2017 08:12:08 -0700 (PDT) X-Received: by 10.84.167.2 with SMTP id c2mr24133933plb.367.1502637128442; Sun, 13 Aug 2017 08:12:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1502637128; cv=none; d=google.com; s=arc-20160816; b=xX/bdQKG9/EwlLj5ZRm7U76C/2VWxIx9HLpToUhClwIwJ3BqBg35VGdmoWvMzFFSyZ ebQ/KyOABA3MHhtchK13wD+C777xDu9UVeIKVtb08pjK0RSIhJDLcz7ooCoyfbDGXk/2 +iNX11IPFzj3FXrRUF2dP4xNUL34fikGPAwz7Jg9oqL6TCtrLegEW/Pn8uJuXWFkhAHp zy19/0SjQTjE+JkoJVewKFU/xFfjwCnb5eXry0mXGBC9FZktp+357vW15GGJdeu9ur7Y bZK9BQWzhiSJ0pYp0FhF4fjsnWfX5x1h7HcvTiYezjy0mFrHtAvcRnSRCE+g4Kp7+hsZ r2Ng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:cc:references:in-reply-to:message-id:date :subject:to:from:dkim-signature:delivered-to :arc-authentication-results; bh=tVb1WQcVSe4CtoAU3LSCe//N+nRqt+z66efYGNystH8=; b=EypdI1NjN52q3/il9Ffuf6OwNxf9xr6GZ1jmvD/vPkg9ep8oFm49FRWvXGAeWFZHMS Y1sf0aizxE45i5RUFwS+L4nuKR/X7+bn7b+QVxjrBEt5ykPfcu8Xuqz+GW92zEpD9Z+I d9WMEr4PoOwvOxkjHM9wtfzLFyDXsXv39/rBA9K0GSkGQBn6Q6/hO08VTGirB5/rHS50 Ai5dysq+urqiCpUVqSEr9ty9HS1ny3lvLu9s9RB2ha+oZ3VkNKPLEtLfsVTpL5fM8rxJ fDWUtIA7LDqUDtkS0WmoC9en+SZfKw/0sTKs1ZMVIHzMxs2N34+9J03ye0+65HZZbXOO AUDg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=hOkEtGnp; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id d28si3062364pfl.100.2017.08.13.08.12.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 13 Aug 2017 08:12:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=hOkEtGnp; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 94A076E0B6; Sun, 13 Aug 2017 15:12:07 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x233.google.com (mail-lf0-x233.google.com [IPv6:2a00:1450:4010:c07::233]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0A0836E0B6 for ; Sun, 13 Aug 2017 15:12:05 +0000 (UTC) Received: by mail-lf0-x233.google.com with SMTP id d17so31499310lfe.0 for ; Sun, 13 Aug 2017 08:12:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SxoS1Wsfp4LT8MZGnmIG0JOiRc/paGICw+KWwwFAGaY=; b=hOkEtGnp9N84scuFhJVizFn0txMUNTCz7jACCjetfjbqXkHUUZ1p6xx1c+NC1dPNrd ktpG3o6w0HeVkhMnWVWRcFfHSFZrYQkL0tHj0H0ZmNuKbnu+CJmLb9M4hZ2xoK7CaqEC cPDAqkRtxZDvEn/pwozLTDdb9MwVdKOeh5t6c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SxoS1Wsfp4LT8MZGnmIG0JOiRc/paGICw+KWwwFAGaY=; b=pmqxMRxFCS2+75tmwXsjFnF91Z8w6SF/ks3vuRoIbo0ExKj2+j7LoBXExKUKRv07ay yHp256vQzZKIIun4REgWZpbB1sgOT0sXPBON8smgyJTBrrlMQNsEOh9lyYci9odHDqV2 RxSJysvQDBR50b+aRxNgWGjsFSWRO0IvU+IvIRUu7Hn5BCDKvma3SZaWfqwHctKlBAoh xAzbfZSQktiS/ha/bbjzUxOdDYQm4maprKb0sIY9HunygyKYtEQdeOtkj0E2tXtS/neG pbdysMcltJJvf0l072QP5eN2QtRWxDmW+Ct0XyTsP2qfWb+LoF7UfC+QH6oF8cZB6Xhh dxfw== X-Gm-Message-State: AHYfb5jaS9DQzf2cChWzoluLUPrEgb0BhELUU4nsCdtuUne7BNsRM+hU j/hi1n0YoDCTI2IApoDGMg== X-Received: by 10.46.88.68 with SMTP id x4mr7029404ljd.153.1502637123911; Sun, 13 Aug 2017 08:12:03 -0700 (PDT) Received: from fabina.bredbandsbolaget.se (c-277e71d5.014-348-6c756e10.cust.bredbandsbolaget.se. [213.113.126.39]) by smtp.gmail.com with ESMTPSA id e195sm1064062lfg.17.2017.08.13.08.12.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 13 Aug 2017 08:12:02 -0700 (PDT) From: Linus Walleij To: dri-devel@lists.freedesktop.org, Eric Anholt , Daniel Vetter , Jani Nikula , Sean Paul Subject: [PATCH 4/4] ARM: dts: Add TVE/TVC and ILI9322 panel to DIR-685 Date: Sun, 13 Aug 2017 17:11:32 +0200 Message-Id: <20170813151132.24736-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.4 In-Reply-To: <20170813151132.24736-1-linus.walleij@linaro.org> References: <20170813151132.24736-1-linus.walleij@linaro.org> Cc: linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This adds the TVE200/TVC TV-encoder and the Ilitek ILI9322 panel to the DIR-685 device tree. This brings graphics to this funky router and it is possible to even run a console on its tiny screen. Incidentally this requires us to disable the access to the parallel (NOR) flash, as the communication pins to the panel are shared with the flash memory. To access the flash, a separate kernel with the panel disabled and the flash enabled should be booted. The pin control selecting whether to use the lines cannot be altered at runtime due to hardware constraints. Signed-off-by: Linus Walleij --- DRM developers: I will merge this patch through the ARM SoC tree. It is only included in this series for completion. --- arch/arm/boot/dts/gemini-dlink-dir-685.dts | 77 +++++++++++++++++++++++++++++- 1 file changed, 76 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/gemini-dlink-dir-685.dts b/arch/arm/boot/dts/gemini-dlink-dir-685.dts index 094a29624b8d..6c8d3d839ae6 100644 --- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts +++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts @@ -46,6 +46,59 @@ }; }; + vdisp: regulator { + compatible = "regulator-fixed"; + regulator-name = "display-power"; + regulator-min-microvolt = <3600000>; + regulator-max-microvolt = <3600000>; + /* Collides with LCD E */ + gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + spi { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + /* Collides with IDE pins, that's cool (we do not use them) */ + gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>; + gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>; + gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>; + /* Collides with pflash CE1, not so cool */ + cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + num-chipselects = <1>; + + panel: display@0 { + compatible = "ilitek,ili9322"; + reg = <0>; + /* 50 ns min period = 20 MHz */ + spi-max-frequency = <20000000>; + spi-cpol; /* Clock active low */ + + /* Panel LM918A01-1A SY-B4-091116-E0199 */ + width-mm = <65>; + height-mm = <50>; + ilitek,entry-mode = <11>; + ilitek,vreg1out-microvolt = <4600>; + ilitek,vcom-high-percent = <91>; + ilitek,vcom-amplitude-percent = <114>; + ilitek,gamma-correction-neg = <0xa>, <0x5>, <0x7>, + <0x7>, <0x7>, <0x5>, <0x1>, <0x6>; + ilitek,gamma-correction-pos = <0x7>, <0x7>, <0x3>, + <0x2>, <0x3>, <0x5>, <0x7>, <0x2>; + vcc-supply = <&vdisp>; + iovcc-supply = <&vdisp>; + vci-supply = <&vdisp>; + + port { + panel_in: endpoint { + remote-endpoint = <&display_out>; + }; + }; + }; + }; + leds { compatible = "gpio-leds"; led@7 { @@ -114,7 +167,16 @@ soc { flash@30000000 { - status = "okay"; + /* + * Flash access is by default disabled, because it + * collides with the Chip Enable signal for the display + * panel, that reuse the parallel flash Chip Select 1 + * (CS1). Enabling flash makes graphics stop working. + * + * We might be able to hack around this by letting + * GPIO poke around in the flash controller registers. + */ + /* status = "okay"; */ /* 32MB of flash */ reg = <0x30000000 0x02000000>; @@ -241,5 +303,18 @@ ata@63000000 { status = "okay"; }; + + tvc@6a000000 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + display_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; }; };