From patchwork Wed Apr 15 16:00:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 201982 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8AB65C3815B for ; Wed, 15 Apr 2020 16:01:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5B6D621556 for ; Wed, 15 Apr 2020 16:01:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1586966494; bh=Whr+LkPvddPEdlzax+7iuEmKEeTaxYdFoa0JhjAYMp0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=Lwipk176dRhImHNTsoxeqkxf+9Yp6pOTRLQAongR8YiFBsURbitZf4h/PDK2UZS6d K553HkvB/FFdTc253YgxlC7pumBbDRPPrj1mIQSPVFdubqj8WX5F0I7OZW438IWgbI vx7gWqd2uMd9iy+RLhvbQluH7Tgd/SSOMXt75NOA= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1415149AbgDOQBc (ORCPT ); Wed, 15 Apr 2020 12:01:32 -0400 Received: from mail.kernel.org ([198.145.29.99]:52290 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1415142AbgDOQB0 (ORCPT ); Wed, 15 Apr 2020 12:01:26 -0400 Received: from pali.im (pali.im [31.31.79.79]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id ECE3D208FE; Wed, 15 Apr 2020 16:01:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1586966486; bh=Whr+LkPvddPEdlzax+7iuEmKEeTaxYdFoa0JhjAYMp0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=I+6fg/CJTctkQzt5X9MhH3chom+dZFcBbS3wXE82ZJD9pbWepWuch9jt7R1BpISBE 2f0wyE+t78HFjA2s5qxZAyXjFiyaLADrDwiy7r2vPTIFfIMrmrG+cj2fWNrXw+qXuo xEw9Ez+PiABBxv8f10yKG5VcEFDyL0isUG/kp4cQ= Received: by pali.im (Postfix) id 4FA4958E; Wed, 15 Apr 2020 18:01:24 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Thomas Petazzoni , Lorenzo Pieralisi , Andrew Murray , Bjorn Helgaas , Remi Pommarel , =?utf-8?q?Marek_Beh=C3=BAn?= , Tomasz Maciej Nowak , Xogium Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH 2/8] dts: espressobin: Define max-link-speed for pcie0 Date: Wed, 15 Apr 2020 18:00:48 +0200 Message-Id: <20200415160054.951-3-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200415160054.951-1-pali@kernel.org> References: <20200415160054.951-1-pali@kernel.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Previously aardvark PCI controller set speed to gen2. Now it reads speed from Device Tree and as default use maximal possible speed which is gen3. Because Espressobin has advertised only PCI Express 2.0 capability and previous value was gen2, define max-link-speed to 2, so there would not be any configuration change. Signed-off-by: Pali Rohár --- arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi index 42e992f9c8a5..6705618162d5 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi @@ -47,6 +47,7 @@ phys = <&comphy1 0>; pinctrl-names = "default"; pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>; + max-link-speed = <2>; }; /* J6 */ From patchwork Wed Apr 15 16:00:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 201981 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50435C3815B for ; Wed, 15 Apr 2020 16:02:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2B1FC21556 for ; Wed, 15 Apr 2020 16:02:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1586966525; bh=qo96f8y7Ue3uthU1Q4HKKMi97vHqkzY5w+REOuqCXMQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=sIW/I9Fpq8lP/ECxfQ0Zt+diGDpPqdyxlUcL91UhXpxBt+KmtDy8b7v+4Q//Fksyy JE/PQcJ29Ee3Mlx0tSIEy2FCYruql/p6ZcSzcSHRj3fsaT6hZzgRCmlZB1WX6dKyuf IvU/7ltsWjzhl+wV7CFfemCJsUEdeUiJlizenWa8= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2410067AbgDOQCB (ORCPT ); Wed, 15 Apr 2020 12:02:01 -0400 Received: from mail.kernel.org ([198.145.29.99]:52436 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1415143AbgDOQB2 (ORCPT ); Wed, 15 Apr 2020 12:01:28 -0400 Received: from pali.im (pali.im [31.31.79.79]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 8699E2137B; Wed, 15 Apr 2020 16:01:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1586966487; bh=qo96f8y7Ue3uthU1Q4HKKMi97vHqkzY5w+REOuqCXMQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aaonqigEYT5dMYmA3jOv/SCvtJ7IFgBOwME1O7eG4Px6MM/tN35uGtsFHQU8m3Joo cftOVLOp8D2S55eENIK9OS24i0O9f09lSVZPZ0DVH+8gMAMZUN8msOnVHrw+WoibHY mKojLMJcvI3erCXx459yhdfw86/pA8JlUeQY189E= Received: by pali.im (Postfix) id 8ECC49CC; Wed, 15 Apr 2020 18:01:25 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Thomas Petazzoni , Lorenzo Pieralisi , Andrew Murray , Bjorn Helgaas , Remi Pommarel , =?utf-8?q?Marek_Beh=C3=BAn?= , Tomasz Maciej Nowak , Xogium Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH 3/8] PCI: aardvark: Start link training immediately after enabling link training Date: Wed, 15 Apr 2020 18:00:49 +0200 Message-Id: <20200415160054.951-4-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200415160054.951-1-pali@kernel.org> References: <20200415160054.951-1-pali@kernel.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Adding even 100ms (PCI_PM_D3COLD_WAIT) delay between enabling link training and starting link training cause that some Compex WLE900VX cards are not detected. So move code for enabling link training after PCI_PM_D3COLD_WAIT delay. This change fixes Compex WLE900VX cards detection on Turris MOX after cold boot. Fixes: f4c7d053d7f7 ("PCI: aardvark: Wait for endpoint to be ready before training link") Signed-off-by: Pali Rohár --- drivers/pci/controller/pci-aardvark.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index ad4f0fa57624..756b31c4d20b 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -322,11 +322,6 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) reg |= LANE_COUNT_1; advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); - /* Enable link training */ - reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); - reg |= LINK_TRAINING_EN; - advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); - /* Enable MSI */ reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG); reg |= PCIE_CORE_CTRL2_MSI_ENABLE; @@ -368,6 +363,16 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) */ msleep(PCI_PM_D3COLD_WAIT); + /* + * Do "Enable link training" and "Start link training" in a row without + * any delay between them. Adding even 100ms delay (PCI_PM_D3COLD_WAIT) + * cause that some Compex WLE900VX cards are not detected. + */ + + /* Enable link training */ + reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); + reg |= LINK_TRAINING_EN; + advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); /* Start link training */ reg = advk_readl(pcie, PCIE_CORE_LINK_CTRL_STAT_REG); reg |= PCIE_CORE_LINK_TRAINING; From patchwork Wed Apr 15 16:03:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 201980 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0705C2BB55 for ; Wed, 15 Apr 2020 16:04:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9C888216FD for ; Wed, 15 Apr 2020 16:04:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1586966645; bh=1YUfEX82K+60B/zqLyakfZdfKZRyfg4LKtcOqbCXQzY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=l4dX8BsYFEI+G38+Mu5Dht8CA94mJLo4ILn/Ii/yXfzh2u73b/tMttnTKJE0OkQHo 6DEqs52lnpN51HMQ/0jbTT8QZftWiZFgGIDPpqTeTZCT/b1vo/yQs7I99+rn95z46j O+l2O/rCiVdVVEdP2giDGJPWKkkf562F3KU0Ro5A= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2410159AbgDOQEE (ORCPT ); Wed, 15 Apr 2020 12:04:04 -0400 Received: from mail.kernel.org ([198.145.29.99]:56712 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2410149AbgDOQEB (ORCPT ); Wed, 15 Apr 2020 12:04:01 -0400 Received: from pali.im (pali.im [31.31.79.79]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5226D21569; Wed, 15 Apr 2020 16:04:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1586966641; bh=1YUfEX82K+60B/zqLyakfZdfKZRyfg4LKtcOqbCXQzY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Oa/43f04xATTEKSed4AMeN63fKk4K3aKweuLUoPUwwjQkSTtSVG7VuVXkJHNZSeAs pYfOo6c/V3czlZsEwhc72gYlkVG5Hbr46KQot3RqHzKfm6bRPIgCIWobAcdI59aUzV LQZKo/WMZLMRG0/g7B43HU4habRvHXSmk8nI4bVI= Received: by pali.im (Postfix) id 85BD258E; Wed, 15 Apr 2020 18:03:59 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Thomas Petazzoni , Lorenzo Pieralisi , Andrew Murray , Bjorn Helgaas , Remi Pommarel , =?utf-8?q?Marek_Beh=C3=BAn?= , Tomasz Maciej Nowak , Xogium Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH 6/8] PCI: aardvark: Add support for issuing PERST via GPIO Date: Wed, 15 Apr 2020 18:03:46 +0200 Message-Id: <20200415160348.1146-2-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200415160054.951-1-pali@kernel.org> References: <20200415160054.951-1-pali@kernel.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org bindings/pci/pci.txt defines standard DT property reset-gpios for specifying PERST GPIO. Read this property from Device Tree via devm_gpiod_get_from_of_node() function. As this property is optional, function may return -ENOENT. During initialization of aardvark PCI controller toggle supplied GPIO to issue PERST. Some Compex ath10k cards (e.g. WLE900VX or WLE1216) are not detected after reboot when PERST is not issued during driver initialization. And Compex WLE1216 cards need to be in reset state for at least 1ms otherwise they are not detected too. Tested on Turris MOX and after this change Compex cards are detected also after rebooting board. Signed-off-by: Pali Rohár --- drivers/pci/controller/pci-aardvark.c | 30 ++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index a83bbc86e428..6a97a3838098 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -9,6 +9,7 @@ */ #include +#include #include #include #include @@ -18,6 +19,7 @@ #include #include #include +#include #include #include "../pci.h" @@ -203,6 +205,7 @@ struct advk_pcie { u16 msi_msg; int root_bus_nr; struct pci_bridge_emul bridge; + struct gpio_desc *reset_gpio; }; static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg) @@ -280,6 +283,14 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) int max_link_speed, neg_link_speed; u32 reg; + if (pcie->reset_gpio) { + dev_info(dev, "issuing PERST via reset GPIO for 1ms\n"); + gpiod_set_value_cansleep(pcie->reset_gpio, 1); + /* Detection of some Compex WLE1216 cards needs at least 1ms */ + mdelay(1); + gpiod_set_value_cansleep(pcie->reset_gpio, 0); + } + /* Set to Direct mode */ reg = advk_readl(pcie, CTRL_CONFIG_REG); reg &= ~(CTRL_MODE_MASK << CTRL_MODE_SHIFT); @@ -358,7 +369,8 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) /* * PERST# signal could have been asserted by pinctrl subsystem before - * probe() callback has been called, making the endpoint going into + * probe() callback has been called or issued explicitly by reset gpio + * routine at beginning of this function, making the endpoint going into * fundamental reset. As required by PCI Express spec a delay for at * least 100ms after such a reset before link training is needed. */ @@ -1043,6 +1055,22 @@ static int advk_pcie_probe(struct platform_device *pdev) } pcie->root_bus_nr = bus->start; + /* Returns -ENOENT if reset-gpios property is not populated */ + pcie->reset_gpio = devm_gpiod_get_from_of_node(dev, dev->of_node, + "reset-gpios", 0, + GPIOD_OUT_LOW, + "pcie1-reset"); + if (IS_ERR(pcie->reset_gpio)) { + if (PTR_ERR(pcie->reset_gpio) == -ENOENT) { + pcie->reset_gpio = NULL; + } else { + if (PTR_ERR(pcie->reset_gpio) != -EPROBE_DEFER) + dev_err(dev, "Failed to retrieve reset GPIO (%ld)\n", + PTR_ERR(pcie->reset_gpio)); + return PTR_ERR(pcie->reset_gpio); + } + } + advk_pcie_setup_hw(pcie); advk_sw_pci_bridge_init(pcie); From patchwork Wed Apr 15 16:03:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 201979 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A650DC2BB55 for ; Wed, 15 Apr 2020 16:04:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 850D421734 for ; Wed, 15 Apr 2020 16:04:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1586966654; bh=p7e0pThC4DsKXXmaYA9VV5ZorubQAuCZ2UJ40gakewI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=yH1p07OQ+J1BH3VJN+QGV335YowTeKjPQI/noHVhHoqfUMY8cTAixCwZnf/+SGJTB ggtpkVmo5Loe3tLCWUl3f4LDQDlDUrL9x8xuKONHP0cJ9ENK7E7h5+C/S/FVNkmayp bkhSOBzsje8cCrW4gCeL3LeiEhY4G5BH4rIa8pno= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2410168AbgDOQEI (ORCPT ); Wed, 15 Apr 2020 12:04:08 -0400 Received: from mail.kernel.org ([198.145.29.99]:56888 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2410164AbgDOQEG (ORCPT ); Wed, 15 Apr 2020 12:04:06 -0400 Received: from pali.im (pali.im [31.31.79.79]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C27002173E; Wed, 15 Apr 2020 16:04:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1586966645; bh=p7e0pThC4DsKXXmaYA9VV5ZorubQAuCZ2UJ40gakewI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=N1KgN+4EjmVKgix5IBD5HuBai7EefSQYT5d8GTAOzdnnzEyvj/BCHZTzxDSTv9kme sDEmgZ2Arfex/TcUdHtGyOlrXYZNwvznynmNc75d4SfyIa99ZJDJbAxPZkwjN6vnvs amxhEUpAsg+jW83CGCh9vFZvREjPgTGyd7mnlK/U= Received: by pali.im (Postfix) id EA64758E; Wed, 15 Apr 2020 18:04:03 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Jason Cooper , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Thomas Petazzoni , Lorenzo Pieralisi , Andrew Murray , Bjorn Helgaas , Remi Pommarel , =?utf-8?q?Marek_Beh=C3=BAn?= , Tomasz Maciej Nowak , Xogium Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH 8/8] PCI: aardvark: Add FIXME for code which access PCIE_CORE_CMD_STATUS_REG Date: Wed, 15 Apr 2020 18:03:48 +0200 Message-Id: <20200415160348.1146-4-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200415160054.951-1-pali@kernel.org> References: <20200415160054.951-1-pali@kernel.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Register PCIE_CORE_CMD_STATUS_REG is applicable only when aardvark controller is configured for Endpoint mode. Which is not the case of current kernel driver. Signed-off-by: Pali Rohár --- drivers/pci/controller/pci-aardvark.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 6a97a3838098..a1cebc734f2d 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -423,6 +423,12 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) advk_writel(pcie, reg, PCIE_CORE_LINK_CTRL_STAT_REG); } while (1); + /* + * FIXME: Following code which access PCIE_CORE_CMD_STATUS_REG register + * is suspicious. This register is applicable only when the PCI + * controller is configured for Endpoint mode. And not when it + * is configured for Root Complex. + */ reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG); reg |= PCIE_CORE_CMD_MEM_ACCESS_EN | PCIE_CORE_CMD_IO_ACCESS_EN |