From patchwork Wed Mar 25 02:28:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 202871 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96C04C54FD2 for ; Wed, 25 Mar 2020 02:34:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6FD4420724 for ; Wed, 25 Mar 2020 02:34:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=flygoat.com header.i=jiaxun.yang@flygoat.com header.b="U3fLccN5" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727316AbgCYCel (ORCPT ); Tue, 24 Mar 2020 22:34:41 -0400 Received: from sender3-op-o12.zoho.com.cn ([124.251.121.243]:17873 "EHLO sender3-op-o12.zoho.com.cn" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727268AbgCYCel (ORCPT ); Tue, 24 Mar 2020 22:34:41 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1585103520; s=mail; d=flygoat.com; i=jiaxun.yang@flygoat.com; h=From:To:Cc:Message-ID:Subject:Date:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Content-Type; bh=ptczmo4zdH5SitmdgLb31uq0UnwEPiyg4NeT2CVppvU=; b=U3fLccN5PpEN49FIfATzRjJH80dFiWVFbyS9eIHRHxNtbZ3rggAtvKp3FwKs8mAG q94WljlhqdA05aYmCnLeye4R9VeNNfC8rIUJCz1DVLO3TjEnKUr+4lqC1fmktHctRVd uDRtf6qVragd+LeKaRrQvbOMick44tJkpo0Qj5Yk= Received: from localhost.localdomain (39.155.141.144 [39.155.141.144]) by mx.zoho.com.cn with SMTPS id 1585103517027656.9551692102889; Wed, 25 Mar 2020 10:31:57 +0800 (CST) From: Jiaxun Yang To: linux-mips@vger.kernel.org Cc: Jiaxun Yang , Huacai Chen , Marc Zyngier , Thomas Gleixner , Jason Cooper , Rob Herring , Mark Rutland , Thomas Bogendoerfer , Jonathan Corbet , Paul Cercueil , John Crispin , Matthias Brugger , Jean Delvare , "David S. Miller" , Mauro Carvalho Chehab , Jonathan Cameron , Greg Kroah-Hartman , Andy Shevchenko , Krzysztof Kozlowski , Andi Kleen , Geert Uytterhoeven , Kees Cook , Miquel Raynal , "H. Nikolaus Schaller" , "Eric W. Biederman" , Yinglu Yang , Tiezhu Yang , Allison Randal , Paul Burton , Manuel Lauss , Bartlomiej Zolnierkiewicz , Serge Semin , Matt Redfearn , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-ide@vger.kernel.org Message-ID: <20200325022916.106641-4-jiaxun.yang@flygoat.com> Subject: [PATCH v7 02/12] irqchip: loongson-liointc: Workaround LPC IRQ Errata Date: Wed, 25 Mar 2020 10:28:19 +0800 X-Mailer: git-send-email 2.26.0.rc2 In-Reply-To: <20200325022916.106641-1-jiaxun.yang@flygoat.com> References: <20200325022916.106641-1-jiaxun.yang@flygoat.com> MIME-Version: 1.0 X-ZohoCNMailClient: External Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The 1.0 version of that controller has a bug that status bit of LPC IRQ sometimes doesn't get set correctly. So we can always blame LPC IRQ when spurious interrupt happens at the parent interrupt line which LPC IRQ supposed to route to. Signed-off-by: Jiaxun Yang Co-developed-by: Huacai Chen Signed-off-by: Huacai Chen Reviewed-by: Marc Zyngier --- drivers/irqchip/irq-loongson-liointc.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-loongson-liointc.c b/drivers/irqchip/irq-loongson-liointc.c index 18de2c09ece4..7d2339e638db 100644 --- a/drivers/irqchip/irq-loongson-liointc.c +++ b/drivers/irqchip/irq-loongson-liointc.c @@ -32,6 +32,8 @@ #define LIOINTC_SHIFT_INTx 4 +#define LIOINTC_ERRATA_IRQ 10 + struct liointc_handler_data { struct liointc_priv *priv; u32 parent_int_map; @@ -41,6 +43,7 @@ struct liointc_priv { struct irq_chip_generic *gc; struct liointc_handler_data handler[LIOINTC_NUM_PARENT]; u8 map_cache[LIOINTC_CHIP_IRQ]; + bool have_lpc_irq_errata; }; static void liointc_chained_handle_irq(struct irq_desc *desc) @@ -54,8 +57,15 @@ static void liointc_chained_handle_irq(struct irq_desc *desc) pending = readl(gc->reg_base + LIOINTC_REG_INTC_STATUS); - if (!pending) - spurious_interrupt(); + if (!pending) { + /* Always blame LPC IRQ if we have that bug */ + if (handler->priv->have_lpc_irq_errata && + (handler->parent_int_map & ~gc->mask_cache & + BIT(LIOINTC_ERRATA_IRQ))) + pending = BIT(LIOINTC_ERRATA_IRQ); + else + spurious_interrupt(); + } while (pending) { int bit = __ffs(pending);