From patchwork Sat Mar 14 22:43:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 203320 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 65815C4CECE for ; Sun, 15 Mar 2020 01:40:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3CC3420637 for ; Sun, 15 Mar 2020 01:40:19 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="QNrWWyWW" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726892AbgCOBkQ (ORCPT ); Sat, 14 Mar 2020 21:40:16 -0400 Received: from mail-wm1-f66.google.com ([209.85.128.66]:38762 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726729AbgCOBkQ (ORCPT ); Sat, 14 Mar 2020 21:40:16 -0400 Received: by mail-wm1-f66.google.com with SMTP id t13so7888931wmi.3; Sat, 14 Mar 2020 18:40:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vJdE0AuVXiJ36mNfX/pKHsHI39Q9/zpf+j6FYiGSXMw=; b=QNrWWyWW8vK9IrfwwFeW4XuWps8p+RJtVmPpvgpuQGfC4AQfGYyorsuWKXMwspxsYV /iERMorGpvh5h06YA+N2JXtBYc+39BAByPxacsEiPex5gYjtLSepO1kZBWUZOPABXmoh t5onjH0u5uLBKUojMeHRuIhMpHBOndCMsSz4kqnbh7Q8SP9GPKPEyinFCQDw5wL0BVPq L8xlczCWo8xiyzCXTFvwlN4m4aJR2AQb5X4xVxy1IH0aSZ+ZvW/5GTvMEXjPuRwR48Hd Gns//wbii1ccl9zEvouIt/YPV9opXiy/uFYIxyJ9pHCzNwD73cbM0K5phsBKRF+EqrBm nQkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vJdE0AuVXiJ36mNfX/pKHsHI39Q9/zpf+j6FYiGSXMw=; b=C6/Q7Qb+YjIEMSUvHT2cX5/TApfE33aFTwW9Kz0EVB0aInB9sId5ZcDLr05Q4Uw+jd iuY7pnrAORqjLQBWOwy0ysu3rk30jCjfi+BPBQC1txpC8EFXHxVMS874JojuhiEGkDz7 g36frEs5LhMJbRjHig2CNdpAhCE7JwPt63BHupsUTG8ckjTX1fD6GsTiV2DIlZvkTBeE ZCJwnkiK3ZNLzG4ZmbGdhQsDVFii/AfEShPsi3Qn6q05K4AnIXBk1HxbVsbrJsQ0Gn/n 7Zu3axchBEH9Ikek+nGrGJq3if2bLAf0KLO8NfrqEtB7+sCN6pA1Z09oORq7wsNtlmT2 LThg== X-Gm-Message-State: ANhLgQ3WiBo6RZgnMwcKsfaKabYJXPy/QZmTuUmNu03PJ+AxMygxppU2 GDyo09fhxSasz6JuIgoLj/XqcERYeEo= X-Google-Smtp-Source: ADFU+vufBtUCuRE+ffzHkeys6l4lqDPG6E7fO4lYTZBaecUbjAC0rlm634GlJErKYLxE5STnOjnifA== X-Received: by 2002:a1c:8103:: with SMTP id c3mr17704074wmd.166.1584225837824; Sat, 14 Mar 2020 15:43:57 -0700 (PDT) Received: from localhost.localdomain ([79.115.60.40]) by smtp.gmail.com with ESMTPSA id 133sm23690732wmd.5.2020.03.14.15.43.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Mar 2020 15:43:57 -0700 (PDT) From: Vladimir Oltean To: broonie@kernel.org Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, shawnguo@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, eha@deif.com, angelo@sysam.it, andrew.smirnov@gmail.com, gustavo@embeddedor.com, weic@nvidia.com, mhosny@nvidia.com, michael@walle.cc, peng.ma@nxp.com Subject: [PATCH v3 01/12] spi: spi-fsl-dspi: Don't access reserved fields in SPI_MCR Date: Sun, 15 Mar 2020 00:43:29 +0200 Message-Id: <20200314224340.1544-2-olteanv@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200314224340.1544-1-olteanv@gmail.com> References: <20200314224340.1544-1-olteanv@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Vladimir Oltean The SPI_MCR_PCSIS macro assumes that the controller has a number of chip select signals equal to 6. That is not always the case, but actually is described through the driver-specific "spi-num-chipselects" device tree binding. LS1028A for example only has 4 chip selects. Don't write to the upper bits of the PCSIS field, which are reserved in the reference manual. Fixes: 349ad66c0ab0 ("spi:Add Freescale DSPI driver for Vybrid VF610 platform") Signed-off-by: Vladimir Oltean --- Changes in v4: None. Changes in v3: None. Changes in v2: Remove duplicate phrase in commit message. drivers/spi/spi-fsl-dspi.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 50e3382f0c50..6ca35881881b 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -22,7 +22,7 @@ #define SPI_MCR 0x00 #define SPI_MCR_MASTER BIT(31) -#define SPI_MCR_PCSIS (0x3F << 16) +#define SPI_MCR_PCSIS(x) ((x) << 16) #define SPI_MCR_CLR_TXF BIT(11) #define SPI_MCR_CLR_RXF BIT(10) #define SPI_MCR_XSPI BIT(3) @@ -1200,7 +1200,10 @@ static const struct regmap_config dspi_xspi_regmap_config[] = { static void dspi_init(struct fsl_dspi *dspi) { - unsigned int mcr = SPI_MCR_PCSIS; + unsigned int mcr; + + /* Set idle states for all chip select signals to high */ + mcr = SPI_MCR_PCSIS(GENMASK(dspi->ctlr->num_chipselect - 1, 0)); if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE) mcr |= SPI_MCR_XSPI; From patchwork Sat Mar 14 22:43:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 203322 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 01E34C4CECE for ; Sun, 15 Mar 2020 01:37:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C172D2076D for ; Sun, 15 Mar 2020 01:37:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Ae2m+G1z" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726908AbgCOBhe (ORCPT ); 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bh=8rTQ0IClwX4HmkVqkn09uapHZa8iKCCdQ/w5jqdWFX0=; b=DbGeD91oSlOlGvJtJ5apeCPjGyzDK1WNTQ8FqQ9hZp66Ds1EenA1U8Dzog+taSljdU QvTigfalruzOpLpP/VwW0e5IHzLGnUT60Itb/QJKzVRQ5jad7mC9QtoWrXlREsOzSD7H 3f65l5DzfKwhmM3QjS5f/3B1WRxNrJ/Cinpl4tIq7LN+Y7Sm6m32bzx5EUlHASXwZUW8 DKlWr3CdChs/cTURSHrSLGj2Q4V7ofjgW3nbq/h3X3FirxF7xJ3JGH7CBLpBYtgavBxh ADa/g5BCS2tZAbA1EKZc7xFUibHpekyzQjpGT2eZ+oHK/mNiYxmorvae8RMRUXqNcHpQ lqIg== X-Gm-Message-State: ANhLgQ0tRYcmZyS7jDEnxzQYVe8btlTJvBt/UH1xgXB0Tg7qtewhN8AZ emckHyXsuIgp/2Gw0U6yjLZi6OkrvGc= X-Google-Smtp-Source: ADFU+vsOPU5iXtGc4c5vLHVbG26F/KzISRMwd6S+1Pl4xvCyIqJRvAy6s6KTEGb7+32TGGMa0e8vFQ== X-Received: by 2002:a5d:528e:: with SMTP id c14mr26365240wrv.308.1584225843285; Sat, 14 Mar 2020 15:44:03 -0700 (PDT) Received: from localhost.localdomain ([79.115.60.40]) by smtp.gmail.com with ESMTPSA id 133sm23690732wmd.5.2020.03.14.15.44.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Mar 2020 15:44:02 -0700 (PDT) From: Vladimir Oltean To: broonie@kernel.org Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, shawnguo@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, eha@deif.com, angelo@sysam.it, andrew.smirnov@gmail.com, gustavo@embeddedor.com, weic@nvidia.com, mhosny@nvidia.com, michael@walle.cc, peng.ma@nxp.com Subject: [PATCH v3 05/12] spi: spi-fsl-dspi: Protect against races on dspi->words_in_flight Date: Sun, 15 Mar 2020 00:43:33 +0200 Message-Id: <20200314224340.1544-6-olteanv@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200314224340.1544-1-olteanv@gmail.com> References: <20200314224340.1544-1-olteanv@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Vladimir Oltean dspi->words_in_flight is a variable populated in the *_write functions and used in the dspi_fifo_read function. It is also used in dspi_fifo_write, immediately after transmission, to update the message->actual_length variable used by higher layers such as spi-mem for integrity checking. But it may happen that the IRQ which calls dspi_fifo_read to be triggered before the updating of message->actual_length takes place. In that case, dspi_fifo_read will decrement dspi->words_in_flight to -1, and that will cause an invalid modification of message->actual_length. Make the simplest fix possible: don't decrement the actual shared variable in dspi->words_in_flight from dspi_fifo_read, but actually a copy of it which is on stack. Suggested-by: Michael Walle Signed-off-by: Vladimir Oltean --- Changes in v4: Patch is new. drivers/spi/spi-fsl-dspi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 51224b772680..3ac004aa2abd 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -765,8 +765,10 @@ static u32 dspi_popr_read(struct fsl_dspi *dspi) static void dspi_fifo_read(struct fsl_dspi *dspi) { + int num_fifo_entries = dspi->words_in_flight; + /* Read one FIFO entry and push to rx buffer */ - while (dspi->words_in_flight--) + while (num_fifo_entries--) dspi_push_rx(dspi, dspi_popr_read(dspi)); } From patchwork Sat Mar 14 22:43:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Oltean X-Patchwork-Id: 203325 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BEC5C0044D for ; Sun, 15 Mar 2020 01:35:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 718BA20637 for ; Sun, 15 Mar 2020 01:35:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="dX3pHkte" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726613AbgCOBfq (ORCPT ); Sat, 14 Mar 2020 21:35:46 -0400 Received: from mail-ed1-f65.google.com ([209.85.208.65]:42214 "EHLO mail-ed1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726559AbgCOBfp (ORCPT ); Sat, 14 Mar 2020 21:35:45 -0400 Received: by mail-ed1-f65.google.com with SMTP id b21so6937247edy.9; Sat, 14 Mar 2020 18:35:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=FHEa/0MhybiTV6M1eLx+ql9TZNVB4VsBUDo2Iy66e9w=; b=dX3pHktetchEsEcqrTMseBKgDEbB8h/wp7Qu4l0ORNQ9n20/+3E21BxEW07QY29/gm zrqCbTCBYqtWRLj5qUt0zaPetDrr/TquV3ceA9doCsL7T2gZU6s+kQtZo7raofORPUeN TvQGI4KiMgglz4Ae5lMpqzL1T4cpdZ5Qmx9zYwa0EYHCTi8J3OUGvOLIH8RM43uazfLh TAHnzXPG5pXtR1+qP+oaH+vUi8EDdKLUGdROPAdYxWgvGEPaBNPw4zTw4YN9uex36zrY M8nAmWPmEZfr3njWZs+Xl9A4e1wAvSriLxG5mZKG4lBjbrv1wnxtwWT3wYuc9c4Ylv93 +SAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=FHEa/0MhybiTV6M1eLx+ql9TZNVB4VsBUDo2Iy66e9w=; b=HfmxWa70gM8ORPXtztjUayEIRnktJfM/4YuBSKnJW6+hcOcs6Wd5ihGKkWkz0IE53k r5uvuMKpDkwc6jkDIxuW11jbXIlqaFbPjb4c7Nb6U98H74E0TvXPgCuhSX8f2FNGVEO7 /QsQ6CqhvQDeCvnqqA8hkQI0XrLJtfSyr6q9xEGlWZIbqTl0+ne0htBOKSwQ59R3uLEp 9cgzVWrHIOCjGfJVcmvyeJYmRP4k0oXLPk9BphltrlBCeL+ZAqieGBEDcfs6aYz8oIIL RqijSmbSe0dl9mHucR9r0phzxl5nNvp7GgaGVrOlpoHayJ8fD8cpIob5jeAMDcRc1p1z qO7Q== X-Gm-Message-State: ANhLgQ0q7dm+/P261fuyKGpMM6VYF602F+ZHXvmtTWaPUeJD25FW+QnI 2bTQFKhhucPjopeKKWdXPdOu+sTXyfI= X-Google-Smtp-Source: ADFU+vvGqefJTl5dI11r4MrJ1NyEWWsbP92rkqouOMCOP4/IJxsegR70E0Fhrutde3amv8krRBJ5EQ== X-Received: by 2002:a5d:4488:: with SMTP id j8mr3462175wrq.306.1584225847484; Sat, 14 Mar 2020 15:44:07 -0700 (PDT) Received: from localhost.localdomain ([79.115.60.40]) by smtp.gmail.com with ESMTPSA id 133sm23690732wmd.5.2020.03.14.15.44.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Mar 2020 15:44:07 -0700 (PDT) From: Vladimir Oltean To: broonie@kernel.org Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, shawnguo@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, eha@deif.com, angelo@sysam.it, andrew.smirnov@gmail.com, gustavo@embeddedor.com, weic@nvidia.com, mhosny@nvidia.com, michael@walle.cc, peng.ma@nxp.com Subject: [PATCH v3 08/12] spi: spi-fsl-dspi: Fix interrupt-less DMA mode taking an XSPI code path Date: Sun, 15 Mar 2020 00:43:36 +0200 Message-Id: <20200314224340.1544-9-olteanv@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200314224340.1544-1-olteanv@gmail.com> References: <20200314224340.1544-1-olteanv@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Vladimir Oltean Interrupts are not necessary for DMA functionality, since the completion event is provided by the DMA driver. But if the driver fails to request the IRQ defined in the device tree, it will call dspi_poll which would make the driver hang waiting for data to become available in the RX FIFO. Fixes: c55be3059159 ("spi: spi-fsl-dspi: Use poll mode in case the platform IRQ is missing") Signed-off-by: Vladimir Oltean --- Changes in v4: Patch is new. drivers/spi/spi-fsl-dspi.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index a8aef5690c5d..eab4929330e1 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -974,13 +974,15 @@ static int dspi_transfer_one_message(struct spi_controller *ctlr, goto out; } - if (!dspi->irq) { - do { - status = dspi_poll(dspi); - } while (status == -EINPROGRESS); - } else if (trans_mode != DSPI_DMA_MODE) { - wait_for_completion(&dspi->xfer_done); - reinit_completion(&dspi->xfer_done); + if (trans_mode != DSPI_DMA_MODE) { + if (dspi->irq) { + wait_for_completion(&dspi->xfer_done); + reinit_completion(&dspi->xfer_done); + } else { + do { + status = dspi_poll(dspi); + } while (status == -EINPROGRESS); + } } spi_transfer_delay_exec(transfer); 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Sat, 14 Mar 2020 15:44:09 -0700 (PDT) From: Vladimir Oltean To: broonie@kernel.org Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, shawnguo@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, eha@deif.com, angelo@sysam.it, andrew.smirnov@gmail.com, gustavo@embeddedor.com, weic@nvidia.com, mhosny@nvidia.com, michael@walle.cc, peng.ma@nxp.com Subject: [PATCH v3 10/12] spi: spi-fsl-dspi: Add support for LS1028A Date: Sun, 15 Mar 2020 00:43:38 +0200 Message-Id: <20200314224340.1544-11-olteanv@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200314224340.1544-1-olteanv@gmail.com> References: <20200314224340.1544-1-olteanv@gmail.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Vladimir Oltean This is similar to the DSPI instantiation on LS1028A, except that: - The A-011218 erratum has been fixed, so DMA works - The endianness is different, which has implications on XSPI mode Some benchmarking with the following command: spidev_test --device /dev/spidev2.0 --bpw 8 --size 256 --cpha --iter 10000000 --speed 20000000 shows that in DMA mode, it can achieve around 2400 kbps, and in XSPI mode, the same command goes up to 4700 kbps. This is somewhat to be expected, since the DMA buffer size is extremely small at 8 bytes, the winner becomes whomever can prepare the buffers for transmission quicker, and DMA mode has higher overhead there. So XSPI FIFO mode has been chosen as the operating mode for this chip. Signed-off-by: Vladimir Oltean --- Changes in v4: None. Changes in v3: Removed the dma_bufsize variable (obsoleted by 03/12). Changes in v2: Switch to DSPI_XSPI_MODE. drivers/spi/spi-fsl-dspi.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 86255d38ffcf..b6d7e6f383ec 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -124,6 +124,7 @@ struct fsl_dspi_devtype_data { enum { LS1021A, LS1012A, + LS1028A, LS1043A, LS1046A, LS2080A, @@ -151,6 +152,11 @@ static const struct fsl_dspi_devtype_data devtype_data[] = { .max_clock_factor = 8, .fifo_size = 16, }, + [LS1028A] = { + .trans_mode = DSPI_XSPI_MODE, + .max_clock_factor = 8, + .fifo_size = 4, + }, [LS1043A] = { /* Has A-011218 DMA erratum */ .trans_mode = DSPI_XSPI_MODE, @@ -1059,6 +1065,9 @@ static const struct of_device_id fsl_dspi_dt_ids[] = { }, { .compatible = "fsl,ls1012a-dspi", .data = &devtype_data[LS1012A], + }, { + .compatible = "fsl,ls1028a-dspi", + .data = &devtype_data[LS1028A], }, { .compatible = "fsl,ls1043a-dspi", .data = &devtype_data[LS1043A], From patchwork Sat Mar 14 22:43:40 2020 Content-Type: text/plain; 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On the reference design board, these are exported to either the mikroBUS1 or mikroBUS2 connector (according to the CPLD register BRDCFG3[SPI3]). Signed-off-by: Vladimir Oltean --- Changes in v4: None. Changes in v3: None. Changes in v2: Change compatible string for spidev node. arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts index 6d05b76c2c7a..0d27b5667b8c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts @@ -83,6 +83,20 @@ }; }; +&dspi2 { + bus-num = <2>; + status = "okay"; + + /* mikroBUS1 */ + spidev@0 { + compatible = "rohm,dh2228fv"; + spi-max-frequency = <20000000>; + fsl,spi-cs-sck-delay = <100>; + fsl,spi-sck-cs-delay = <100>; + reg = <0>; + }; +}; + &esdhc { sd-uhs-sdr104; sd-uhs-sdr50;