From patchwork Tue Aug 22 15:17:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Murphy X-Patchwork-Id: 110686 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp2828504qge; Tue, 22 Aug 2017 08:17:59 -0700 (PDT) X-Received: by 10.84.211.66 with SMTP id b60mr1168780pli.150.1503415079879; Tue, 22 Aug 2017 08:17:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503415079; cv=none; d=google.com; s=arc-20160816; b=G6RkYkW6c1ANiKElsXgh0C2qpQ76SQc+RvDpg+VhuPzqnO3i9Xvrdlnj304A3Ln4FR k+XtuHcPudZHqWxb1Ma1W8wgQUl6tMZIuSVH58leyfIzPPCdc9tt+OpBU/kOePcAE+7o AXB9yOrnztKO8rdlmy7xSEC9dmkTiweVv0t+j+It0Fw0h2RSpcO28Z/Hq+RgqRcTSHi4 z0va7tqqGLeeZ92CPwku3dCmZKrdBcGEFhLTR6WYadin7AOzDkig5lSSq3yisKm6ydVi +e1ta0iSIl244yESGYcLRiKxVV/V+Y/9i4gDdkOaJi7Q1Fv91bxplv44+JqFELoOhBuH eCDw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=MW83RV+JohJBXjKrsgdnaFYBOErcD1AJz1TSlVIvmMY=; b=oLXxdn7ZEpK45AkqCB2pRTWTrCAUX3BLycbzruxlo0wIp0XsMSFMFizeBVU4+RxPg9 CPJzHp/JFjv0Szk+i2HWYjlwedlAHyJpjXEMXnYExMnsTTawIYvL1EVLB2T0wQLZhUgV MF4MbZxCIKlz9ZSEwyHW4MukiY5cmwxMhk7qbS5AQHa/NHNcAmxipN1kNaIHKpZrVPZl ffw6XvtkOIaeAehpAbL4h5yZjM52Y50tYCJGm7GgytjVJhkGlpxg3f2kV3m3NfWB9Lr7 mdA/dsHeQrBV0ZPajc/omuZ+jNRZrpYBp2V5yV6rc20XzK9eui+ixgapVFVO1mQ24FvH 9sCQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u16si9858378plk.296.2017.08.22.08.17.59; Tue, 22 Aug 2017 08:17:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933166AbdHVPR5 (ORCPT + 26 others); Tue, 22 Aug 2017 11:17:57 -0400 Received: from foss.arm.com ([217.140.101.70]:45416 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932941AbdHVPRy (ORCPT ); Tue, 22 Aug 2017 11:17:54 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 90A8B15A2; Tue, 22 Aug 2017 08:17:54 -0700 (PDT) Received: from e110467-lin.cambridge.arm.com (e110467-lin.cambridge.arm.com [10.1.211.24]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3B2D03F577; Tue, 22 Aug 2017 08:17:53 -0700 (PDT) From: Robin Murphy To: joro@8bytes.org Cc: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, thunder.leizhen@huawei.com, ard.biesheuvel@linaro.org, nwatters@codeaurora.org, ray.jui@broadcom.com Subject: [PATCH v3 1/4] iommu/iova: Optimise rbtree searching Date: Tue, 22 Aug 2017 16:17:42 +0100 Message-Id: <36e6a673dea7e22210cb9e28bbd50b3b78d7d835.1503412074.git.robin.murphy@arm.com> X-Mailer: git-send-email 2.13.4.dirty In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Zhen Lei Checking the IOVA bounds separately before deciding which direction to continue the search (if necessary) results in redundantly comparing both pfns twice each. GCC can already determine that the final comparison op is redundant and optimise it down to 3 in total, but we can go one further with a little tweak of the ordering (which makes the intent of the code that much cleaner as a bonus). Signed-off-by: Zhen Lei Tested-by: Ard Biesheuvel Tested-by: Zhen Lei [rm: rewrote commit message to clarify] Signed-off-by: Robin Murphy --- v3: No change drivers/iommu/iova.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) -- 2.13.4.dirty diff --git a/drivers/iommu/iova.c b/drivers/iommu/iova.c index 246f14c83944..8f7552dc4e04 100644 --- a/drivers/iommu/iova.c +++ b/drivers/iommu/iova.c @@ -289,15 +289,12 @@ private_find_iova(struct iova_domain *iovad, unsigned long pfn) while (node) { struct iova *iova = rb_entry(node, struct iova, node); - /* If pfn falls within iova's range, return iova */ - if ((pfn >= iova->pfn_lo) && (pfn <= iova->pfn_hi)) { - return iova; - } - if (pfn < iova->pfn_lo) node = node->rb_left; - else if (pfn > iova->pfn_lo) + else if (pfn > iova->pfn_hi) node = node->rb_right; + else + return iova; /* pfn falls within iova's range */ } return NULL; From patchwork Tue Aug 22 15:17:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Murphy X-Patchwork-Id: 110688 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp2829467qge; Tue, 22 Aug 2017 08:18:40 -0700 (PDT) X-Received: by 10.99.115.93 with SMTP id d29mr1100599pgn.364.1503415120841; Tue, 22 Aug 2017 08:18:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503415120; cv=none; d=google.com; s=arc-20160816; b=rNZ1OKMVgzYMh6U7Dpkr1uIOphf7WcXLW+j+PztSDHmKVp1v/3PaONp9QLkpjKbfhf G+DYApE9sc51xsJq7L9r+5X/3InEJflTaV49AkM3ofl0OgIUow8a8RQOXJfAet93E2H1 jxMBQrs8sDRt62nNuBMa+Hkc7RsfOd6mUD+Hk+VJeMkSUSe36Nt/MWjH7RCjyxleF1re 7xNLCqNUXbqzsaiOJ1M6S4SU2hxmqeXi8+cCKZ37kHv8aT1BlbjRP/N+P23ZPrGMs8Jd Un7vmOV0BggdKeFxOGuB/Fde9fP2u/sMZmyJ9DQOFl7a57Pr2P0ErBIiQLtWctUubNrw 18Qw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=KLqA6DQRYq9vuuMlLlVF/MncbEfz0m5uEghkgzmu8Dk=; b=M0rJWaQh5nb853v5VqWBuxMboyYxlYMMwa+OD15AyllefT3MMzL7GkWVw98TKQ/1WG KZ6vf7uQfS4XrO3CXzXZXHF140ay9jfcxCXTa+Qy1srnP+bVWnPCzYTvBXBKy6QmBrEH qFuDweTk1ZZOOWyw2+DVXvTuAHMVU6M3+3JLMUAk3O8GEDpHw0HeVE40SAYoVKHP0E9O b5uYW0/H1uWPwn81Eeu9Ce6piui+2uDH/ee0UN37Ju5XpRgHD293pkqdNxVbdV/+JiEj qADxRhiMxPwpZYGDP4t+KuO67kYgtQlu12g+HxBvTha2GDrEK9XH7xesjMLPXO3TEdEZ OAqw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a65si8939485pli.624.2017.08.22.08.18.40; Tue, 22 Aug 2017 08:18:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933194AbdHVPSi (ORCPT + 26 others); Tue, 22 Aug 2017 11:18:38 -0400 Received: from foss.arm.com ([217.140.101.70]:45432 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932989AbdHVPR4 (ORCPT ); Tue, 22 Aug 2017 11:17:56 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 30D7815AD; Tue, 22 Aug 2017 08:17:56 -0700 (PDT) Received: from e110467-lin.cambridge.arm.com (e110467-lin.cambridge.arm.com [10.1.211.24]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id CF3793F577; Tue, 22 Aug 2017 08:17:54 -0700 (PDT) From: Robin Murphy To: joro@8bytes.org Cc: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, thunder.leizhen@huawei.com, ard.biesheuvel@linaro.org, nwatters@codeaurora.org, ray.jui@broadcom.com Subject: [PATCH v3 2/4] iommu/iova: Optimise the padding calculation Date: Tue, 22 Aug 2017 16:17:43 +0100 Message-Id: <27abf39c80518a2ce4c98048577ec803ebfd8423.1503412074.git.robin.murphy@arm.com> X-Mailer: git-send-email 2.13.4.dirty In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Zhen Lei The mask for calculating the padding size doesn't change, so there's no need to recalculate it every loop iteration. Furthermore, Once we've done that, it becomes clear that we don't actually need to calculate a padding size at all - by flipping the arithmetic around, we can just combine the upper limit, size, and mask directly to check against the lower limit. For an arm64 build, this alone knocks 16% off the size of the entire alloc_iova() function! Signed-off-by: Zhen Lei Tested-by: Ard Biesheuvel Tested-by: Zhen Lei [rm: simplified more of the arithmetic, rewrote commit message] Signed-off-by: Robin Murphy --- v3: No change drivers/iommu/iova.c | 40 ++++++++++++++-------------------------- 1 file changed, 14 insertions(+), 26 deletions(-) -- 2.13.4.dirty diff --git a/drivers/iommu/iova.c b/drivers/iommu/iova.c index 8f7552dc4e04..d094d1ca8f23 100644 --- a/drivers/iommu/iova.c +++ b/drivers/iommu/iova.c @@ -129,16 +129,6 @@ iova_insert_rbtree(struct rb_root *root, struct iova *iova, rb_insert_color(&iova->node, root); } -/* - * Computes the padding size required, to make the start address - * naturally aligned on the power-of-two order of its size - */ -static unsigned int -iova_get_pad_size(unsigned int size, unsigned int limit_pfn) -{ - return (limit_pfn - size) & (__roundup_pow_of_two(size) - 1); -} - static int __alloc_and_insert_iova_range(struct iova_domain *iovad, unsigned long size, unsigned long limit_pfn, struct iova *new, bool size_aligned) @@ -146,7 +136,10 @@ static int __alloc_and_insert_iova_range(struct iova_domain *iovad, struct rb_node *prev, *curr = NULL; unsigned long flags; unsigned long saved_pfn; - unsigned int pad_size = 0; + unsigned long align_mask = ~0UL; + + if (size_aligned) + align_mask <<= __fls(size); /* Walk the tree backwards */ spin_lock_irqsave(&iovad->iova_rbtree_lock, flags); @@ -156,31 +149,26 @@ static int __alloc_and_insert_iova_range(struct iova_domain *iovad, while (curr) { struct iova *curr_iova = rb_entry(curr, struct iova, node); - if (limit_pfn <= curr_iova->pfn_lo) { + if (limit_pfn <= curr_iova->pfn_lo) goto move_left; - } else if (limit_pfn > curr_iova->pfn_hi) { - if (size_aligned) - pad_size = iova_get_pad_size(size, limit_pfn); - if ((curr_iova->pfn_hi + size + pad_size) < limit_pfn) - break; /* found a free slot */ - } + + if (((limit_pfn - size) & align_mask) > curr_iova->pfn_hi) + break; /* found a free slot */ + limit_pfn = curr_iova->pfn_lo; move_left: prev = curr; curr = rb_prev(curr); } - if (!curr) { - if (size_aligned) - pad_size = iova_get_pad_size(size, limit_pfn); - if ((iovad->start_pfn + size + pad_size) > limit_pfn) { - spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags); - return -ENOMEM; - } + if (limit_pfn < size || + (!curr && ((limit_pfn - size) & align_mask) < iovad->start_pfn)) { + spin_unlock_irqrestore(&iovad->iova_rbtree_lock, flags); + return -ENOMEM; } /* pfn_lo will point to size aligned address if size_aligned is set */ - new->pfn_lo = limit_pfn - (size + pad_size); + new->pfn_lo = (limit_pfn - size) & align_mask; new->pfn_hi = new->pfn_lo + size - 1; /* If we have 'prev', it's a valid place to start the insertion. */ From patchwork Tue Aug 22 15:17:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robin Murphy X-Patchwork-Id: 110687 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp2828844qge; Tue, 22 Aug 2017 08:18:13 -0700 (PDT) X-Received: by 10.84.178.101 with SMTP id y92mr1174444plb.422.1503415093535; Tue, 22 Aug 2017 08:18:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503415093; cv=none; d=google.com; s=arc-20160816; b=XQ14GKyKVH/YjTnqQaSCbWcpNlu74TNhQiTA0S4DWSD8miD4FzAokUmMWblyOrsNFe 9ypWsXhHwIcxtNP1LO2PldsdL68aWfrBnTLm3SrTTOwpz/XPRk4AzC1eDW2b+eMcawAB LSPYJqxiAxCJuMGPpgw1XR6EtiTXuKaKBr8h4oOfyYygtmmf+Fb9bKNF/M7WDNe28NBL dWZHMnbmMATA3278oEBjCRqpCrVDVZPskhR79CyCeSJFmygza/9nKu3flSEV6ckE560z bQfekadtVvYBl46Pabf6GGFuTuO1xK4MkjzSMdatRb8orMByaoWJRJimn9/p0HBVGyMF sP+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=C1tOadlvLrpEhVH74+PkfCX1vghuTs8QYtr8YnP839I=; b=hSnTHp9m898hpuMu6Lf52YasEa19gM3RPjJxMAXETwAGYH/ktlVa8mb6NqO7quiHkb 0JwSvt4ZgijX2TdERCg84Z37hqi+yEiwvWBBqaLM8E5ZX3ojwEqFuWhB109TVYBABoyK Ue0U3BqPy2ctTQPl1H6cJBGYvYsdj6rts30NWsgowgSfIEq3dWRodYjGkYmWYC2WQ9j1 8mLOqPSvajyU63R1RLbm3EkLDTDGNwaSk0lAE+ujRjzYrzaQb8+8BuWqdMUtwuU+hjL0 xxc5y/pJlXEN/+g1mc0RueEk3BB9v4V5aZvo8wY62XRrx3v1TE8668HoCCrERnrZpUQj r07A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a65si8939485pli.624.2017.08.22.08.18.13; Tue, 22 Aug 2017 08:18:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933189AbdHVPSK (ORCPT + 26 others); Tue, 22 Aug 2017 11:18:10 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:45464 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933081AbdHVPSA (ORCPT ); Tue, 22 Aug 2017 11:18:00 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2287015A2; Tue, 22 Aug 2017 08:18:00 -0700 (PDT) Received: from e110467-lin.cambridge.arm.com (e110467-lin.cambridge.arm.com [10.1.211.24]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0FF7D3F577; Tue, 22 Aug 2017 08:17:57 -0700 (PDT) From: Robin Murphy To: joro@8bytes.org Cc: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, thunder.leizhen@huawei.com, ard.biesheuvel@linaro.org, nwatters@codeaurora.org, ray.jui@broadcom.com, Thierry Reding , Jonathan Hunter , David Airlie , Sudeep Dutt , Ashutosh Dixit Subject: [PATCH v3 4/4] iommu/iova: Make dma_32bit_pfn implicit Date: Tue, 22 Aug 2017 16:17:45 +0100 Message-Id: <7a954db09b8ee231ceaa830d885bdbb139d2f8aa.1503412074.git.robin.murphy@arm.com> X-Mailer: git-send-email 2.13.4.dirty In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Zhen Lei Now that the cached node optimisation can apply to all allocations, the couple of users which were playing tricks with dma_32bit_pfn in order to benefit from it can stop doing so. Conversely, there is also no need for all the other users to explicitly calculate a 'real' 32-bit PFN, when init_iova_domain() can happily do that itself from the page granularity. CC: Thierry Reding CC: Jonathan Hunter CC: David Airlie CC: Sudeep Dutt CC: Ashutosh Dixit Signed-off-by: Zhen Lei Tested-by: Ard Biesheuvel Tested-by: Zhen Lei [rm: use iova_shift(), rewrote commit message] Signed-off-by: Robin Murphy --- v3: No change drivers/gpu/drm/tegra/drm.c | 3 +-- drivers/gpu/host1x/dev.c | 3 +-- drivers/iommu/amd_iommu.c | 7 ++----- drivers/iommu/dma-iommu.c | 18 +----------------- drivers/iommu/intel-iommu.c | 11 +++-------- drivers/iommu/iova.c | 4 ++-- drivers/misc/mic/scif/scif_rma.c | 3 +-- include/linux/iova.h | 5 ++--- 8 files changed, 13 insertions(+), 41 deletions(-) -- 2.13.4.dirty diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c index 518f4b69ea53..81e9ae1ee90b 100644 --- a/drivers/gpu/drm/tegra/drm.c +++ b/drivers/gpu/drm/tegra/drm.c @@ -150,8 +150,7 @@ static int tegra_drm_load(struct drm_device *drm, unsigned long flags) order = __ffs(tegra->domain->pgsize_bitmap); init_iova_domain(&tegra->carveout.domain, 1UL << order, - carveout_start >> order, - carveout_end >> order); + carveout_start >> order); tegra->carveout.shift = iova_shift(&tegra->carveout.domain); tegra->carveout.limit = carveout_end >> tegra->carveout.shift; diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c index 2c58a390123a..57c8eed0ed71 100644 --- a/drivers/gpu/host1x/dev.c +++ b/drivers/gpu/host1x/dev.c @@ -193,8 +193,7 @@ static int host1x_probe(struct platform_device *pdev) order = __ffs(host->domain->pgsize_bitmap); init_iova_domain(&host->iova, 1UL << order, - geometry->aperture_start >> order, - geometry->aperture_end >> order); + geometry->aperture_start >> order); host->iova_end = geometry->aperture_end; } diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index 688e77576e5a..a12e3e12014a 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@ -63,7 +63,6 @@ /* IO virtual address start page frame number */ #define IOVA_START_PFN (1) #define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT) -#define DMA_32BIT_PFN IOVA_PFN(DMA_BIT_MASK(32)) /* Reserved IOVA ranges */ #define MSI_RANGE_START (0xfee00000) @@ -2010,8 +2009,7 @@ static struct dma_ops_domain *dma_ops_domain_alloc(void) if (!dma_dom->domain.pt_root) goto free_dma_dom; - init_iova_domain(&dma_dom->iovad, PAGE_SIZE, - IOVA_START_PFN, DMA_32BIT_PFN); + init_iova_domain(&dma_dom->iovad, PAGE_SIZE, IOVA_START_PFN); /* Initialize reserved ranges */ copy_reserved_iova(&reserved_iova_ranges, &dma_dom->iovad); @@ -2912,8 +2910,7 @@ static int init_reserved_iova_ranges(void) struct pci_dev *pdev = NULL; struct iova *val; - init_iova_domain(&reserved_iova_ranges, PAGE_SIZE, - IOVA_START_PFN, DMA_32BIT_PFN); + init_iova_domain(&reserved_iova_ranges, PAGE_SIZE, IOVA_START_PFN); lockdep_set_class(&reserved_iova_ranges.iova_rbtree_lock, &reserved_rbtree_key); diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index 9d1cebe7f6cb..191be9c80a8a 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -292,18 +292,7 @@ int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, /* ...then finally give it a kicking to make sure it fits */ base_pfn = max_t(unsigned long, base_pfn, domain->geometry.aperture_start >> order); - end_pfn = min_t(unsigned long, end_pfn, - domain->geometry.aperture_end >> order); } - /* - * PCI devices may have larger DMA masks, but still prefer allocating - * within a 32-bit mask to avoid DAC addressing. Such limitations don't - * apply to the typical platform device, so for those we may as well - * leave the cache limit at the top of their range to save an rb_last() - * traversal on every allocation. - */ - if (dev && dev_is_pci(dev)) - end_pfn &= DMA_BIT_MASK(32) >> order; /* start_pfn is always nonzero for an already-initialised domain */ if (iovad->start_pfn) { @@ -312,16 +301,11 @@ int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, pr_warn("Incompatible range for DMA domain\n"); return -EFAULT; } - /* - * If we have devices with different DMA masks, move the free - * area cache limit down for the benefit of the smaller one. - */ - iovad->dma_32bit_pfn = min(end_pfn + 1, iovad->dma_32bit_pfn); return 0; } - init_iova_domain(iovad, 1UL << order, base_pfn, end_pfn); + init_iova_domain(iovad, 1UL << order, base_pfn); if (!dev) return 0; diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 687f18f65cea..afa3b4e765e7 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -82,8 +82,6 @@ #define IOVA_START_PFN (1) #define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT) -#define DMA_32BIT_PFN IOVA_PFN(DMA_BIT_MASK(32)) -#define DMA_64BIT_PFN IOVA_PFN(DMA_BIT_MASK(64)) /* page table handling */ #define LEVEL_STRIDE (9) @@ -1874,8 +1872,7 @@ static int dmar_init_reserved_ranges(void) struct iova *iova; int i; - init_iova_domain(&reserved_iova_list, VTD_PAGE_SIZE, IOVA_START_PFN, - DMA_32BIT_PFN); + init_iova_domain(&reserved_iova_list, VTD_PAGE_SIZE, IOVA_START_PFN); lockdep_set_class(&reserved_iova_list.iova_rbtree_lock, &reserved_rbtree_key); @@ -1933,8 +1930,7 @@ static int domain_init(struct dmar_domain *domain, struct intel_iommu *iommu, int adjust_width, agaw; unsigned long sagaw; - init_iova_domain(&domain->iovad, VTD_PAGE_SIZE, IOVA_START_PFN, - DMA_32BIT_PFN); + init_iova_domain(&domain->iovad, VTD_PAGE_SIZE, IOVA_START_PFN); domain_reserve_special_ranges(domain); /* calculate AGAW */ @@ -4989,8 +4985,7 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width) { int adjust_width; - init_iova_domain(&domain->iovad, VTD_PAGE_SIZE, IOVA_START_PFN, - DMA_32BIT_PFN); + init_iova_domain(&domain->iovad, VTD_PAGE_SIZE, IOVA_START_PFN); domain_reserve_special_ranges(domain); /* calculate AGAW */ diff --git a/drivers/iommu/iova.c b/drivers/iommu/iova.c index b208f656f6a4..612b8f6ce34d 100644 --- a/drivers/iommu/iova.c +++ b/drivers/iommu/iova.c @@ -35,7 +35,7 @@ static void free_iova_rcaches(struct iova_domain *iovad); void init_iova_domain(struct iova_domain *iovad, unsigned long granule, - unsigned long start_pfn, unsigned long pfn_32bit) + unsigned long start_pfn) { /* * IOVA granularity will normally be equal to the smallest @@ -50,7 +50,7 @@ init_iova_domain(struct iova_domain *iovad, unsigned long granule, iovad->cached32_node = NULL; iovad->granule = granule; iovad->start_pfn = start_pfn; - iovad->dma_32bit_pfn = pfn_32bit + 1; + iovad->dma_32bit_pfn = 1UL << (32 - iova_shift(iovad)); init_iova_rcaches(iovad); } EXPORT_SYMBOL_GPL(init_iova_domain); diff --git a/drivers/misc/mic/scif/scif_rma.c b/drivers/misc/mic/scif/scif_rma.c index 329727e00e97..c824329f7012 100644 --- a/drivers/misc/mic/scif/scif_rma.c +++ b/drivers/misc/mic/scif/scif_rma.c @@ -39,8 +39,7 @@ void scif_rma_ep_init(struct scif_endpt *ep) struct scif_endpt_rma_info *rma = &ep->rma_info; mutex_init(&rma->rma_lock); - init_iova_domain(&rma->iovad, PAGE_SIZE, SCIF_IOVA_START_PFN, - SCIF_DMA_64BIT_PFN); + init_iova_domain(&rma->iovad, PAGE_SIZE, SCIF_IOVA_START_PFN); spin_lock_init(&rma->tc_lock); mutex_init(&rma->mmn_lock); INIT_LIST_HEAD(&rma->reg_list); diff --git a/include/linux/iova.h b/include/linux/iova.h index 0bb8df43b393..58c2a365c45f 100644 --- a/include/linux/iova.h +++ b/include/linux/iova.h @@ -102,7 +102,7 @@ struct iova *reserve_iova(struct iova_domain *iovad, unsigned long pfn_lo, unsigned long pfn_hi); void copy_reserved_iova(struct iova_domain *from, struct iova_domain *to); void init_iova_domain(struct iova_domain *iovad, unsigned long granule, - unsigned long start_pfn, unsigned long pfn_32bit); + unsigned long start_pfn); struct iova *find_iova(struct iova_domain *iovad, unsigned long pfn); void put_iova_domain(struct iova_domain *iovad); struct iova *split_and_remove_iova(struct iova_domain *iovad, @@ -170,8 +170,7 @@ static inline void copy_reserved_iova(struct iova_domain *from, static inline void init_iova_domain(struct iova_domain *iovad, unsigned long granule, - unsigned long start_pfn, - unsigned long pfn_32bit) + unsigned long start_pfn) { }