From patchwork Mon Aug 28 11:10:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 111143 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp4679974qge; Mon, 28 Aug 2017 04:10:59 -0700 (PDT) X-Received: by 10.98.155.140 with SMTP id e12mr191057pfk.194.1503918659177; Mon, 28 Aug 2017 04:10:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503918659; cv=none; d=google.com; s=arc-20160816; b=eOLetQIt+nWDfpH6+BebV91sHXp5QA+6iPU+Vo7YYa80h/y053suwpy6PAPGexFWNn E+96lYqdE0aw6BpG6Uy39+uJ9NTJmVnZQDq7jXBUYUlasLEOVjITEllWxYos4RhiN+/J kM9vxquz9lDwR4O5VrO0qXo/Pp/DuhfFt8E1th8OuMFpZFnLGacIiDTihmLc7omxrIx4 oX4OTYbjcAI0bTRlDgM56uSSMESI7cTit1PChs9D2u25hFbv31avgC5X9w8a71xVTmyk qNNpIRfxZJBsZRxDm0Nmy6D5zDq603mN2mEUdx4r89G4vA8ZS+OGgu7i9z6eDUEPKnR9 yPrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=l0bjWNlC9pKFi9Y039DzTElFOjmNz2+bdjywGxIUgA8=; b=VcHZyzJhK/9MzBYH9LL5q4Ps/FFBjEIHBVUhmc84lETRgzYJg4BI8ovXY4axBnmzHc 0Vzf7ouwWLeQuEN6xqGbDEOgkRWs+bDYrrtfxqQNZ+kAfCzvGTQrHNbf5PvmzeYUsc52 GD2A/ImCwd0eexO6qKWtoK8NWPi6gtaSYzd7VgU+sIEmHHAztm0vDsjHlENvnwL7Zvp6 Vcg78bYS3+LM6bKL/O/lOxmTrm2yMXDFn/SVySe9+KI2PVDald+ICMB9a4A0Q8wl0qK0 q9O6TJ1lwiCJ0KqR3isgBJL2eZ6Raz350h8fJNIrdg4fHSlcxEdmvRBTOUb+JhMtkCMI 0+9A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m23si97713plk.772.2017.08.28.04.10.58; Mon, 28 Aug 2017 04:10:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751417AbdH1LKz (ORCPT + 26 others); Mon, 28 Aug 2017 07:10:55 -0400 Received: from mx2.suse.de ([195.135.220.15]:38472 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751280AbdH1LKx (ORCPT ); Mon, 28 Aug 2017 07:10:53 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 6D327AB1E; Mon, 28 Aug 2017 11:10:51 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: Alessandro Zummo , Alexandre Belloni , linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Roc He , =?utf-8?b?6JKL?= =?utf-8?b?5Li955C0?= , =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v3 1/3] dt-bindings: rtc: Add Realtek RTD1295 Date: Mon, 28 Aug 2017 13:10:39 +0200 Message-Id: <20170828111041.17946-2-afaerber@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20170828111041.17946-1-afaerber@suse.de> References: <20170828111041.17946-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a binding for the RTC on the Realtek RTD119x/RTD129x SoC families. Acked-by: Rob Herring Signed-off-by: Andreas Färber --- v1 -> v2 -> v3: Unchanged .../devicetree/bindings/rtc/realtek,rtd119x.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/realtek,rtd119x.txt -- 2.12.3 diff --git a/Documentation/devicetree/bindings/rtc/realtek,rtd119x.txt b/Documentation/devicetree/bindings/rtc/realtek,rtd119x.txt new file mode 100644 index 000000000000..bbf1ccb5df31 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/realtek,rtd119x.txt @@ -0,0 +1,16 @@ +Realtek RTD129x Real-Time Clock +=============================== + +Required properties: +- compatible : Should be "realtek,rtd1295-rtc" +- reg : Specifies the physical base address and size +- clocks : Specifies the clock gate + + +Example: + + rtc@9801b600 { + compatible = "realtek,rtd1295-clk"; + reg = <0x9801b600 0x100>; + clocks = <&clkc RTD1295_CLK_EN_MISC_RTC>; + }; From patchwork Mon Aug 28 11:10:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 111145 Delivered-To: patch@linaro.org Received: by 10.140.95.78 with SMTP id h72csp4680867qge; Mon, 28 Aug 2017 04:11:51 -0700 (PDT) X-Received: by 10.84.215.219 with SMTP id g27mr226353plj.289.1503918710916; Mon, 28 Aug 2017 04:11:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1503918710; cv=none; d=google.com; s=arc-20160816; b=S5KUd4v/tCYcf0FL1P/U18qns5A6QZKTRzJQqwLfBMtxJErw2qn+OUQP/H9g50pGZd GgM1TxKAqVEeDQu5VHgbnP6Cy0k53NdaI+kXdghZDVKZx5Lb0dMNtfe9F1VX9OHbyLlM SqPFmiEFjquOWnCtkdQn7S3yhWhuFss054EHucqPm+gjGdSuJ9wCCuTLfdk3Mhr326QS eKepfI+2/hW6XJQtOyQyE6hcCOKARx94QiKGvaWWNDir0EssJ6vS/gF0YEqXWRHE5uFw k8CB0VgFopbMWAcQsjJvD11fem1RKTE2A28fpQmkBTVlFugh4AuW1uyW5X5ZeDQmvQ1f peYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=lEW2w6Ef7zwpTLSawfAfoxyKuReAO0n6ZijNaVK/fIg=; b=Oeb3TSNXmfjwCM24K0WctQfI/dYxK0k93fT6RhgNlip9UK5uLzupMBVVBnBBC5cXUC LP39Ke6e5vfYwY7Be2LAbOiZMj7MhBtcYqFFzgDoCE2cIkjzyFXpxFKKdgTFvT8EXS/c MZ7dTwpcEgdPDMZDyWnAF+dzBlKhG6EgckDvoDgLA5kiFM8sx995ibD0seAMbGlHblSL ux7NbE6jng+3zXzB6zeQKL6urLVli1G4xaFsbpg6iGbG7OSHItXRSrVhOfteUkn/DiCl YjZ34rjFeSRKhkn3F5iIbQXX5tO2Bf65kPrWyIangucC3XNhK2Uuxo5jnh8pO7Canuw/ P/Mg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r3si148983plb.292.2017.08.28.04.11.50; Mon, 28 Aug 2017 04:11:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751625AbdH1LLs (ORCPT + 26 others); Mon, 28 Aug 2017 07:11:48 -0400 Received: from mx2.suse.de ([195.135.220.15]:38486 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751271AbdH1LKx (ORCPT ); Mon, 28 Aug 2017 07:10:53 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 174A6AB9D; Mon, 28 Aug 2017 11:10:52 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: Alessandro Zummo , Alexandre Belloni , linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Roc He , =?utf-8?b?6JKL?= =?utf-8?b?5Li955C0?= , =?utf-8?q?Andreas_F=C3=A4rber?= Subject: [PATCH v3 2/3] rtc: Add Realtek RTD1295 Date: Mon, 28 Aug 2017 13:10:40 +0200 Message-Id: <20170828111041.17946-3-afaerber@suse.de> X-Mailer: git-send-email 2.12.3 In-Reply-To: <20170828111041.17946-1-afaerber@suse.de> References: <20170828111041.17946-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Based on QNAP's arch/arm/mach-rtk119x/driver/rtk_rtc_drv.c code and mach-rtk119x/driver/dc2vo/fpga/include/mis_reg.h register definitions. The base year 2014 was observed on all of Zidoo X9S, ProBox2 Ava and Beelink Lake I. Signed-off-by: Andreas Färber --- v2 -> v3: * Dropped spinlock (Andrew) * Refactored days-in-year helper to avoid rtc_year_days() v1 -> v2: * Dropped open/release in favor of probe/remove (Alexandre) * read_time: Reordered register accesses (Alexandre) * read_time/set_time: Refactored day calculations to avoid time64_t (Alexandre) * read_time: Retry if seconds change (Alexandre) * probe: Added missing RTCACR initialization code * set_time: Fixed year check (off by 1900) * set_time: Fixed new seconds (off by factor two) * Cleaned up debug output (Andrew) * Added spinlocks around register accesses * Added masks for register fields drivers/rtc/Kconfig | 8 ++ drivers/rtc/Makefile | 1 + drivers/rtc/rtc-rtd119x.c | 241 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 250 insertions(+) create mode 100644 drivers/rtc/rtc-rtd119x.c -- 2.12.3 diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 22efa21b1d81..d5a46f311ecb 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -1765,6 +1765,14 @@ config RTC_DRV_CPCAP Say y here for CPCAP rtc found on some Motorola phones and tablets such as Droid 4. +config RTC_DRV_RTD119X + bool "Realtek RTD129x RTC" + depends on ARCH_REALTEK || COMPILE_TEST + default ARCH_REALTEK + help + If you say yes here, you get support for the RTD1295 SoC + Real Time Clock. + comment "HID Sensor RTC drivers" config RTC_DRV_HID_SENSOR_TIME diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index acd366b41c85..55a0a5ca45b0 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -131,6 +131,7 @@ obj-$(CONFIG_RTC_DRV_RP5C01) += rtc-rp5c01.o obj-$(CONFIG_RTC_DRV_RS5C313) += rtc-rs5c313.o obj-$(CONFIG_RTC_DRV_RS5C348) += rtc-rs5c348.o obj-$(CONFIG_RTC_DRV_RS5C372) += rtc-rs5c372.o +obj-$(CONFIG_RTC_DRV_RTD119X) += rtc-rtd119x.o obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o obj-$(CONFIG_RTC_DRV_RV8803) += rtc-rv8803.o obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o diff --git a/drivers/rtc/rtc-rtd119x.c b/drivers/rtc/rtc-rtd119x.c new file mode 100644 index 000000000000..526f586d0355 --- /dev/null +++ b/drivers/rtc/rtc-rtd119x.c @@ -0,0 +1,241 @@ +/* + * Realtek RTD129x RTC + * + * Copyright (c) 2017 Andreas Färber + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define RTD_RTCSEC 0x00 +#define RTD_RTCMIN 0x04 +#define RTD_RTCHR 0x08 +#define RTD_RTCDATE1 0x0c +#define RTD_RTCDATE2 0x10 +#define RTD_RTCACR 0x28 +#define RTD_RTCEN 0x2c +#define RTD_RTCCR 0x30 + +#define RTD_RTCSEC_RTCSEC_MASK 0x7f + +#define RTD_RTCMIN_RTCMIN_MASK 0x3f + +#define RTD_RTCHR_RTCHR_MASK 0x1f + +#define RTD_RTCDATE1_RTCDATE1_MASK 0xff + +#define RTD_RTCDATE2_RTCDATE2_MASK 0x7f + +#define RTD_RTCACR_RTCPWR BIT(7) + +#define RTD_RTCEN_RTCEN_MASK 0xff + +#define RTD_RTCCR_RTCRST BIT(6) + +struct rtd119x_rtc { + void __iomem *base; + struct clk *clk; + struct rtc_device *rtcdev; + unsigned int base_year; +}; + +static inline int rtd119x_rtc_days_in_year(int year) +{ + return 365 + (is_leap_year(year) ? 1 : 0); +} + +static void rtd119x_rtc_reset(struct device *dev) +{ + struct rtd119x_rtc *data = dev_get_drvdata(dev); + u32 val; + + val = readl_relaxed(data->base + RTD_RTCCR); + val |= RTD_RTCCR_RTCRST; + writel_relaxed(val, data->base + RTD_RTCCR); + + val &= ~RTD_RTCCR_RTCRST; + writel(val, data->base + RTD_RTCCR); +} + +static void rtd119x_rtc_set_enabled(struct device *dev, bool enable) +{ + struct rtd119x_rtc *data = dev_get_drvdata(dev); + u32 val; + + val = readl_relaxed(data->base + RTD_RTCEN); + if (enable) { + if ((val & RTD_RTCEN_RTCEN_MASK) == 0x5a) + return; + writel_relaxed(0x5a, data->base + RTD_RTCEN); + } else { + writel_relaxed(0, data->base + RTD_RTCEN); + } +} + +static int rtd119x_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + struct rtd119x_rtc *data = dev_get_drvdata(dev); + s32 day; + u32 sec; + unsigned int year; + int tries = 0; + + while (true) { + tm->tm_sec = (readl_relaxed(data->base + RTD_RTCSEC) & RTD_RTCSEC_RTCSEC_MASK) >> 1; + tm->tm_min = readl_relaxed(data->base + RTD_RTCMIN) & RTD_RTCMIN_RTCMIN_MASK; + tm->tm_hour = readl_relaxed(data->base + RTD_RTCHR) & RTD_RTCHR_RTCHR_MASK; + day = readl_relaxed(data->base + RTD_RTCDATE1) & RTD_RTCDATE1_RTCDATE1_MASK; + day |= (readl_relaxed(data->base + RTD_RTCDATE2) & RTD_RTCDATE2_RTCDATE2_MASK) << 8; + sec = (readl_relaxed(data->base + RTD_RTCSEC) & RTD_RTCSEC_RTCSEC_MASK) >> 1; + tries++; + + if (sec == tm->tm_sec) + break; + + if (tries >= 3) + return -EINVAL; + } + if (tries > 1) + dev_dbg(dev, "%s: needed %i tries\n", __func__, tries); + + year = data->base_year; + while (day >= rtd119x_rtc_days_in_year(year)) { + day -= rtd119x_rtc_days_in_year(year); + year++; + } + tm->tm_year = year - 1900; + tm->tm_yday = day; + + tm->tm_mon = 0; + while (day >= rtc_month_days(tm->tm_mon, year)) { + day -= rtc_month_days(tm->tm_mon, year); + tm->tm_mon++; + } + tm->tm_mday = day + 1; + + return 0; +} + +static int rtd119x_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + struct rtd119x_rtc *data = dev_get_drvdata(dev); + unsigned int day; + int i; + + if (1900 + tm->tm_year < data->base_year) + return -EINVAL; + + day = 0; + for (i = data->base_year; i < 1900 + tm->tm_year; i++) + day += rtd119x_rtc_days_in_year(i); + + day += tm->tm_yday; + if (day > 0x7fff) + return -EINVAL; + + rtd119x_rtc_set_enabled(dev, false); + + writel_relaxed((tm->tm_sec << 1) & RTD_RTCSEC_RTCSEC_MASK, data->base + RTD_RTCSEC); + writel_relaxed(tm->tm_min & RTD_RTCMIN_RTCMIN_MASK, data->base + RTD_RTCMIN); + writel_relaxed(tm->tm_hour & RTD_RTCHR_RTCHR_MASK, data->base + RTD_RTCHR); + writel_relaxed(day & RTD_RTCDATE1_RTCDATE1_MASK, data->base + RTD_RTCDATE1); + writel_relaxed((day >> 8) & RTD_RTCDATE2_RTCDATE2_MASK, data->base + RTD_RTCDATE2); + + rtd119x_rtc_set_enabled(dev, true); + + return 0; +} + +static const struct rtc_class_ops rtd119x_rtc_ops = { + .read_time = rtd119x_rtc_read_time, + .set_time = rtd119x_rtc_set_time, +}; + +static const struct of_device_id rtd119x_rtc_dt_ids[] = { + { .compatible = "realtek,rtd1295-rtc" }, + { } +}; + +static int rtd119x_rtc_probe(struct platform_device *pdev) +{ + struct rtd119x_rtc *data; + struct resource *res; + u32 val; + int ret; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + platform_set_drvdata(pdev, data); + data->base_year = 2014; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + data->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(data->base)) + return PTR_ERR(data->base); + + data->clk = of_clk_get(pdev->dev.of_node, 0); + if (IS_ERR(data->clk)) + return PTR_ERR(data->clk); + + ret = clk_prepare_enable(data->clk); + if (ret) { + clk_put(data->clk); + return ret; + } + + val = readl_relaxed(data->base + RTD_RTCACR); + if (!(val & RTD_RTCACR_RTCPWR)) { + writel_relaxed(RTD_RTCACR_RTCPWR, data->base + RTD_RTCACR); + + rtd119x_rtc_reset(&pdev->dev); + + writel_relaxed(0, data->base + RTD_RTCMIN); + writel_relaxed(0, data->base + RTD_RTCHR); + writel_relaxed(0, data->base + RTD_RTCDATE1); + writel_relaxed(0, data->base + RTD_RTCDATE2); + } + + rtd119x_rtc_set_enabled(&pdev->dev, true); + + data->rtcdev = devm_rtc_device_register(&pdev->dev, "rtc", + &rtd119x_rtc_ops, THIS_MODULE); + if (IS_ERR(data->rtcdev)) { + dev_err(&pdev->dev, "failed to register rtc device"); + clk_disable_unprepare(data->clk); + clk_put(data->clk); + return PTR_ERR(data->rtcdev); + } + + return 0; +} + +static int rtd119x_rtc_remove(struct platform_device *pdev) +{ + struct rtd119x_rtc *data = platform_get_drvdata(pdev); + + rtd119x_rtc_set_enabled(&pdev->dev, false); + + clk_disable_unprepare(data->clk); + + return 0; +} + +static struct platform_driver rtd119x_rtc_driver = { + .probe = rtd119x_rtc_probe, + .remove = rtd119x_rtc_remove, + .driver = { + .name = "rtd1295-rtc", + .of_match_table = rtd119x_rtc_dt_ids, + }, +}; +builtin_platform_driver(rtd119x_rtc_driver);