From patchwork Thu Mar 19 12:27:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 207172 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE74FC4332D for ; Thu, 19 Mar 2020 12:27:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B699D20740 for ; Thu, 19 Mar 2020 12:27:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="CGpRkLuL" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726926AbgCSM1t (ORCPT ); Thu, 19 Mar 2020 08:27:49 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:34171 "EHLO mail-wr1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726793AbgCSM1t (ORCPT ); Thu, 19 Mar 2020 08:27:49 -0400 Received: by mail-wr1-f66.google.com with SMTP id z15so2736488wrl.1; Thu, 19 Mar 2020 05:27:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=t61mb6qLDf6pydus3SpO95pR09smLBtSSYCBNAzko/s=; b=CGpRkLuL3HhqmKTNfl2lIz4Ma3pBgZpVNWixkg5eE8sBHYJSfMsGgMElPvoycW1EmG EoUKulogkFkaHqHMjSRx7jvfnTyYGCxT7vQedxibrZ11dNPhKQVtKkfMk0H1Qf9HDS8G lZXFhFnswgYz8v76U2s9PQpMIKaMiM+vmj9BVMDvKeaV9Ie+VVDwO8bAwjUFRb1F8R8U LKSLf5HaOMyANv6+n4bKo9GNP6CxxqFaUIqQKqP0nj2K1g4U0kD0ktPP0Ang4T9R3yYv FFDfN9AX+0oLM3MB018NJVDaDQql6kysU7EeOAiXHXXIbMd9KUQUxPBTsW/id0ZCI3uF RbpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=t61mb6qLDf6pydus3SpO95pR09smLBtSSYCBNAzko/s=; b=r/Xb0DaBnT7JRItOJfBVSzBLwbSvKKRwxuWTzjOKFcMRwZjSTrcg0o9/+uMMNgekOO s61TWWKzrHlPx3w0H8AJyYJESkbECwh+m4IpA1KWZaAYp42JGToPQEsZSzsVX7VrTZla cmYgZKxKxJK8ozfEzwz63LeFIL6M4HwFknt/dBgW8vtlHdnD7pFzNXTxq8zrmqutxvBa YYnXUuixmaNfPWuvI4B7YK/i+P1stu3a/Phoh4SlCrtZIDNJELBT3rGx2Pl0vCs/vhxI Pf3gVpysXKlIUoX+8Yci2z+9Rnyhsm6qKnVugJB7DfbxIhu7Mv4scuVzPypgCh8vSJPy 95ug== X-Gm-Message-State: ANhLgQ28LLQWPe9/FPvbDdUQK7YWp0dDWPzK/dgtrNMqyFT6t1idqToE Hd998YKnn+I59brhAr97/X8= X-Google-Smtp-Source: ADFU+vvbWBwA2px0IxYN/5Atp5gpxq/GLnbapY3F04BVMAv+SiJMw9760G3hRRxvL6LZWQVYEYd09A== X-Received: by 2002:a5d:4484:: with SMTP id j4mr4248215wrq.153.1584620866690; Thu, 19 Mar 2020 05:27:46 -0700 (PDT) Received: from localhost (pD9E51CDC.dip0.t-ipconnect.de. [217.229.28.220]) by smtp.gmail.com with ESMTPSA id p8sm3369836wrw.19.2020.03.19.05.27.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2020 05:27:45 -0700 (PDT) From: Thierry Reding To: Linus Walleij , Bartosz Golaszewski Cc: Jon Hunter , Vidya Sagar , linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 1/9] gpio: Support GPIO controllers without pin-ranges Date: Thu, 19 Mar 2020 13:27:29 +0100 Message-Id: <20200319122737.3063291-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200319122737.3063291-1-thierry.reding@gmail.com> References: <20200319122737.3063291-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Thierry Reding Wake gpiochip_generic_request() call into the pinctrl helpers only if a GPIO controller had any pin-ranges assigned to it. This allows a driver to unconditionally use this helper if it supports multiple devices of which only a subset have pin-ranges assigned to them. Signed-off-by: Thierry Reding --- drivers/gpio/gpiolib.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index f31b1d46599e..12f3c339da78 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -2792,7 +2792,10 @@ static inline void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip) */ int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset) { - return pinctrl_gpio_request(chip->gpiodev->base + offset); + if (!list_empty(&chip->gpiodev->pin_ranges)) + return pinctrl_gpio_request(chip->gpiodev->base + offset); + + return 0; } EXPORT_SYMBOL_GPL(gpiochip_generic_request); From patchwork Thu Mar 19 12:27:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 207171 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1FEACC4332E for ; Thu, 19 Mar 2020 12:27:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E912620739 for ; Thu, 19 Mar 2020 12:27:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="b4+8pCom" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726983AbgCSM1x (ORCPT ); Thu, 19 Mar 2020 08:27:53 -0400 Received: from mail-wr1-f65.google.com ([209.85.221.65]:43400 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726933AbgCSM1x (ORCPT ); Thu, 19 Mar 2020 08:27:53 -0400 Received: by mail-wr1-f65.google.com with SMTP id b2so2673311wrj.10; Thu, 19 Mar 2020 05:27:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tjmr+ew1+U0WzAY8kVkpYSlD1YeBvSFCuj5UiESo5VU=; b=b4+8pComvUughuuAspy9Uy+B5Y911EqKC6lJPjHhybj8Bbe8AbB4DhYgOneNOX04As sv2mccdAFvTwzMQgtFLhWeQWMzH8ilCEFf9xBEB0JYavTo/t6UOlWj7YJG7J4E1R+yXr 2Bn5D6shgQafduysSkDE8QJz/rtYn/7wQskI9o1USj+gLgKbaqIyYVNgNTclFAlksznZ oshPzuPxIOc+C73ypopRyikLuuI5o4tSjzENNyuaYc8K1C9x5nO/rJYzpbu7V5v38r79 1+ZsuVlc1SBXUMpPeijANx5UPb03g2lJtvf/mqVAOC8QREkvm+5NbMU4Fcils/PQEoN5 Ioqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tjmr+ew1+U0WzAY8kVkpYSlD1YeBvSFCuj5UiESo5VU=; b=ZvmPP30mtEDOR3fPhNySPV9b1x+ex+AI+JLEIcaRt8ay9sRV79UV6w2Pc2Lr3qRwUa TJtm+TY7lVaRnsv8DG17/E886hrqC9B8VhHlFDK+phdFnCG4TBADmVdoHDX1ukQE6v13 jU60eLF0fHFxSZLiVfdbdUOQfhVTF7WuoMufrYYmGHBLkKwCpdi3tvSwsnGavUuzY/0b g8RBOyEsPk+BNtb1GP6E6+UV6Z3uX3BpqTRp+mqRKSbTWmC7sw5QpSpFjP8l40WIFfhH aq2/LyaRVhcEb5uqk8r9RM9izwTPtq5pZzl4+zMNAleqYkJU2JKJs5dUQrzWigls3ver Q8rQ== X-Gm-Message-State: ANhLgQ1nKAtIojoPBna3RXzxcBpK/7Ikgxi2k28XaIkLLfGK8kG4ujSH XAqjCWhiiE2M9voVVz0K8jw= X-Google-Smtp-Source: ADFU+vu3taUE7717U01TDWtl+uZrtA/J2fxGL4WrO7Lzxl5LAWNxOjxZWMZSghG7TCk690WeAWZtwg== X-Received: by 2002:a5d:6cce:: with SMTP id c14mr4219926wrc.149.1584620870757; Thu, 19 Mar 2020 05:27:50 -0700 (PDT) Received: from localhost (pD9E51CDC.dip0.t-ipconnect.de. [217.229.28.220]) by smtp.gmail.com with ESMTPSA id x17sm3524082wrt.0.2020.03.19.05.27.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2020 05:27:49 -0700 (PDT) From: Thierry Reding To: Linus Walleij , Bartosz Golaszewski Cc: Jon Hunter , Vidya Sagar , linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 3/9] gpio: tegra186: Add Tegra194 pin ranges for GG.0 and GG.1 Date: Thu, 19 Mar 2020 13:27:31 +0100 Message-Id: <20200319122737.3063291-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200319122737.3063291-1-thierry.reding@gmail.com> References: <20200319122737.3063291-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Thierry Reding The GG.0 and GG.1 GPIOs serve as CLKREQ and RST pins, respectively, for PCIe controller 5 on Tegra194. When this controller is configured in endpoint mode, these pins need to be used as GPIOs by the PCIe endpoint driver. Typically the mode programming of these pins (GPIO vs. SFIO) is performed by early boot firmware to ensure that the configuration is consistent. However, the GG.0 and GG.1 pins are part of a special power partition that is not enabled during early boot, and hence the early boot firmware cannot program these pins to be GPIOs (they are SFIO by default). Adding them as pin ranges for the pin controller allows the pin controller to be involved when these pins are requested as GPIOs and allows the proper programming to take place. Signed-off-by: Thierry Reding --- drivers/gpio/gpio-tegra186.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c index 1086c1fcaf49..79b553dc39a3 100644 --- a/drivers/gpio/gpio-tegra186.c +++ b/drivers/gpio/gpio-tegra186.c @@ -839,11 +839,19 @@ static const struct tegra_gpio_port tegra194_main_ports[] = { TEGRA194_MAIN_GPIO_PORT(GG, 0, 0, 2) }; +static const struct tegra186_pin_range tegra194_main_pin_ranges[] = { + { TEGRA194_MAIN_GPIO(GG, 0), "pex_l5_clkreq_n_pgg0" }, + { TEGRA194_MAIN_GPIO(GG, 1), "pex_l5_rst_n_pgg1" }, +}; + static const struct tegra_gpio_soc tegra194_main_soc = { .num_ports = ARRAY_SIZE(tegra194_main_ports), .ports = tegra194_main_ports, .name = "tegra194-gpio", .instance = 0, + .num_pin_ranges = ARRAY_SIZE(tegra194_main_pin_ranges), + .pin_ranges = tegra194_main_pin_ranges, + .pinmux = "nvidia,tegra194-pinmux", }; #define TEGRA194_AON_GPIO_PORT(_name, _bank, _port, _pins) \ From patchwork Thu Mar 19 12:27:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 207170 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E105C4332B for ; Thu, 19 Mar 2020 12:27:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 390BE2070A for ; Thu, 19 Mar 2020 12:27:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="eUyR01/x" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727002AbgCSM16 (ORCPT ); Thu, 19 Mar 2020 08:27:58 -0400 Received: from mail-wm1-f66.google.com ([209.85.128.66]:37303 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726879AbgCSM16 (ORCPT ); Thu, 19 Mar 2020 08:27:58 -0400 Received: by mail-wm1-f66.google.com with SMTP id d1so2023388wmb.2; Thu, 19 Mar 2020 05:27:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eHkuDXF/NjX1C4n4QJPPPMMS5T3FHm+KSdBxTvMuP9Q=; b=eUyR01/xBtEu2wx8cIg5tMFXzfJZbZLjR1YxazpuxOdzjxUhayZwWkTiTRgMwLVHAL 0EfDaTYqrXoGoLZ1I7O9Tmt6W3yZlCQSBajro5rg+cfZ0BDK7c8B9mRtD7HHoQqFeiG7 fyd03Vaw3yv3Y896yR7+pr5TA7JUI35PFXf31OoTI1fQ657vDh/ln/cceIEiG1I/pz+x uiaLWQ/uKKFN3CXIIvtxP+WrxgPkRIamfeZbYFiXOF5AtofYldaiszamxO8iSjlpDV0F HNgCgxFqEew6gIKDqY8LN8vINmSAaKzj6UXs7iHMWRVllmwnV6NR0KxwbuhoubeD/vn8 1HQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eHkuDXF/NjX1C4n4QJPPPMMS5T3FHm+KSdBxTvMuP9Q=; b=p3dQARcwvKGNXegfmmVLBCdLilOd6IEguE1h/ETs45ulTy9JkxStqzJ3RTWSYuEApm MYMvssOE50/beQJ3pag3T9CXzrNAEQ9xOP/ZI+j3HzE5d8STZ3N7jM4c8vaxBotZjJJR crkiEuAZ+ul22L3y6AbZ6FdxLGGj91W8AX6t2/xo76TYl967la6M+BHm/wnxpjN4EH0L x7eMhanjNBjoYnr4nm1XlnZiQEvJXGGlq+l+T/CanCunV9HKt+EaurhTF7/y5I+U7DsD I5M3iJty3mfj2dRJd2HKmC/iWQGRwNOBttgqJvXaoHcAhiOZhEOtnyjgr+InX74v+shd XgWg== X-Gm-Message-State: ANhLgQ2PImGLv5a27AeX1fmDRJefKqfw8ctHCK/C3V9TIZq0/2uhO/MA 3+4kc3v2nJdoFR7hjvitUs0= X-Google-Smtp-Source: ADFU+vsUj1dJ6Rb3dAqT0Xpgil+MaZRO+5f1dYJq+aDiT8BGC+9x4I3kDjrK/ud8wiSPFSxk0YlKuw== X-Received: by 2002:a1c:2dc7:: with SMTP id t190mr3570270wmt.137.1584620874999; Thu, 19 Mar 2020 05:27:54 -0700 (PDT) Received: from localhost (pD9E51CDC.dip0.t-ipconnect.de. [217.229.28.220]) by smtp.gmail.com with ESMTPSA id o9sm3361216wrw.20.2020.03.19.05.27.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2020 05:27:53 -0700 (PDT) From: Thierry Reding To: Linus Walleij , Bartosz Golaszewski Cc: Jon Hunter , Vidya Sagar , linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 5/9] pinctrl: tegra: Fix "Scmitt" -> "Schmitt" typo Date: Thu, 19 Mar 2020 13:27:33 +0100 Message-Id: <20200319122737.3063291-6-thierry.reding@gmail.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200319122737.3063291-1-thierry.reding@gmail.com> References: <20200319122737.3063291-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Thierry Reding Properly spell "Schmitt" in the kerneldoc for pin group definitions. Signed-off-by: Thierry Reding --- drivers/pinctrl/tegra/pinctrl-tegra.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h index 0fc82eea9cf1..520865979d4a 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.h +++ b/drivers/pinctrl/tegra/pinctrl-tegra.h @@ -107,7 +107,7 @@ struct tegra_function { * drvup, slwr, slwf, and drvtype parameters. * @drv_bank: Drive fields register bank. * @hsm_bit: High Speed Mode register bit. - * @schmitt_bit: Scmitt register bit. + * @schmitt_bit: Schmitt register bit. * @lpmd_bit: Low Power Mode register bit. * @drvdn_bit: Drive Down register bit. * @drvdn_width: Drive Down field width. From patchwork Thu Mar 19 12:27:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 207169 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8B1CC4332E for ; Thu, 19 Mar 2020 12:28:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9D5E02070A for ; Thu, 19 Mar 2020 12:28:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="o1/hloQf" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726663AbgCSM2B (ORCPT ); Thu, 19 Mar 2020 08:28:01 -0400 Received: from mail-wm1-f66.google.com ([209.85.128.66]:34002 "EHLO mail-wm1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727023AbgCSM2B (ORCPT ); Thu, 19 Mar 2020 08:28:01 -0400 Received: by mail-wm1-f66.google.com with SMTP id 26so442802wmk.1; Thu, 19 Mar 2020 05:27:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QashyjqboWz8J76L55AnJ5EBJLCBBnyBfXdCGEoc+os=; b=o1/hloQfvGSl37W4ZNhn89Py/Du6j+4TXvcraruh7gFvsvBOmTjH3pZv39kmrX1KmX +eYGsRShE6jKkxX8o6bmSYOs/OvNAWvt5e84esmjwTan97i7w9Tc1fo+mPfZOTvT2u57 8n7tXhWCHbAl+VQpPpAGGsimVzjG1LLynn+gD2JtgsDFqW3Hd1CDnT5XWfmqZMc5edid 4d5xgfgnjC//kL93yzFekzpQ5pW8Ad8/VMUEu8/gTRYv9qpKzmbZTqzvKBv+LvxkgEeT mLcUkGGEKNsOlmdOtZCnViqLJ4d5tErI5olKlIK/5+gRJF+AjeukRqmXs5agIJnKv3XT 52ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QashyjqboWz8J76L55AnJ5EBJLCBBnyBfXdCGEoc+os=; b=BqMJVxm3oHEdtHn3D4RJAK/NYLaqSVU4o/bfmSPG1sYflotmzmo1UMlHorbMBv5MsT 6Kupwzbd5+MPq/DYRcMz3m+Q/eQp/gy6+2+kaU9qWH4FOlzgMz+z/88g53TzHwvBWq6E yUw8eAymgtxTOe1dNnZVCnKsB5omqYlVYvWrsQycPaisGmd0RA+wYQwtt9I9NpksI39X 1bMt/xwdt2kKkCmHddIu5CxkN0lwkmBprN/xMf1FoSSPADrERIC3MxkLfNZ0hVdo6PEm miArKphHpMc9aqPk64op8wI3QEtAqYSfBOxYjTg+Hr+1PRLDeXFEyKNS2ukKRgQT7YBU nQiQ== X-Gm-Message-State: ANhLgQ1MUIpF7bvVOTZ546bqPgURPiLxhTt96kR6C9D3vDYVXb2G3yEs wkz9yH5YBC99Xf3OcJapkXI= X-Google-Smtp-Source: ADFU+vsvbn7yVWTEh646qp3pbVZjpD4FdiXuQl7NWmueE7VtaEDfQ+va/8c7u52XAeKawo3FLLqWGw== X-Received: by 2002:a1c:6885:: with SMTP id d127mr3546279wmc.33.1584620879148; Thu, 19 Mar 2020 05:27:59 -0700 (PDT) Received: from localhost (pD9E51CDC.dip0.t-ipconnect.de. [217.229.28.220]) by smtp.gmail.com with ESMTPSA id l18sm3287288wrr.17.2020.03.19.05.27.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2020 05:27:58 -0700 (PDT) From: Thierry Reding To: Linus Walleij , Bartosz Golaszewski Cc: Jon Hunter , Vidya Sagar , linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 7/9] pinctrl: tegra: Do not add default pin range on Tegra194 Date: Thu, 19 Mar 2020 13:27:35 +0100 Message-Id: <20200319122737.3063291-8-thierry.reding@gmail.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200319122737.3063291-1-thierry.reding@gmail.com> References: <20200319122737.3063291-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Thierry Reding On Tegra194, almost all of the pin control programming happens in early boot firmware, so there is no use in having a pin range defined for all the pins. Signed-off-by: Thierry Reding --- drivers/pinctrl/tegra/pinctrl-tegra.c | 2 +- drivers/pinctrl/tegra/pinctrl-tegra194.c | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c index c8246cc2c4fd..65511bf27d34 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra.c @@ -794,7 +794,7 @@ int tegra_pinctrl_probe(struct platform_device *pdev, tegra_pinctrl_clear_parked_bits(pmx); - if (!tegra_pinctrl_gpio_node_has_range(pmx)) + if (pmx->soc->ngpios > 0 && !tegra_pinctrl_gpio_node_has_range(pmx)) pinctrl_add_gpio_range(pmx->pctl, &tegra_pinctrl_gpio_range); platform_set_drvdata(pdev, pmx); diff --git a/drivers/pinctrl/tegra/pinctrl-tegra194.c b/drivers/pinctrl/tegra/pinctrl-tegra194.c index d4e84530158c..61fc7e680788 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra194.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra194.c @@ -134,7 +134,6 @@ static const struct tegra_pingroup tegra194_groups[] = { }; static const struct tegra_pinctrl_soc_data tegra194_pinctrl = { - .ngpios = TEGRA_PIN_NUM_GPIOS, .pins = tegra194_pins, .npins = ARRAY_SIZE(tegra194_pins), .functions = tegra194_functions, From patchwork Thu Mar 19 12:27:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 207168 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F222DC4332E for ; Thu, 19 Mar 2020 12:28:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C7B4B20732 for ; Thu, 19 Mar 2020 12:28:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="F8mX6SCD" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726881AbgCSM2G (ORCPT ); Thu, 19 Mar 2020 08:28:06 -0400 Received: from mail-wr1-f68.google.com ([209.85.221.68]:33072 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727016AbgCSM2G (ORCPT ); Thu, 19 Mar 2020 08:28:06 -0400 Received: by mail-wr1-f68.google.com with SMTP id a25so2750943wrd.0; Thu, 19 Mar 2020 05:28:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VkO1g8ia5B6Hejwxvp+dLoxc7nhwOT1xQpHpINjJpOY=; b=F8mX6SCDKlX9sQ60S1C8BfuuYgS7dj1tkfWw7Pf30CeWZluEcGnNwtgmExyMsTjVlV KcYJt8Z+5ybRumItiDsQJo11skJmVuXGqPJ9iJAatgrpqObGwzI2nR25Om6OmwgZHrDj XdFzWMIuZ+xFK8SS09ts33oMpoLStRQGNId6sYc+NNZH8zvbAkzaXoC2ENg5fFWO1t82 hwtgX9BHjY98mzAj1+UwGeXsYYCu2aYrq63w9qE8zWy4SyHpMEKo7nAbjanHwLd0hGqK g6xSZAl10XdEHL3Pe30TvDViz7bNb2v2Wr+bd2y2vveHyAaZeVqrsYyUZ/c1xncuYW67 rw1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VkO1g8ia5B6Hejwxvp+dLoxc7nhwOT1xQpHpINjJpOY=; b=kvBA/QBe25tnKazuyGLtfxZpRlZNikmXEgISnJMD0J2vU47PK0HD3frQfd1cJpqL95 MvDabSYPqnJTlxoWeXK5YbI3jr6wFEpU4Nl/XDOvX9Yl9mwpY8yDNEWD5OPANae/kDJe JpuGTculYeuJJiSeBrrv4/DY2CkOaJG22/kmITN2xNbWDLjQ+741HrsGPuThZePNR7Ag erZKlQBB22v2nE/QqeXvTJvaO2W7MOJP83D4S43Mmy5EqnH+7YiqHAqSHehclA+u3d9F C3Uq2WHvcyCfn3VI+ncWGBe9mE6yfEtZ0wvdOyab7AnagtUYVMo/YINIvhFHUb+W+SJ9 sz6g== X-Gm-Message-State: ANhLgQ3ETagNrKMeWwEQxkkQ1/5gEaZkwAKBOUKpJRu1KZfhG/u7Gp4m BKCQtH5MJtqerrGTbiKKfBA= X-Google-Smtp-Source: ADFU+vtQEGzTtBN7eglOXY1xYI76BH/o7sYcWlD/HEFWGDyakTd5EUhBGfzhoFlvYCv7AFrBL5FLRA== X-Received: by 2002:a5d:6388:: with SMTP id p8mr3888569wru.51.1584620883405; Thu, 19 Mar 2020 05:28:03 -0700 (PDT) Received: from localhost (pD9E51CDC.dip0.t-ipconnect.de. [217.229.28.220]) by smtp.gmail.com with ESMTPSA id f15sm2919786wmj.25.2020.03.19.05.28.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Mar 2020 05:28:02 -0700 (PDT) From: Thierry Reding To: Linus Walleij , Bartosz Golaszewski Cc: Jon Hunter , Vidya Sagar , linux-gpio@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 9/9] pinctrl: tegra: Add SFIO/GPIO programming on Tegra194 Date: Thu, 19 Mar 2020 13:27:37 +0100 Message-Id: <20200319122737.3063291-10-thierry.reding@gmail.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200319122737.3063291-1-thierry.reding@gmail.com> References: <20200319122737.3063291-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org From: Thierry Reding Prior to Tegra186, the selection of SFIO vs. GPIO modes was done as part of the GPIO controller's register programming. Starting with Tegra186, a pin is configured as GPIO or SFIO with a bit in a configuration register of the pin controller. Signed-off-by: Thierry Reding --- drivers/pinctrl/tegra/pinctrl-tegra.c | 46 ++++++++++++++++++++++++ drivers/pinctrl/tegra/pinctrl-tegra.h | 3 ++ drivers/pinctrl/tegra/pinctrl-tegra194.c | 2 ++ 3 files changed, 51 insertions(+) diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c index 65511bf27d34..21661f6490d6 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra.c @@ -275,11 +275,57 @@ static int tegra_pinctrl_set_mux(struct pinctrl_dev *pctldev, return 0; } +static int tegra_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset) +{ + struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); + const struct tegra_pingroup *group; + u32 value; + + if (!pmx->soc->sfsel_in_mux) + return 0; + + group = &pmx->soc->groups[offset]; + + if (group->mux_reg < 0 || group->sfsel_bit < 0) + return -EINVAL; + + value = pmx_readl(pmx, group->mux_bank, group->mux_reg); + value &= ~BIT(group->sfsel_bit); + pmx_writel(pmx, value, group->mux_bank, group->mux_reg); + + return 0; +} + +static void tegra_pinctrl_gpio_disable_free(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset) +{ + struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev); + const struct tegra_pingroup *group; + u32 value; + + if (!pmx->soc->sfsel_in_mux) + return; + + group = &pmx->soc->groups[offset]; + + if (group->mux_reg < 0 || group->sfsel_bit < 0) + return; + + value = pmx_readl(pmx, group->mux_bank, group->mux_reg); + value |= BIT(group->sfsel_bit); + pmx_writel(pmx, value, group->mux_bank, group->mux_reg); +} + static const struct pinmux_ops tegra_pinmux_ops = { .get_functions_count = tegra_pinctrl_get_funcs_count, .get_function_name = tegra_pinctrl_get_func_name, .get_function_groups = tegra_pinctrl_get_func_groups, .set_mux = tegra_pinctrl_set_mux, + .gpio_request_enable = tegra_pinctrl_gpio_request_enable, + .gpio_disable_free = tegra_pinctrl_gpio_disable_free, }; static int tegra_pinconf_reg(struct tegra_pmx *pmx, diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h index 520865979d4a..fcad7f74c5a2 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra.h +++ b/drivers/pinctrl/tegra/pinctrl-tegra.h @@ -107,6 +107,7 @@ struct tegra_function { * drvup, slwr, slwf, and drvtype parameters. * @drv_bank: Drive fields register bank. * @hsm_bit: High Speed Mode register bit. + * @sfsel_bit: GPIO/SFIO selection register bit. * @schmitt_bit: Schmitt register bit. * @lpmd_bit: Low Power Mode register bit. * @drvdn_bit: Drive Down register bit. @@ -153,6 +154,7 @@ struct tegra_pingroup { s32 ioreset_bit:6; s32 rcv_sel_bit:6; s32 hsm_bit:6; + s32 sfsel_bit:6; s32 schmitt_bit:6; s32 lpmd_bit:6; s32 drvdn_bit:6; @@ -192,6 +194,7 @@ struct tegra_pinctrl_soc_data { bool hsm_in_mux; bool schmitt_in_mux; bool drvtype_in_mux; + bool sfsel_in_mux; }; extern const struct dev_pm_ops tegra_pinctrl_pm; diff --git a/drivers/pinctrl/tegra/pinctrl-tegra194.c b/drivers/pinctrl/tegra/pinctrl-tegra194.c index 61afe5fe9dec..2e0b5f7bb095 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra194.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra194.c @@ -95,6 +95,7 @@ static struct tegra_function tegra194_functions[] = { .tri_bit = 4, \ .einput_bit = e_input, \ .odrain_bit = e_od, \ + .sfsel_bit = 10, \ .schmitt_bit = schmitt_b, \ .drvtype_bit = 13, \ .drv_reg = -1, \ @@ -140,6 +141,7 @@ static const struct tegra_pinctrl_soc_data tegra194_pinctrl = { .hsm_in_mux = true, .schmitt_in_mux = true, .drvtype_in_mux = true, + .sfsel_in_mux = true, }; static int tegra194_pinctrl_probe(struct platform_device *pdev)