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Tue, 09 Jun 2020 06:26:52 -0700 (PDT) From: dillon.minfei@gmail.com To: robh+dt@kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, p.zabel@pengutronix.de, pierre-yves.mordret@st.com, philippe.schenker@toradex.com Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, dillon min Subject: [PATCH v4 1/4] ARM: dts: stm32: add I2C3 support on STM32F429 SoC Date: Tue, 9 Jun 2020 21:26:40 +0800 Message-Id: <1591709203-12106-2-git-send-email-dillon.minfei@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1591709203-12106-1-git-send-email-dillon.minfei@gmail.com> References: <1591709203-12106-1-git-send-email-dillon.minfei@gmail.com> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: dillon min This patch adds I2C3 instances of the STM32F429 SoC Signed-off-by: dillon min --- arch/arm/boot/dts/stm32f429.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi index d7770699feb5..257b8431dece 100644 --- a/arch/arm/boot/dts/stm32f429.dtsi +++ b/arch/arm/boot/dts/stm32f429.dtsi @@ -402,6 +402,18 @@ status = "disabled"; }; + i2c3: i2c@40005c00 { + compatible = "st,stm32f4-i2c"; + reg = <0x40005c00 0x400>; + interrupts = <72>, + <73>; + resets = <&rcc STM32F4_APB1_RESET(I2C3)>; + clocks = <&rcc 0 STM32F4_APB1_CLOCK(I2C3)>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + dac: dac@40007400 { compatible = "st,stm32f4-dac-core"; reg = <0x40007400 0x400>; From patchwork Tue Jun 9 13:26:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dillon Min X-Patchwork-Id: 207528 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.6 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12410C433DF for ; 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Tue, 09 Jun 2020 06:27:02 -0700 (PDT) Received: from fmin-OptiPlex-7060.nreal.work ([103.206.191.42]) by smtp.gmail.com with ESMTPSA id b5sm2624348pjz.34.2020.06.09.06.26.59 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 09 Jun 2020 06:27:02 -0700 (PDT) From: dillon.minfei@gmail.com To: robh+dt@kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@st.com, p.zabel@pengutronix.de, pierre-yves.mordret@st.com, philippe.schenker@toradex.com Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, dillon min Subject: [PATCH v4 4/4] i2c: stm32f4: Fix stmpe811 get xyz data timeout issue Date: Tue, 9 Jun 2020 21:26:43 +0800 Message-Id: <1591709203-12106-5-git-send-email-dillon.minfei@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1591709203-12106-1-git-send-email-dillon.minfei@gmail.com> References: <1591709203-12106-1-git-send-email-dillon.minfei@gmail.com> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: dillon min as stm32f429's internal flash is 2Mbytes and compiled kernel image bigger than 2Mbytes, so we have to load kernel image to sdram on stm32f429-disco board which has 8Mbytes sdram space. based on above context, as you knows kernel running on external sdram is more slower than internal flash. besides, we need read 4 bytes to get touch screen xyz(x, y, pressure) coordinate data in stmpe811 interrupt. so, in stm32f4_i2c_handle_rx_done, as i2c read slower than running in xip mode, have to adjust 'STOP/START bit set position' from last two bytes to last one bytes. else, will get i2c timeout in reading touch screen coordinate. to not take side effect, introduce IIC_LAST_BYTE_POS to support xip kernel or has mmu platform. Signed-off-by: dillon min --- V4: indroduce 'IIC_LAST_BYTE_POS' to compatible with xipkernel boot drivers/i2c/busses/i2c-stm32f4.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-stm32f4.c b/drivers/i2c/busses/i2c-stm32f4.c index d6a69dfcac3f..97cf42ae7fa0 100644 --- a/drivers/i2c/busses/i2c-stm32f4.c +++ b/drivers/i2c/busses/i2c-stm32f4.c @@ -93,6 +93,12 @@ #define STM32F4_I2C_MAX_FREQ 46U #define HZ_TO_MHZ 1000000 +#if !defined(CONFIG_MMU) && !defined(CONFIG_XIP_KERNEL) +#define IIC_LAST_BYTE_POS 1 +#else +#define IIC_LAST_BYTE_POS 2 +#endif + /** * struct stm32f4_i2c_msg - client specific data * @addr: 8-bit slave addr, including r/w bit @@ -439,7 +445,7 @@ static void stm32f4_i2c_handle_rx_done(struct stm32f4_i2c_dev *i2c_dev) int i; switch (msg->count) { - case 2: + case IIC_LAST_BYTE_POS: /* * In order to correctly send the Stop or Repeated Start * condition on the I2C bus, the STOP/START bit has to be set @@ -454,7 +460,7 @@ static void stm32f4_i2c_handle_rx_done(struct stm32f4_i2c_dev *i2c_dev) else stm32f4_i2c_set_bits(reg, STM32F4_I2C_CR1_START); - for (i = 2; i > 0; i--) + for (i = IIC_LAST_BYTE_POS; i > 0; i--) stm32f4_i2c_read_msg(i2c_dev); reg = i2c_dev->base + STM32F4_I2C_CR2; @@ -463,7 +469,7 @@ static void stm32f4_i2c_handle_rx_done(struct stm32f4_i2c_dev *i2c_dev) complete(&i2c_dev->complete); break; - case 3: + case (IIC_LAST_BYTE_POS+1): /* * In order to correctly generate the NACK pulse after the last * received data byte, we have to enable NACK before reading N-2