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[54.225.227.206]) by mx.google.com with ESMTP id i83si1931908qke.83.2017.09.20.07.56.27; Wed, 20 Sep 2017 07:56:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 4343460836; Wed, 20 Sep 2017 14:56:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id D8F1460B33; Wed, 20 Sep 2017 14:55:57 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 67AE160B3F; Wed, 20 Sep 2017 14:55:51 +0000 (UTC) Received: from mail-pf0-f181.google.com (mail-pf0-f181.google.com [209.85.192.181]) by lists.linaro.org (Postfix) with ESMTPS id 1E02F608B3 for ; Wed, 20 Sep 2017 14:55:49 +0000 (UTC) Received: by mail-pf0-f181.google.com with SMTP id n24so1648762pfk.5 for ; Wed, 20 Sep 2017 07:55:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=8EBEAOyBfNMNHFFE+CclTuZzQ7vJvd/NxtnuzR4/DO0=; b=h6bOWQqvKSNX/B1nzcpc0qi1HI9zuyJQNNCVlsg5z82ongaX5CfRpmNHu187xGWxmj W/BoZZZvhqdyI5JxNVbzE5t0slwiP37X4r8sOdOVH4PCA/S+yTqGhELmg7tcaJAzRpU0 QKRt8S9jDfbfDcBQvEzI9vQvj7aqV+uOewi0h+EMN4MogzgKtWvlRy2vX9ZnZgkC27AZ IvS/xDoUelOQkggaK5TJJes/Ypz2MFl2jsl+c4svxMMEVw6CF9n6R1aDEH7xjQincEE3 ez1y55UqKRhfZxI5CGvRpCC5cxzYUjkmZHNml8ZrVOBUNkZkhxZqMWDqJeXhs3tDkLcQ SLBA== X-Gm-Message-State: AHPjjUi/6DyqBK92tMuvaeBxw7ZXhl/ZMK9YL/12yZitE655RhXF8eVI nyGEcWSBR2zAmbOPbcYkQ1DiDsBD X-Google-Smtp-Source: AOwi7QDzXOg+iuXfhS3dQJv0WSvhGd/M4+bvc6sAoNbjbzQt+iJLC3c9fAXcNQO1NOvYIYlW3At36Q== X-Received: by 10.99.167.6 with SMTP id d6mr2455443pgf.414.1505919348174; Wed, 20 Sep 2017 07:55:48 -0700 (PDT) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id c7sm9157624pfc.55.2017.09.20.07.55.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Sep 2017 07:55:47 -0700 (PDT) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, graeme.gregory@linaro.org Date: Wed, 20 Sep 2017 22:48:45 +0800 Message-Id: <1505918938-52550-2-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> References: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> Cc: huangming23@huawei.com, zhangjinsong2@huawei.com, guoheyi@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v2 1/3] Hisilicon/D03: update all binary for update edk2 X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" 1. update all binary for update edk2; 2. Add Drivers/SasPlatform; 3. Add Drivers/Net/SnpPlatform; Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- .../D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi | Bin 21696 -> 4768 bytes .../Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi | Bin 22208 -> 4672 bytes .../Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi | Bin 25440 -> 6784 bytes .../D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi | Bin 23712 -> 4896 bytes .../Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi | Bin 18080 -> 2304 bytes .../D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi | Bin 0 -> 26688 bytes .../D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf | 24 ++++++++++++++++++ .../D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi | Bin 56832 -> 0 bytes .../D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf | 27 --------------------- .../D03/Drivers/Net/SnpPlatform/SnpPlatform.efi | Bin 0 -> 3040 bytes .../D03/Drivers/Net/SnpPlatform/SnpPlatform.inf | 24 ++++++++++++++++++ .../Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi | Bin 48352 -> 21664 bytes .../ReportPciePlugDidVidToBmc.efi | Bin 22112 -> 3712 bytes Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi | Bin 262144 -> 262144 bytes .../Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi | Bin 208288 -> 98144 bytes .../D03/Drivers/SasPlatform/SasPlatform.efi | Bin 0 -> 3040 bytes .../D03/Drivers/SasPlatform/SasPlatform.inf | 24 ++++++++++++++++++ .../D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi | Bin 36480 -> 17728 bytes .../Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi | Bin 21408 -> 4000 bytes .../Library/OemAddressMap2P/OemAddressMap2P.lib | Bin 19486 -> 20550 bytes .../Hisilicon/D03/MemoryInitPei/MemoryInit.efi | Bin 161280 -> 90272 bytes Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv | Bin 262144 -> 262144 bytes Platform/Hisilicon/D03/bl1.bin | Bin 14336 -> 14336 bytes Platform/Hisilicon/D03/fip.bin | Bin 45601 -> 62513 bytes .../Library/Hi1610Serdes/Hi1610SerdesLib.lib | Bin 603524 -> 587188 bytes .../Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib | Bin 247176 -> 210280 bytes Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib | Bin 13998 -> 13958 bytes .../Library/LpcLib/PlatformSysCtrlLibHi1610.lib | Bin 0 -> 297590 bytes .../PlatformSysCtrlLibHi1610.lib | Bin 305230 -> 297590 bytes .../Uart/LpcSerialPortLib/LpcSerialPortLib.lib | Bin 17022 -> 16942 bytes 30 files changed, 72 insertions(+), 27 deletions(-) create mode 100644 Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi create mode 100644 Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf delete mode 100644 Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi delete mode 100644 Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf create mode 100644 Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi create mode 100644 Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf create mode 100644 Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi create mode 100644 Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf create mode 100644 Silicon/Hisilicon/Hi1610/Library/LpcLib/PlatformSysCtrlLibHi1610.lib diff --git a/Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi b/Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi index 30a0f77..16c91e2 100644 Binary files a/Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi and b/Platform/Hisilicon/D03/Drivers/Sm750Dxe/SmiGraphicsOutput.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi b/Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi index 39b8f58..2b6e4c1 100644 Binary files a/Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi and b/Platform/Hisilicon/D03/Drivers/TransferSmbiosInfo/TransSmbiosInfo.efi differ diff --git a/Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib b/Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib index fe23d93..ffe2a13 100644 Binary files a/Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib and b/Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2P.lib differ diff --git a/Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi b/Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi index 1fdea0c..354abcc 100644 Binary files a/Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi and b/Platform/Hisilicon/D03/MemoryInitPei/MemoryInit.efi differ diff --git a/Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv b/Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv index 1830a6a..9c781c6 100644 Binary files a/Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv and b/Platform/Hisilicon/D03/Sec/FVMAIN_SEC.Fv differ diff --git a/Platform/Hisilicon/D03/bl1.bin b/Platform/Hisilicon/D03/bl1.bin index 7bf0698..cdaa743 100644 Binary files a/Platform/Hisilicon/D03/bl1.bin and b/Platform/Hisilicon/D03/bl1.bin differ diff --git a/Platform/Hisilicon/D03/fip.bin b/Platform/Hisilicon/D03/fip.bin index 913d40d..ae4ed1a 100644 Binary files a/Platform/Hisilicon/D03/fip.bin and b/Platform/Hisilicon/D03/fip.bin differ diff --git a/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib b/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib index c55d678..e7c5f9f 100644 Binary files a/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib and b/Silicon/Hisilicon/Hi1610/Library/Hi1610Serdes/Hi1610SerdesLib.lib differ diff --git a/Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib b/Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib index 1b02db1..5ad2c8f 100644 Binary files a/Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib and b/Silicon/Hisilicon/Hi1610/Library/IpmiCmdLib/IpmiCmdLib.lib differ diff --git a/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib b/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib index f74d98d..e76c741 100644 Binary files a/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib and b/Silicon/Hisilicon/Hi1610/Library/LpcLib/LpcLib.lib differ diff --git a/Silicon/Hisilicon/Hi1610/Library/LpcLib/PlatformSysCtrlLibHi1610.lib b/Silicon/Hisilicon/Hi1610/Library/LpcLib/PlatformSysCtrlLibHi1610.lib new file mode 100644 index 0000000..68be770 Binary files /dev/null and b/Silicon/Hisilicon/Hi1610/Library/LpcLib/PlatformSysCtrlLibHi1610.lib differ diff --git a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib index ca78ae6..68be770 100644 Binary files a/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib and b/Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.lib differ diff --git a/Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib b/Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib index 6f88fc1..d6ce068 100644 Binary files a/Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib and b/Silicon/Hisilicon/Hi1610/Library/Uart/LpcSerialPortLib/LpcSerialPortLib.lib differ diff --git a/Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi b/Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi index 269243a..12640f2 100644 Binary files a/Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi and b/Platform/Hisilicon/D03/Drivers/GetInfoFromBmc/GetInfoFromBmc.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi b/Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi index c197895..d2565c8 100644 Binary files a/Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi and b/Platform/Hisilicon/D03/Drivers/Ipmi/IpmiInterfacePei/IpmiInterfacePei.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi b/Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi index 6201971..0d8ff52 100644 Binary files a/Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi and b/Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi b/Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi index 7409fcb..b85c19b 100644 Binary files a/Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi and b/Platform/Hisilicon/D03/Drivers/IpmiMiscOpDxe/IpmiMiscOp.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi b/Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi index a9238b1..89c4b5b 100644 Binary files a/Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi and b/Platform/Hisilicon/D03/Drivers/IpmiWatchdogDxe/IpmiWatchdogDxe.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi new file mode 100644 index 0000000..8ce6a6d Binary files /dev/null and b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf new file mode 100644 index 0000000..cd7c724 --- /dev/null +++ b/Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf @@ -0,0 +1,24 @@ +#/** @file +# +# Copyright (c) 2017, Hisilicon Limited. All rights reserved. +# Copyright (c) 2017, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = SnpPV600Dxe + FILE_GUID = 3247F15F-3612-4803-BD4E-4104D7EF944A + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + +[Binaries] + PE32|SnpPV600Dxe.efi|* diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi b/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi deleted file mode 100644 index eb69403..0000000 Binary files a/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.efi and /dev/null differ diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf b/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf deleted file mode 100644 index 204ef17..0000000 --- a/Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf +++ /dev/null @@ -1,27 +0,0 @@ -#/** @file -# -# Copyright (c) 2016, Hisilicon Limited. All rights reserved. -# Copyright (c) 2016-2017, Linaro Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = SnpPV600Dxe - FILE_GUID = 92D37768-571C-48d9-BEF5-9744AE2FDAF4 - MODULE_TYPE = UEFI_DRIVER - VERSION_STRING = 1.0 - - ENTRY_POINT = InitializeSnpPV600Driver - UNLOAD_IMAGE = SnpPV600Unload - -[Binaries] - PE32|SnpPV600Dxe.efi|* diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi new file mode 100644 index 0000000..5e7d8bd Binary files /dev/null and b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf new file mode 100644 index 0000000..fd53a79 --- /dev/null +++ b/Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf @@ -0,0 +1,24 @@ +#/** @file +# +# Copyright (c) 2017, Hisilicon Limited. All rights reserved. +# Copyright (c) 2017, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = SnpPlatform + FILE_GUID = 102D8FC9-20A4-42EB-AC14-1C98BA5B17A8 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + +[Binaries] + PE32|SnpPlatform.efi|* diff --git a/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi b/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi index 0a0d9d5..e1970fd 100644 Binary files a/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi and b/Platform/Hisilicon/D03/Drivers/OhciDxe/NativeOhci.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi b/Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi index 12b2af7..0572a71 100644 Binary files a/Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi and b/Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi b/Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi index b8d9be3..28a4104 100644 Binary files a/Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi and b/Platform/Hisilicon/D03/Drivers/SFC/SFCDriver.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi b/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi index e135930..c9b2ad6 100644 Binary files a/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi and b/Platform/Hisilicon/D03/Drivers/Sas/SasDriverDxe.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi new file mode 100644 index 0000000..4255641 Binary files /dev/null and b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.efi differ diff --git a/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf new file mode 100644 index 0000000..636be19 --- /dev/null +++ b/Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf @@ -0,0 +1,24 @@ +#/** @file +# +# Copyright (c) 2017, Hisilicon Limited. All rights reserved. +# Copyright (c) 2017, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = SasPlatform + FILE_GUID = 102D8FC9-20a4-42EB-aC14-1C98BA5b26A4 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + +[Binaries] + PE32|SasPlatform.efi|* From patchwork Wed Sep 20 14:48:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 113137 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp866253qgf; Wed, 20 Sep 2017 07:57:30 -0700 (PDT) X-Received: by 10.55.79.68 with SMTP id d65mr7726913qkb.110.1505919449996; Wed, 20 Sep 2017 07:57:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505919449; cv=none; d=google.com; s=arc-20160816; b=W3YImO62jULV0y5O6FEBVpqGNebtAqPe/ZXKCkOlY7xAUeWpKCkjYDjd7u/jPE9YPK hMcmRMVMuL5lCaldQTGnyC3n8xDK3ldJi36V1sjb498FeeRNds98SFu7Pp441/y8+8tU YR9FYwzgJBVVFHRjdhXOQwihUsUCUDkmLbwkhYPQg5E6gwryFDlxCqfXyCmRb/t2mNDu m7fpvrE9Nx1QlrY1/z5+NuATbekl4OAZ7ePnsX/t1w5sMk2cmTbH/HsrJfOFqc+GY1Ex KUzUPuRAivYMlMRbaWNJB5Tzv5u0J61ZTNfnUj+Gg+bRc804i2nemEYPYCcHXWnm6kjw 2SEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=WilvwRWWVjTdISuk3pORJT8WXfw7tJahdV5uf20GbPI=; b=LY5OmCfPHO24aD7UsQ7Uq2tnpBMBF3/AJaA4UuV/hq6zXYER4DHUcJjDUuIy1tYFR5 04XiNOsTWRT0I2v779JZ6EhnumSMzi7B2IH09pd/rzej2Q2sHXhdL01aCtJlc7sF3wqr 10Fwy3e9GaUn85lIllrvb42M2u+E8jpyuMJGEpZHpkDBdgxW/UHjJLtAM6ubjMOU/xNh h3tlPFL0rQCUraQC8ncTDjqZTxpVQ1Wmp/n58dShWC7vAxBBzkJupLLQgJw4qb3Fqrck ENtaRuhSb7JSzJBDyp4Pws4YFeWlx7ygEkP3ZFo7TEg5FZ4N3RzNQ0OGpqxUF/ZD5Gb0 mY7g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id b191si1483089qkc.204.2017.09.20.07.57.29; Wed, 20 Sep 2017 07:57:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id A2682635D3; Wed, 20 Sep 2017 14:57:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 964CC60B2B; Wed, 20 Sep 2017 14:56:23 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 05BC360999; Wed, 20 Sep 2017 14:56:19 +0000 (UTC) Received: from mail-pf0-f173.google.com (mail-pf0-f173.google.com [209.85.192.173]) by lists.linaro.org (Postfix) with ESMTPS id F3D2760999 for ; Wed, 20 Sep 2017 14:55:53 +0000 (UTC) Received: by mail-pf0-f173.google.com with SMTP id z84so1654760pfi.2 for ; Wed, 20 Sep 2017 07:55:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=iPRcs3OHfV72L45b42zNqK5B8akNoTf2U4Zu7yffHus=; b=LKpmAjOLNVU3YAZmo9F8yR02WpHWTK5w6DEJTm4pxc7UMzwXxmUzrbmadJVc20rmHz n6hz44eTjyDvlMTbybt5kzr4DT4Kbjs34HXG68aNOkY4ecb75inbV0kO2K2mh62EKjp5 oCh8eDPsq5jERGp75hlsY8z8ZM6bjNuTmRIuDNr4AyDDzd1LF7adsZktxR0Nr6bAnr8N X+J0h6ZinbWaSEOFiEggCpG0Mmn0TYpsLjjbwxsuT7sUVE+Jw+ImO7l1v1GmF6V+5Kna MCoqiv0uwzHXeoHSsUwnyjDgo6vEpnpwu4t0ApQb3V3Nle/wxlk94vHlUUw8jSIQNsUe Aflg== X-Gm-Message-State: AHPjjUhMgXum4N9inFJ1v2jkx5Aus8co2v+o4/gcCS/h4x0STgARiLX0 khKemIPEBIGwN55M5ttzIC6bVe3w X-Google-Smtp-Source: AOwi7QDJflodqUBsNyMoTD7POgXJWN5LqDG6oCTvbZkG/r0tg8ZUTWjjp1bwHhAv0Ejt1iFkQgkL8w== X-Received: by 10.84.240.196 with SMTP id l4mr2383600plt.443.1505919353299; Wed, 20 Sep 2017 07:55:53 -0700 (PDT) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id c7sm9157624pfc.55.2017.09.20.07.55.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Sep 2017 07:55:52 -0700 (PDT) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, graeme.gregory@linaro.org Date: Wed, 20 Sep 2017 22:48:47 +0800 Message-Id: <1505918938-52550-4-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> References: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> Cc: huangming23@huawei.com, zhangjinsong2@huawei.com, guoheyi@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v2 02/11] Hisilicon/D03: update all binary for update edk2 X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" 1. Add Drivers/SasPlatform; 2. Add Drivers/Net/SnpPlatform; Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D03/D03.dsc | 5 ----- Platform/Hisilicon/D03/D03.fdf | 5 ++++- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index afea162..7e25ffb 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -418,11 +418,6 @@ Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.inf - # - #network - # - Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf - MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index b62b908..b53bdca 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -242,7 +242,8 @@ READ_LOCK_STATUS = TRUE #Network # - INF Platform/Hisilicon/D03/Drivers/Net/SnpPV660Dxe/SnpPV600Dxe.inf + INF Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf + INF Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf @@ -271,6 +272,7 @@ READ_LOCK_STATUS = TRUE # INF Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf + INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf # @@ -278,6 +280,7 @@ READ_LOCK_STATUS = TRUE # INF ShellPkg/Application/Shell/Shell.inf + # # Bds # From patchwork Wed Sep 20 14:48:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 113139 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp867608qgf; Wed, 20 Sep 2017 07:58:52 -0700 (PDT) X-Received: by 10.36.177.68 with SMTP id c4mr3025968itj.91.1505919532094; Wed, 20 Sep 2017 07:58:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505919532; cv=none; d=google.com; s=arc-20160816; b=D0zNkcxAzGhsNQrP8U1sn67kPp9z1AYiGQj9e8kWAIophJfCiyvtmtEMrdZILMER/E OW6LznpEnL8dAwtVN2EbCfHluN8aQG667k9b9GRP1TJ6RhQMzGeXdPTZDg3F2p5DTden xqO5fFMX4xTujgdU7apoyDB6dIRNgEvneCY7UHpUBn0FuC/IP7io5IXPAySXGnejR38c zdUdWvPaaVJUnoYHXBAMlRO09c9hMINj1nbvvYEdN+liHZduB/S6d0AsbWdVGyJ2nb89 SrRu5ShRAe0qOJUp29RQtEpxO3r1eSwcKczJtL9sCbZBvwdav39oBsEl1aMeFe8/rInB 0E0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=CGSfiSChaXO731bRv2AaJrAjHxxsA9NN+YgKFpiJwag=; b=jlJEmhts8M7n9iPLYpCI/MOzJk/5fLB5tOYgWYBQIfaJyedwDHi+MdyZ8YbeTTQvzY uA5us1MZjDuo3F3iKDSDasfYdZGOpHpF3qsvuulIcnNTOyLhiSGn25+nnz4L6kn9IrGu S2BRfeV8Ukdca5KQrfSJWKO4JZFUJ9sNu4rzpFmwpTi6QANYjv/k0aGyMd4JmsjKg8qt QNDEUzMkasV2bD5mzQGAks42to5HE6cz6NLG1Y3kFHwBCrTv2JeJOdLqQcGKX01iai3p YrdwULg0v4Wbroh456o1TuQv+n7zq6/qX3L5GvsKpYQ5u1Gc6AXi+QA6/Rxja4eCTKav tPYA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id s103si1602827ioi.273.2017.09.20.07.58.51; Wed, 20 Sep 2017 07:58:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 922C9608D3; Wed, 20 Sep 2017 14:58:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 6416B60C0A; Wed, 20 Sep 2017 14:57:08 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 1DD1162ED2; Wed, 20 Sep 2017 14:57:01 +0000 (UTC) Received: from mail-pg0-f53.google.com (mail-pg0-f53.google.com [74.125.83.53]) by lists.linaro.org (Postfix) with ESMTPS id 502D160BE3 for ; Wed, 20 Sep 2017 14:55:59 +0000 (UTC) Received: by mail-pg0-f53.google.com with SMTP id m30so1810278pgn.6 for ; Wed, 20 Sep 2017 07:55:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=VVA4KXNbN+tAKxKM52KeFIrS3F6PFkTyh6+AttLRx0o=; b=ItdutVjuwCenGJCGsTdseHXcfZgXYNjGq0RU9B0N9f8jbNIljA0T+7kTj6y4WvlxHS 80SwYUgQWSech3WVJcb+3GbVeH58WfXtcczwCssDs063hNAOiYIEUyG9vAEhr2bRIXDZ 9CR/jr9e/UparZ2WlZr1yA8rXp257WfLF6ICyn2MFGD7D+9wT8gyI3r3ZbQ5QroET9Rj FmlerY1u+FeghDnVXxskjPRK0fC3EeGHKGjh66LAIq7hRlK1tWsauSa0mmUtv1XKJ0F0 PaQp7LP4Mv791fgS3RGw7gHwwlWKUgSwv/zBt/zUAa1b2sM1rWip8HHAXkdTojMz8pB8 dIhA== X-Gm-Message-State: AHPjjUi1AxMd/XUDvDfjW2w4CJlwp6nk58bzLQ3kC+bHKeTmjirJkLdo YzDW0bEai+XyiuhRFRwEDhmbGDaE X-Google-Smtp-Source: AOwi7QD3Fzr2Sz8UDn88Q/K9BbusToTOvao5Ls3UEdqNKLYot7clBHjE5SAzAp5yZ7HzCoVKZF4l7w== X-Received: by 10.99.108.2 with SMTP id h2mr2411795pgc.371.1505919358486; Wed, 20 Sep 2017 07:55:58 -0700 (PDT) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id c7sm9157624pfc.55.2017.09.20.07.55.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Sep 2017 07:55:57 -0700 (PDT) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, graeme.gregory@linaro.org Date: Wed, 20 Sep 2017 22:48:49 +0800 Message-Id: <1505918938-52550-6-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> References: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> Cc: huangming23@huawei.com, zhangjinsong2@huawei.com, guoheyi@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v2 03/11] Hisilicon: Fix the drivers use the same GUID issue X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" The drivers build from separate sources, their GUID should be different. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Heyi Guo Reviewed-by: Leif Lindholm --- Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf | 2 +- Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf | 2 +- Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf | 2 +- Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf | 2 +- Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf | 2 +- Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf | 2 +- Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf | 2 +- Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf | 2 +- Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf | 2 +- Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf | 2 +- .../Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf | 2 +- Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf | 2 +- Silicon/Hisilicon/Library/I2CLib/I2CLib.inf | 2 +- Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf | 2 +- 14 files changed, 14 insertions(+), 14 deletions(-) diff --git a/Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf b/Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf index 5506a58..3f3f81c 100644 --- a/Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf +++ b/Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf @@ -16,7 +16,7 @@ [Defines] INF_VERSION = 0x00010005 BASE_NAME = EarlyConfigPeim - FILE_GUID = A181AD33-E64A-4084-A54A-A69DF1FB0ABF + FILE_GUID = ECAE8400-9CCE-4BA5-9B44-74CAABE4DA79 MODULE_TYPE = PEIM VERSION_STRING = 1.0 ENTRY_POINT = EarlyConfigEntry diff --git a/Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf b/Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf index c952414..e881899 100644 --- a/Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf +++ b/Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf @@ -16,7 +16,7 @@ [Defines] INF_VERSION = 0x00010005 BASE_NAME = FdtUpdateLib - FILE_GUID = 02CF1727-E697-47fc-8CC2-5DCB81B26DD9 + FILE_GUID = 0F9ADE24-46B4-4506-8802-60C519B56133 MODULE_TYPE = BASE VERSION_STRING = 1.0 LIBRARY_CLASS = FdtUpdateLib diff --git a/Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf b/Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf index 4d2dbba..ab3b62b 100644 --- a/Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf +++ b/Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf @@ -16,7 +16,7 @@ [Defines] INF_VERSION = 0x00010005 BASE_NAME = PlatformPciLib - FILE_GUID = 61b7276a-fc67-11e5-82fd-47ea9896dd5d + FILE_GUID = 128F1E1E-A921-4277-A796-A4A47B96B7D2 MODULE_TYPE = BASE VERSION_STRING = 1.0 diff --git a/Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf b/Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf index df5adf1..4c5955f 100644 --- a/Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf +++ b/Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf @@ -16,7 +16,7 @@ [Defines] INF_VERSION = 0x00010005 BASE_NAME = OemNicConfig - FILE_GUID = 3A23A929-1F38-4d04-8A01-38AD993EB2CE + FILE_GUID = BF422A22-CA90-4C34-95B9-3D147AF09E70 MODULE_TYPE = DXE_DRIVER VERSION_STRING = 1.0 ENTRY_POINT = OemNicConfigEntry diff --git a/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf b/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf index 9569b91..2d9d53d 100755 --- a/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf +++ b/Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf @@ -16,7 +16,7 @@ [Defines] INF_VERSION = 0x00010005 BASE_NAME = FdtUpdateLib - FILE_GUID = 02CF1727-E697-47fc-8CC2-5DCB81B26DD9 + FILE_GUID = B80B9FF1-FAB9-4BE5-B602-5ABAA6B7A3D4 MODULE_TYPE = BASE VERSION_STRING = 1.0 LIBRARY_CLASS = FdtUpdateLib diff --git a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf index 9d8ea7e..0f6b68d 100644 --- a/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf +++ b/Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf @@ -17,7 +17,7 @@ [Defines] INF_VERSION = 0x00010019 BASE_NAME = EarlyConfigPeimD05 - FILE_GUID = A181AD33-E64A-4084-A54A-A69DF1FB0ABF + FILE_GUID = 13525B94-06F0-41AC-8CAF-724B149FD259 MODULE_TYPE = PEIM VERSION_STRING = 1.0 ENTRY_POINT = EarlyConfigEntry diff --git a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf index 4fe7ac6..bf44ff7 100644 --- a/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf +++ b/Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf @@ -16,7 +16,7 @@ [Defines] INF_VERSION = 0x00010019 BASE_NAME = OemMiscLibHi1616Evb - FILE_GUID = B9CE7465-21A2-4ecd-B347-BBDDBD098CEE + FILE_GUID = 751C7627-D5F8-499C-AEEEE-C87858759612 MODULE_TYPE = BASE VERSION_STRING = 1.0 LIBRARY_CLASS = OemMiscLib diff --git a/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf b/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf index cd64193..21bb33a 100644 --- a/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf +++ b/Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf @@ -16,7 +16,7 @@ [Defines] INF_VERSION = 0x00010019 BASE_NAME = PlatformPciLib - FILE_GUID = 61b7276a-fc67-11e5-82fd-47ea9896dd5d + FILE_GUID = B94B8A3A-AD7D-4F26-B140-1E699682176B MODULE_TYPE = BASE VERSION_STRING = 1.0 diff --git a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf index 174e967..89447cc 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf +++ b/Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf @@ -16,7 +16,7 @@ [Defines] INF_VERSION = 0x00010005 BASE_NAME = IoInitDxe - FILE_GUID = e99c606a-5626-11e5-b09e-bb93f4e4c400 + FILE_GUID = 28C9B7DE-AAD6-4E9B-811B-050AD3DAB9A3 MODULE_TYPE = DXE_DRIVER VERSION_STRING = 1.0 diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf index 686d041..ee9dbed 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf +++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf @@ -17,7 +17,7 @@ [Defines] INF_VERSION = 0x00010005 BASE_NAME = PcieInitDxe - FILE_GUID = 2D53A704-A544-4A82-83DF-FFECF4B4AA97 + FILE_GUID = 8EB6E216-BA47-4B30-B68A-2B371F7232A6 MODULE_TYPE = DXE_DRIVER VERSION_STRING = 1.0 ENTRY_POINT = PcieInitEntry diff --git a/Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf b/Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf index 6faefb1..17d59ee 100644 --- a/Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf +++ b/Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf @@ -20,7 +20,7 @@ [Defines] INF_VERSION = 0x00010005 BASE_NAME = DS3231RealTimeClockLib - FILE_GUID = 470DFB96-E205-4515-A75E-2E60F853E79D + FILE_GUID = 5FD8127D-11E1-488F-8CF1-A143157D6BF0 MODULE_TYPE = BASE VERSION_STRING = 1.0 LIBRARY_CLASS = RealTimeClockLib diff --git a/Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf b/Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf index d7957ea..df65d4b 100644 --- a/Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf +++ b/Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf @@ -17,7 +17,7 @@ [Defines] INF_VERSION = 0x00010005 BASE_NAME = Dw8250SerialPortLib - FILE_GUID = 16D53E86-7EA6-47bd-861F-511ED9B8ABE0 + FILE_GUID = 78337705-D2A8-4EA7-9C18-27FC4A8A2C6E MODULE_TYPE = BASE VERSION_STRING = 1.0 LIBRARY_CLASS = SerialPortLib diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLib.inf b/Silicon/Hisilicon/Library/I2CLib/I2CLib.inf index 7f95124..9bca88f 100644 --- a/Silicon/Hisilicon/Library/I2CLib/I2CLib.inf +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLib.inf @@ -16,7 +16,7 @@ [Defines] INF_VERSION = 0x00010005 BASE_NAME = I2CLib - FILE_GUID = FC5651CA-55D8-4fd2-B6D3-A284D993ABA2 + FILE_GUID = 162F2DF1-DBF8-41E6-9792-92A96ADEAB40 MODULE_TYPE = BASE VERSION_STRING = 1.0 LIBRARY_CLASS = I2CLib diff --git a/Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf b/Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf index 4990072..1bb4f5c 100644 --- a/Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf +++ b/Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf @@ -16,7 +16,7 @@ [Defines] INF_VERSION = 0x00010005 BASE_NAME = I2CLibRuntime - FILE_GUID = FC5651CA-55D8-4fd2-B6D3-A284D993ABA2 + FILE_GUID = 2E602B32-9203-44A4-BF28-1FF98BD89523 MODULE_TYPE = DXE_RUNTIME_DRIVER VERSION_STRING = 1.0 LIBRARY_CLASS = I2CLib From patchwork Wed Sep 20 14:48:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 113140 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp868075qgf; Wed, 20 Sep 2017 07:59:18 -0700 (PDT) X-Received: by 10.107.184.139 with SMTP id i133mr2114224iof.278.1505919558229; Wed, 20 Sep 2017 07:59:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505919558; cv=none; d=google.com; s=arc-20160816; b=bonahQqW2o9hvKR4p76rT9ucafY8louAKoG8NpJuPdqX5hcx4uBEZUzOxMKSf8nG/v AxA9Tz7XsZznsBNC5t+UyeN9gHL9HeyBLIR9YWmb7cqD7+LU6o0EtrgMDQbSE4LViy2m 3yzru0qN713I78MGUnQU+mXOu1CeIricBSZj5f7F3SRagP6GDuw5+bq+kcj+Me1+Pdb8 iGaIHV8hl3Nm2KZmlgTIySeHRN8RfzjLnxEu2d+7YZ0gDu6cHsrg+eqKrEIbC4aIdT93 SlHvT/HuUfK4WP3e9DVfaIhkPRbYXO7OyxQ3sEwJgmijqkJZ0Htna/5MIXrtcgheWpX/ 7ngg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=xsKfAPWXtFioR7yyFxZH7egR7fhol1mPa1au/at5wm0=; b=DssfsaXy6cSOrZdo7IWl+RB8FFEoFC7mxqYA4U5wGV/zKLcV4T0Pp9csjQlhdRv6U9 mpy+VEwU/DSLjJt0icfHBLPuAVd1uI20OedTz2Pu1ceTKUZF5lgDsqhj2VCsQ5GX5yJC epN//09CjP+2OIESR0pOYMC4aqqFfvNzOQZnjoue4zox0YD0eHvFpoMq/jjkC4AfeIHg FlSuoz8C6J8zm5z70BZ1+OQ+2TvFgx3RyQKDysT3WVZ7SkPaOyVoT1IhBLOK1s8loAPi hWTqe6XFQT8MtjnV1ZOKSSWuMVYHQx3QzzhIfvXlB3uWWQA0wbk3kSIwjKRYdC+0m0co Bjtw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. 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Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: Ming Huang Value of the environment variable FIRMWARE_VER is GIT SHA by default, and you can add the environment variable FIRMWARE_VER to EXTRA_OPTIONS at build time to specify something else, eg. "16.12-". Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D03/D03.dsc | 6 +++++- Platform/Hisilicon/D05/D05.dsc | 6 +++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 7e25ffb..c47d552 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -170,7 +170,11 @@ gHisiTokenSpaceGuid.PcdAlgSmmuBaseAddress|0xd0040000 - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D03 UEFI 16.12 Release" + !ifdef $(FIRMWARE_VER) + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)" + !else + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D03 UEFI 17.10 Release" + !endif gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18" diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 7cd5758..c4f1f24 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -188,7 +188,11 @@ gHisiTokenSpaceGuid.PcdIsMPBoot|1 gHisiTokenSpaceGuid.PcdSocketMask|0x3 - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D05 UEFI 16.12 Release" + !ifdef $(FIRMWARE_VER) + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)" + !else + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Hisilicon D05 UEFI 17.10 Release" + !endif gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18" From patchwork Wed Sep 20 14:48:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 113147 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp873454qgf; Wed, 20 Sep 2017 08:03:17 -0700 (PDT) X-Received: by 10.55.157.87 with SMTP id g84mr7682279qke.70.1505919797392; Wed, 20 Sep 2017 08:03:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505919797; cv=none; d=google.com; s=arc-20160816; b=v7K6v0M69iuutZTmL1+MWFbYcH97XkldlH9kXtEXucqHtPniCn6Cz5ezLs/CwmAqfW kfYWZgDCuMFU+KVhad8o/3n5NHHlW2hXkHiZq36URSr0gMLKjehBAwNXpDCffphmmj7A xeViVmwxWDHfg9fLp4pWp884GIjmTPnyYtZ3r6GgBPYD8A4Rx6oQO9Ne5T5a1tvu1F3n ixhCEDbOpoqj1TEAugUBBd6qJngFn7k2QGFYQeCre4Ylr4Gv4urXp/QrSF9artFzKhA1 ii6ZWYblyHh0PmYQx8h4teGm2lYFZmC32TDQzhhPRh+GJjofYw20RuAq0RuDKykwB+xR WgEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=35hxgFLTfN4iRZXDtcko4XF8xZ9ba95YD5phjxj+9wM=; b=zoHsicRAdgA5FBBVsZ1beKfp3ckmyxcZCL+2jlV6DeWvm46HJx9RMwkyHavAsCioYs XNp3LGRjIEcEmoGNMaGuF8vpGIkTYE5/f2QUuNDlHw6y7LjH17vU0HHqPi05jPYjUTrs Ks5ey7ChDF6ckbIqp0T+4e//gw0uqJCOctF8dZ6msTMd+hZ3dKCVwV2UC6OXi3CLAV85 BNdClW7J+LxMydr80NYzvmQVRV6n4enKP9j0vbCgBKGO5P8dr6ImM57cEzC0D5TyoZXb R+rgB57MS0aXekj8ICVcFunKzcpuwPLFjcKdaFJFWwJ0HbSSpwWBiKWJXIv3GnSHKrCo HPhA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id i62si2060415qkh.358.2017.09.20.08.03.17; Wed, 20 Sep 2017 08:03:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id EB0C260C90; Wed, 20 Sep 2017 15:03:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, RCVD_IN_SORBS_SPAM, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id CDD566444A; Wed, 20 Sep 2017 14:57:36 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id A7C1C62C6C; Wed, 20 Sep 2017 14:57:28 +0000 (UTC) Received: from mail-pg0-f45.google.com (mail-pg0-f45.google.com [74.125.83.45]) by lists.linaro.org (Postfix) with ESMTPS id 9D96C60C95 for ; Wed, 20 Sep 2017 14:56:06 +0000 (UTC) Received: by mail-pg0-f45.google.com with SMTP id p5so1810789pgn.7 for ; Wed, 20 Sep 2017 07:56:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=za/3Qzwe2Qdv5/ReRoykmPTdxBd9x6u2AXHpmC+qmlY=; b=JCt2cX9yy0uYz4QHj0WpECAxBHsxfzhLe4aiPVKcD+xz1wmHmOee93xcenrH1R68Ar rlj6mM/hezE58Y1gMeiv2Ux7mE4bkh0+8txfonUBHFmb1zMHljcj+lFSnKyCDFp+cOi5 XJRAkdJvgZwKF/zRurr5/pn67mloUEJeZC0lk9bFVYrPNiHvgVEeSC06gqmq4kJWwKtv IF1BETRIhCCDd9mpYKP+1XNBtVND39FWI+pjS/lkkCP1HieJaZlMAhgwOM9Rzu/taKeV Z5w5nSdqawEC2/UHB01JYyBK97oVE6TqGciH423SjuffLBCzYxVdwGQmErSPZYS5HNT6 mHsg== X-Gm-Message-State: AHPjjUiJ0Uvm2LMwplhMRzH1RR7HYorcrjFNm5Kj5DvxoiY1RLmyHyQm OV7EFSfZ+l6IA+elNRLlp33KM9A9 X-Google-Smtp-Source: AOwi7QDx3mkpsaz+d2TVYCsrKGy3Fv2t5R6SRwHvfHTdqlpw4KB28eltQtai8dGl5LRNzMEk0lRfkg== X-Received: by 10.98.217.220 with SMTP id b89mr2379101pfl.144.1505919365844; Wed, 20 Sep 2017 07:56:05 -0700 (PDT) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id c7sm9157624pfc.55.2017.09.20.07.56.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Sep 2017 07:56:05 -0700 (PDT) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, graeme.gregory@linaro.org Date: Wed, 20 Sep 2017 22:48:52 +0800 Message-Id: <1505918938-52550-9-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> References: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> Cc: guoheyi@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v2 05/11] Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBase X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: huangming Io BAR should be based IoBase and Mem BAR should be based PciRegionBase. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- .../Drivers/PciHostBridgeDxe/PciHostBridge.c | 29 ++++++++++++++-------- .../Drivers/PciHostBridgeDxe/PciRootBridgeIo.c | 15 +++++++++-- 2 files changed, 31 insertions(+), 13 deletions(-) diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c index a970da6..6ecc1e5 100644 --- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c +++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c @@ -1410,9 +1410,8 @@ SetResource( Ptr->ResType = 1; Ptr->GenFlag = 0; Ptr->SpecificFlag = 0; - /* This is PCIE Device Bus which start address is the low 32bit of mem base*/ - Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) + - (RootBridgeInstance->MemBase & 0xFFFFFFFF); + /* PCIE Device Iobar address should be based on IoBase */ + Ptr->AddrRangeMin = RootBridgeInstance->IoBase; Ptr->AddrRangeMax = 0; Ptr->AddrTranslationOffset = \ (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS; @@ -1429,9 +1428,13 @@ SetResource( Ptr->GenFlag = 0; Ptr->SpecificFlag = 0; Ptr->AddrSpaceGranularity = 32; - /* This is PCIE Device Bus which start address is the low 32bit of mem base*/ + /* PCIE device Bar should be based on PciRegionBase */ + if (RootBridgeInstance->PciRegionBase > 0xFFFFFFFF) { + DEBUG((DEBUG_ERROR, "PCIE Res(TypeMem32) unsupported.\n")); + return EFI_UNSUPPORTED; + } Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) + - (RootBridgeInstance->MemBase & 0xFFFFFFFF); + (RootBridgeInstance->PciRegionBase & 0xFFFFFFFF); Ptr->AddrRangeMax = 0; Ptr->AddrTranslationOffset = \ (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS; @@ -1448,9 +1451,13 @@ SetResource( Ptr->GenFlag = 0; Ptr->SpecificFlag = 6; Ptr->AddrSpaceGranularity = 32; - /* This is PCIE Device Bus which start address is the low 32bit of mem base*/ + /* PCIE device Bar should be based on PciRegionBase */ + if (RootBridgeInstance->PciRegionBase > 0xFFFFFFFF) { + DEBUG((DEBUG_ERROR, "PCIE Res(TypePMem32) unsupported.\n")); + return EFI_UNSUPPORTED; + } Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) + - (RootBridgeInstance->MemBase & 0xFFFFFFFF); + (RootBridgeInstance->PciRegionBase & 0xFFFFFFFF); Ptr->AddrRangeMax = 0; Ptr->AddrTranslationOffset = \ (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS; @@ -1467,9 +1474,9 @@ SetResource( Ptr->GenFlag = 0; Ptr->SpecificFlag = 0; Ptr->AddrSpaceGranularity = 64; - /* This is PCIE Device Bus which start address is the low 32bit of mem base*/ + /* PCIE device Bar should be based on PciRegionBase */ Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) + - (RootBridgeInstance->MemBase & 0xFFFFFFFFFFFFFFFF); + (RootBridgeInstance->PciRegionBase & 0xFFFFFFFFFFFFFFFF); Ptr->AddrRangeMax = 0; Ptr->AddrTranslationOffset = \ (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS; @@ -1486,9 +1493,9 @@ SetResource( Ptr->GenFlag = 0; Ptr->SpecificFlag = 6; Ptr->AddrSpaceGranularity = 64; - /* This is PCIE Device Bus which start address is the low 32bit of mem base*/ + /* PCIE device Bar should be based on PciRegionBase */ Ptr->AddrRangeMin = (RootBridgeInstance->ResAllocNode[Index].Base - RootBridgeInstance->MemBase) + - (RootBridgeInstance->MemBase & 0xFFFFFFFFFFFFFFFF); + (RootBridgeInstance->PciRegionBase & 0xFFFFFFFFFFFFFFFF); Ptr->AddrRangeMax = 0; Ptr->AddrTranslationOffset = \ (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS; diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c index 03edcf1..8dfb4b9 100644 --- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c +++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c @@ -2301,8 +2301,19 @@ RootBridgeIoConfiguration ( PrivateData = DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This); for (Index = 0; Index < TypeMax; Index++) { if (PrivateData->ResAllocNode[Index].Status == ResAllocated) { - Configuration.SpaceDesp[Index].AddrRangeMin = PrivateData->ResAllocNode[Index].Base; - Configuration.SpaceDesp[Index].AddrRangeMax = PrivateData->ResAllocNode[Index].Base + PrivateData->ResAllocNode[Index].Length - 1; + switch (Index) { + case TypeIo: + Configuration.SpaceDesp[Index].AddrRangeMin = PrivateData->IoBase; + break; + case TypeBus: + Configuration.SpaceDesp[Index].AddrRangeMin = PrivateData->ResAllocNode[Index].Base; + break; + default: + /* PCIE Device bar address should be base on PciRegionBase */ + Configuration.SpaceDesp[Index].AddrRangeMin = (PrivateData->ResAllocNode[Index].Base - PrivateData->MemBase) + + (PrivateData->PciRegionBase & 0xFFFFFFFFFFFFFFFF); + } + Configuration.SpaceDesp[Index].AddrRangeMax = Configuration.SpaceDesp[Index].AddrRangeMin + PrivateData->ResAllocNode[Index].Length - 1; Configuration.SpaceDesp[Index].AddrLen = PrivateData->ResAllocNode[Index].Length; } } From patchwork Wed Sep 20 14:48:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 113142 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp869579qgf; Wed, 20 Sep 2017 08:00:42 -0700 (PDT) X-Received: by 10.55.21.228 with SMTP id 97mr7253665qkv.6.1505919642228; Wed, 20 Sep 2017 08:00:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505919642; cv=none; d=google.com; s=arc-20160816; b=RNJI67wID7TZ/L67aJayfb5Jz7BPlnashduFHYoMFXzIZWYj8I+RQG2PTIrf+dWph/ mMoYZ04F9W4s3w6GGQilBV1v8dFzRpXkiVE2v2V5I4nfpxxl3z48YjEtTjsSdN+Cmr0M VLUOc/7ptYFM+qNFNMENfmfFuzNFqBjjo1DqYIfxZuM1ELzzOVSP8DGQ5GNEkSge1ww5 W9TDQ0iVhvpiE+cJmNCDO3Jg7OTlzVDoX7rfE7GYw3yQG4LCNp1xnsDr9egIzhM1ZZWU uM+jWtT6Mjyzer/NvZVoWxL9WwdRFLCcu6AfSTVNsqbGW4HWv9LTNMw8TnDvGkdSub67 DiWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=prm2gz6SadINcYspT192k04OTv8dU7reGYTrx7YWdQU=; b=O3ct9zM9quBmOm5Y3McSSfn22UMVqlHtAw5gRaivH2b+e3DjFXlwfuH9EM92ozigog uIGS0hEr3Ir0VpD3jSje8AsyMESk8cNYI+PrS45fG+AJnQ0xRVqkWcg9rJTlVSdthKP3 K7I+3YnVv0bsIbJhGnAevb7pll045iCiaIhAXTJI5d3AVp9eAqFRdSoE54icHWAWcMqX 9Xbq3FewWD245W3oX/5SgVOIMjFvNcQ7cygKmt8qAysoqoFqmom0hw83p1B2gCdK9qeD BSxnnIq0A0vMUeH2uTQyEHOuCHAbwlq2vQKIhW4aBkCIAe2PKOHs4RHwzuW+xi/pryuL l63Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id i21si1988102qti.429.2017.09.20.08.00.41; Wed, 20 Sep 2017 08:00:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id A2AD760CC6; Wed, 20 Sep 2017 15:00:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id E961860D3A; Wed, 20 Sep 2017 14:57:27 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id AA3A2636AF; Wed, 20 Sep 2017 14:57:23 +0000 (UTC) Received: from mail-pf0-f178.google.com (mail-pf0-f178.google.com [209.85.192.178]) by lists.linaro.org (Postfix) with ESMTPS id 04DC760CE2 for ; Wed, 20 Sep 2017 14:56:09 +0000 (UTC) Received: by mail-pf0-f178.google.com with SMTP id z84so1655093pfi.2 for ; Wed, 20 Sep 2017 07:56:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=OumtfoCTZN9MDHzyy9xR1aHMNWThC57ULD4iyGysZ7w=; b=aMcvkOfP3nDYCxSJzyemFHCIDzxHpIvJhVtFsTzNsDReHyZjKU91hJ+qqcsFt4dqYq CT1iJ1ltZvB+74in87J9BD84FIG0n8hccQtmmoZhGrJIkSeBX2afvY05VJtg1m0UVuk2 r9uSdG32+mWf9kOvSSI4YCxUW6p2H5VTtLC9E7b6yESk1qjU+0b5f0X4Vt7thGLielUo Dpou6Z1k4vwa3JvGGUJN4H+loNVbS75SS6bQOJviT6zJItX+WtiaYrqa+JhRXrpkEUau BBLz8wKfK2M1ApKdLJp0i895YnnFmKEPawD28XpuVthYw4T0OQAPu5gox4AQIj/7jQjS lz/Q== X-Gm-Message-State: AHPjjUjEb2p66tL98XK/8qYjj4ZJP0tW3MLGmL+rTDhCcr8AB1hLU5zA TA85OsW8MhWt+gH/dopHkuG3s8CE X-Google-Smtp-Source: AOwi7QCtFP7he20jtMyi2Ao6AGpk8E/exvHLItBjbroyLx9NfTghtZfcLKqSyzQGRXhPnpnHxbUmuQ== X-Received: by 10.98.211.76 with SMTP id q73mr2418257pfg.348.1505919368203; Wed, 20 Sep 2017 07:56:08 -0700 (PDT) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id c7sm9157624pfc.55.2017.09.20.07.56.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Sep 2017 07:56:07 -0700 (PDT) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, graeme.gregory@linaro.org Date: Wed, 20 Sep 2017 22:48:53 +0800 Message-Id: <1505918938-52550-10-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> References: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> Cc: guoheyi@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v2 06/11] D05/PCIe: Modify PcieRegionBase of secondary chip X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: huangming On D05 PCIe now, 2p NA PCIe2 and 2p NB PCIe0's pci domain addresses are 0x20000000 and 0x30000000 based. These addresses overlap with the DDR memory range 0-1G. In this situation, on the inbound direction, our pcie will drop the DDR address access that are located in the pci range window and lead to a dataflow error. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D05/D05.dsc | 12 ++++++------ Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 8 ++++---- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index c4f1f24..df37650 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -329,12 +329,12 @@ gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionSize|0xbeffff gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionBaseAddress|0x400a9400000 gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionSize|0xbeffff - gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionBaseAddress|0x20000000 - gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xcfffffff + gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionBaseAddress|0x40000000 + gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xafffffff gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionBaseAddress|0x400ab400000 gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionSize|0xbeffff - gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionBaseAddress|0x30000000 - gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xbfffffff + gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionBaseAddress|0x40000000 + gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xafffffff gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionBaseAddress|0x40000000 gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionSize|0xafffffff gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionBaseAddress|0x408aa400000 @@ -352,9 +352,9 @@ gHisiTokenSpaceGuid.PcdHb0Rb7CpuMemRegionBase|0x8B9800000 gHisiTokenSpaceGuid.PcdHb1Rb0CpuMemRegionBase|0x400A8400000 gHisiTokenSpaceGuid.PcdHb1Rb1CpuMemRegionBase|0x400A9400000 - gHisiTokenSpaceGuid.PcdHb1Rb2CpuMemRegionBase|0x65020000000 + gHisiTokenSpaceGuid.PcdHb1Rb2CpuMemRegionBase|0x65040000000 gHisiTokenSpaceGuid.PcdHb1Rb3CpuMemRegionBase|0x400AB400000 - gHisiTokenSpaceGuid.PcdHb1Rb4CpuMemRegionBase|0x75030000000 + gHisiTokenSpaceGuid.PcdHb1Rb4CpuMemRegionBase|0x75040000000 gHisiTokenSpaceGuid.PcdHb1Rb5CpuMemRegionBase|0x79040000000 gHisiTokenSpaceGuid.PcdHb1Rb6CpuMemRegionBase|0x408AA400000 gHisiTokenSpaceGuid.PcdHb1Rb7CpuMemRegionBase|0x408AB400000 diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl index 79267e5..55c7f50 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl @@ -646,10 +646,10 @@ Scope(_SB) Cacheable, ReadWrite, 0x0, // Granularity - 0x20000000, // Min Base Address + 0x40000000, // Min Base Address 0xefffffff, // Max Base Address 0x65000000000, // Translate - 0xd0000000 // Length + 0xb0000000 // Length ) QWordIO ( ResourceProducer, @@ -766,10 +766,10 @@ Scope(_SB) Cacheable, ReadWrite, 0x0, // Granularity - 0x30000000, // Min Base Address + 0x40000000, // Min Base Address 0xefffffff, // Max Base Address 0x75000000000, // Translate - 0xc0000000 // Length + 0xb0000000 // Length ) QWordIO ( ResourceProducer, From patchwork Wed Sep 20 14:48:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 113143 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp870367qgf; Wed, 20 Sep 2017 08:01:12 -0700 (PDT) X-Received: by 10.55.27.145 with SMTP id m17mr6964063qkh.243.1505919672325; Wed, 20 Sep 2017 08:01:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505919672; cv=none; d=google.com; s=arc-20160816; b=UaSwo03o/FAdJR5En7OxSQ9++I2lOot0LwhtCMg0eKmte1++okA/OOc1UjPFfAy5AL Kq6zMRKx2P+MaG0x7vROrUxGbwTU4v2RL4NKoUZSTNnE8wJV3+xQ97OSSq7XKzmRaEkN N8r1TFBQke6lcU75gdG6UEI29h4JHv/ktU0tT76fVIGDOlqm0HEC6MsBKeH6EDcwFpYR t3SzfxWTRcE4YNwc+vq+A2Squ4ce7craUehmeqCMFhtb1UVc7EUuxXZHYG+le1rPtqXd +s1cy16JBcwsaFYO0/BHU+WFrhLQbv55FyhuZKZxyW81uxIePjCPAJT98zyN8cvwbDpG lADQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=GWfJksHkoEL/m7Brx4BVCPAU6oOd2ZPmwSO83e53cHU=; b=PAZEuGSVuuUsOgkFpt4ljWYM6YoSUU7crveQOahvpunLAtEul/+HdMa2fGquSu4ySO JBzjW2gq3vcAtN9YAOjs2yzqcgCaITo1RkIe1cv7+C+lqjTLC/xBL/xfMbuFOkrYbHfV 9JRNtncVBw3WK6srjXp3dUQiGpExf6rl59Jf+k4GK2mpUa64QApszGh2jE0zY4JZdD4e BkYphLfJbv/LMCywnXC50ztpdumzf7ojCZNjLQbQR/5WPnLq8xGAkT/ibODe204/MTER aTYanNHob5CCI/cmvWJxY8S1YTxFaD/hhAlPjK4SqwQy/T8I//Ef0FXs3tj1azxNZ5HF 4+pg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. 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Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: Chenhui Sun The PerTuning function is not stable, it will cause the 3008/3108 crash, remove this function first. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chenhui Sun --- Platform/Hisilicon/D03/D03.dsc | 1 - 1 file changed, 1 deletion(-) diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index c47d552..33e9940 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -112,7 +112,6 @@ # It could be set FALSE to save size. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE - gHisiTokenSpaceGuid.PcdIsPciPerfTuningEnable|TRUE [PcdsFixedAtBuild.common] gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"D03" From patchwork Wed Sep 20 14:48:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 113144 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp871170qgf; Wed, 20 Sep 2017 08:01:44 -0700 (PDT) X-Received: by 10.129.69.4 with SMTP id s4mr4037768ywa.263.1505919704638; Wed, 20 Sep 2017 08:01:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505919704; cv=none; d=google.com; s=arc-20160816; b=MGNpFtRZwjToYLLzWVB83L2ihdr8YjcEyffdGzSkc5aPOS1VZASb+xBEQhRpzCl2my MzQb9mVTlA07YzXIFw/UXb3xdaopZqgNoE0H1TLRT0bzzv71QPpZDlNKMX5SmYphkpLf g/xdoqT+BsTssjmjza6LrKtD1OMDwGoW/fsgvV4YG3FcovwZHYTcC058fdh0m/VYFzQY wUUYCRwLJW2yloC40Af87ZIzyoi7cfQ19wMvrRptq+BZgfpDjcRxr/qiDcibMGCZWwvW lUGOqTzFt1GP+WRJWa9utVdiBXvUeSUHvQ2Er0WdFIClpPavONRtelLy7rgf2Hb3IRUA CpTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=kqUcaRFbDMCFQm3JQXnGSps+uwGbpKPE7bE23qBbLBg=; b=BmEb+bZ7KDYbB4lG7AzIliTd/H6ofNRE+jDOmHWas9WkwQ5DtOfWlSq4ssRMCMLJCo okbJT2kuVD4dgz+vNCf1ZnvyqwmJ7G5YHl70/M7KQB8yrU1hPz5suhuE9RxyReNkfypz 25rmsn9YGxUztcoWXVXOi/b+HTTGt4JN8hBNRGR8zv5C8qG+dK6DGnBBdm9a4gNUi+BB j30uriD7PMM5Rl15LHKkQBAAn6hBlrfQ+QV1dRyGNU4hRhS+bkSYTUIqWJnVW9Y8RkNF MehCHemId4O/UHljqmtJL6X0MghFG6WkDUKxzKgYRjfMy3N6FpEJYOxsQy+tWTK4W+So Lv/w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id i5si2000013qtc.148.2017.09.20.08.01.44; Wed, 20 Sep 2017 08:01:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 190AB608E4; Wed, 20 Sep 2017 15:01:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, RCVD_IN_SORBS_SPAM, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 3C4F262D20; Wed, 20 Sep 2017 14:57:32 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id EEBA060D45; Wed, 20 Sep 2017 14:57:24 +0000 (UTC) Received: from mail-pg0-f46.google.com (mail-pg0-f46.google.com [74.125.83.46]) by lists.linaro.org (Postfix) with ESMTPS id AF86B62C6C for ; Wed, 20 Sep 2017 14:56:13 +0000 (UTC) Received: by mail-pg0-f46.google.com with SMTP id i195so1804283pgd.9 for ; Wed, 20 Sep 2017 07:56:13 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/knYCi2Mq27F6UE0RpanWsbuz8v583nuHmowA+mC5ZQ=; b=VKhxmoD8PNuqPJEGC14vgS+yz/LBFIZ1BCDcEDJCJZbBY7I8CbLQyCwgmhAMTHnEey RLUVAOJhoPxe6Wsc2Ov5Uqds9sz5m+qrLS6/Qh8XGtYFz0sd8BzwXby9BkXY7CipGRKW KujfiF+BtbSOxGlzPd+fSW3VyXwBoB4FwRCyy+qcqB4Oo+at+Ix+Jz/8GM4yLfNHEoXG utd1YA20aL5mObysyiJLpPE85RF6/xPJ0imFA80hYefE/rr8VWCqUc4h+4yfXrjsr7JB o9k6YbuuXEssdhnFWprU/homU04VmhmrkBDdcNTI5uMNpnqqNf1gdAzKLeSmfSk+hCiZ OWAw== X-Gm-Message-State: AHPjjUgHEWcT3seg04OzXbUdMuLjYVe5/oLIIbRvkfTscUHTMTcxZHwB 4q/8v3CNeq7wEU03OOHC5tlmuh7q X-Google-Smtp-Source: AOwi7QBNKlSmasNLlFHL90ddqeZmmwdl8HlVi+H9EXw3jSTanE23rk7yU4peCatbjGW1ozY/RAsMWg== X-Received: by 10.84.224.66 with SMTP id a2mr2367730plt.207.1505919372923; Wed, 20 Sep 2017 07:56:12 -0700 (PDT) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id c7sm9157624pfc.55.2017.09.20.07.56.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Sep 2017 07:56:12 -0700 (PDT) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, graeme.gregory@linaro.org Date: Wed, 20 Sep 2017 22:48:55 +0800 Message-Id: <1505918938-52550-12-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> References: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> Cc: guoheyi@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v2 08/11] Hisilicon/D05/Pcie: fix bug of size definition X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: huangming Fix bug of PcieRegion size definition and IO size definition. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Platform/Hisilicon/D05/D05.dsc | 64 +++++++++++++++++++++--------------------- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index df37650..04183bb 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -310,37 +310,37 @@ gHisiTokenSpaceGuid.PciHb1Rb7Base|0x700a00b0000 gHisiTokenSpaceGuid.PcdHb0Rb0PciRegionBaseAddress|0xa8400000 - gHisiTokenSpaceGuid.PcdHb0Rb0PciRegionSize|0xbeffff + gHisiTokenSpaceGuid.PcdHb0Rb0PciRegionSize|0xbf0000 gHisiTokenSpaceGuid.PcdHb0Rb1PciRegionBaseAddress|0xa9400000 - gHisiTokenSpaceGuid.PcdHb0Rb1PciRegionSize|0xbeffff + gHisiTokenSpaceGuid.PcdHb0Rb1PciRegionSize|0xbf0000 gHisiTokenSpaceGuid.PcdHb0Rb2PciRegionBaseAddress|0xa8800000 - gHisiTokenSpaceGuid.PcdHb0Rb2PciRegionSize|0x77effff + gHisiTokenSpaceGuid.PcdHb0Rb2PciRegionSize|0x77f0000 gHisiTokenSpaceGuid.PcdHb0Rb3PciRegionBaseAddress|0xab400000 - gHisiTokenSpaceGuid.PcdHb0Rb3PciRegionSize|0xbeffff + gHisiTokenSpaceGuid.PcdHb0Rb3PciRegionSize|0xbf0000 gHisiTokenSpaceGuid.PcdHb0Rb4PciRegionBaseAddress|0xa9000000 - gHisiTokenSpaceGuid.PcdHb0Rb4PciRegionSize|0x2feffff + gHisiTokenSpaceGuid.PcdHb0Rb4PciRegionSize|0x2ff0000 gHisiTokenSpaceGuid.PcdHb0Rb5PciRegionBaseAddress|0xb0800000 - gHisiTokenSpaceGuid.PcdHb0Rb5PciRegionSize|0x77effff + gHisiTokenSpaceGuid.PcdHb0Rb5PciRegionSize|0x77f0000 gHisiTokenSpaceGuid.PcdHb0Rb6PciRegionBaseAddress|0xac900000 - gHisiTokenSpaceGuid.PcdHb0Rb6PciRegionSize|0x36effff + gHisiTokenSpaceGuid.PcdHb0Rb6PciRegionSize|0x36f0000 gHisiTokenSpaceGuid.PcdHb0Rb7PciRegionBaseAddress|0xb9800000 - gHisiTokenSpaceGuid.PcdHb0Rb7PciRegionSize|0x67effff + gHisiTokenSpaceGuid.PcdHb0Rb7PciRegionSize|0x67f0000 gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionBaseAddress|0x400a8400000 - gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionSize|0xbeffff + gHisiTokenSpaceGuid.PcdHb1Rb0PciRegionSize|0xbf0000 gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionBaseAddress|0x400a9400000 - gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionSize|0xbeffff + gHisiTokenSpaceGuid.PcdHb1Rb1PciRegionSize|0xbf0000 gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionBaseAddress|0x40000000 - gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xafffffff + gHisiTokenSpaceGuid.PcdHb1Rb2PciRegionSize|0xb0000000 gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionBaseAddress|0x400ab400000 - gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionSize|0xbeffff + gHisiTokenSpaceGuid.PcdHb1Rb3PciRegionSize|0xbf0000 gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionBaseAddress|0x40000000 - gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xafffffff + gHisiTokenSpaceGuid.PcdHb1Rb4PciRegionSize|0xb0000000 gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionBaseAddress|0x40000000 - gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionSize|0xafffffff + gHisiTokenSpaceGuid.PcdHb1Rb5PciRegionSize|0xb0000000 gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionBaseAddress|0x408aa400000 - gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionSize|0xbeffff + gHisiTokenSpaceGuid.PcdHb1Rb6PciRegionSize|0xbf0000 gHisiTokenSpaceGuid.PcdHb1Rb7PciRegionBaseAddress|0x408ab400000 - gHisiTokenSpaceGuid.PcdHb1Rb7PciRegionSize|0xbeffff + gHisiTokenSpaceGuid.PcdHb1Rb7PciRegionSize|0xbf0000 gHisiTokenSpaceGuid.PcdHb0Rb0CpuMemRegionBase|0xA8400000 gHisiTokenSpaceGuid.PcdHb0Rb1CpuMemRegionBase|0xA9400000 @@ -377,52 +377,52 @@ gHisiTokenSpaceGuid.PcdHb1Rb7CpuIoRegionBase|0x408abff0000 gHisiTokenSpaceGuid.PcdHb0Rb0IoBase|0 - gHisiTokenSpaceGuid.PcdHb0Rb0IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb0Rb0IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb0Rb1IoBase|0 - gHisiTokenSpaceGuid.PcdHb0Rb1IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb0Rb1IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb0Rb2IoBase|0 - gHisiTokenSpaceGuid.PcdHb0Rb2IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb0Rb2IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb0Rb3IoBase|0 - gHisiTokenSpaceGuid.PcdHb0Rb3IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb0Rb3IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb0Rb4IoBase|0 - gHisiTokenSpaceGuid.PcdHb0Rb4IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb0Rb4IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb0Rb5IoBase|0 - gHisiTokenSpaceGuid.PcdHb0Rb5IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb0Rb5IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb0Rb6IoBase|0 - gHisiTokenSpaceGuid.PcdHb0Rb6IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb0Rb6IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb0Rb7IoBase|0 - gHisiTokenSpaceGuid.PcdHb0Rb7IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb0Rb7IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb1Rb0IoBase|0 - gHisiTokenSpaceGuid.PcdHb1Rb0IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb1Rb0IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb1Rb1IoBase|0 - gHisiTokenSpaceGuid.PcdHb1Rb1IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb1Rb1IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb1Rb2IoBase|0 - gHisiTokenSpaceGuid.PcdHb1Rb2IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb1Rb2IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb1Rb3IoBase|0 - gHisiTokenSpaceGuid.PcdHb1Rb3IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb1Rb3IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb1Rb4IoBase|0 - gHisiTokenSpaceGuid.PcdHb1Rb4IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb1Rb4IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb1Rb5IoBase|0 - gHisiTokenSpaceGuid.PcdHb1Rb5IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb1Rb5IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb1Rb6IoBase|0 - gHisiTokenSpaceGuid.PcdHb1Rb6IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb1Rb6IoSize|0x10000 #64K gHisiTokenSpaceGuid.PcdHb1Rb7IoBase|0 - gHisiTokenSpaceGuid.PcdHb1Rb7IoSize|0xffff #64K + gHisiTokenSpaceGuid.PcdHb1Rb7IoSize|0x10000 #64K gHisiTokenSpaceGuid.Pcdsoctype|0x1610 From patchwork Wed Sep 20 14:48:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 113145 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp871737qgf; Wed, 20 Sep 2017 08:02:08 -0700 (PDT) X-Received: by 10.237.62.200 with SMTP id o8mr7927324qtf.294.1505919727924; Wed, 20 Sep 2017 08:02:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505919727; cv=none; d=google.com; s=arc-20160816; b=CMY5P1B9SKz41Rzg0GyQJ0eURu18qhnd7reWXmX37CZzSxe/TGXKyIACSTziVN7Ld0 gLI81zLMO9VS2VQdEi9jUkofWmJXobPOL6lFmLQHhMX3/GwQ+x0ybD0fS37rXLJ64vwq AwHSLLI177kP8/+gOUuBDaCnsTZJ478hgd+3kZRFi7WqN3NUwvmmOsSzW3q6Mey1kdth XBlMYcpRKQ6jfdPg02IOBFBY1JhFy4lMpkGXmGkEZUf5FdJBrT39qHsdw4PFgOXLy0PN dhsCRYKkiBS78isSYWH/n36YePEVQgdE0+a/uazrhWo38IgPmb6KJvDINC7DiUyAABtE vLIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=J8FRwZB6+n/joyPCpJckgggmbLu2PEQjoxNj+3LNjDM=; b=fMGXQZzXVUA88osXxjBLeJVRcwOctEvnx92p8rzTfH5lBJcp/nNHPyRMgQvZGrzoS8 erJWVjch0NCcfRhofzdZVEWngOL2rpQUwdvaahxW0Odd3N6fi8WVHfLTIsV+/hdT9A0L A4UPkumEB4+lXT9DenK9TeHUm4ocgx0QGNF+tkO5s5NWYubcH1bLqpeg5Rd9Xb6QJFIg zutmLPu+ItW/ySGgS7TeMO+n+SLUFizFn4tzC+GATOB7SG3Jab16c1eVqosKHm9tSHWC EKiFtwTSSQUg5HwQSIahr1C8aKRJqKXwDlwaOtEw92En4doS/7IjcxuY69mNJJWRsgwR KbYg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. 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Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: Ming Huang Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl index 93beb95..6455130 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl @@ -88,6 +88,11 @@ Scope(_SB) Store(0x7ffff, CLK) Sleep(1) } + + Method (_STA, 0, NotSerialized) + { + Return (0x0) + } } Device(SAS1) { @@ -239,6 +244,11 @@ Scope(_SB) Store(0x7ffff, CLK) Sleep(1) } + + Method (_STA, 0, NotSerialized) + { + Return (0x0) + } } } From patchwork Wed Sep 20 14:48:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 113146 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp872499qgf; Wed, 20 Sep 2017 08:02:39 -0700 (PDT) X-Received: by 10.55.152.198 with SMTP id a189mr7251435qke.190.1505919759253; Wed, 20 Sep 2017 08:02:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505919759; cv=none; d=google.com; s=arc-20160816; b=M/Z+G9dVZKI03yVvK1+CnBJ942/zYlFMRMvfn5EIysT0n0Jnt2XP9iDmELYYpWOJ1u o5l5zZMb5JFAHwz1k/7G0XkY1+FzRx9e5MS73MskgGpWwWZ0OG8BjuKp0RQNmbyHqsrk gh1EXooxWuzXFL4sdmz2w7WCgiDJzz2k2ETbRnngUwiqPLYwxbFJ2c7GqEFOBb4t5Pp6 AiVLNAoBGyGaf3w4EKZ0A1astjdT3vlrBnQ6BY1KFivsYiIOEbKRAHZPgxPj5JGpWpyj iG+lgVSrqQWzIdTleQ9X0UAP8t7o8pP/dunb3Vl0Kj8+CFiYDRfClsMGtShn+MsWk1cN 5Cng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=Qxkfs+5LFRjcGjaXDEzAmSY9w15z7fcjNsVB/4sN6mw=; b=gNW67bOqeSeOVBDoSh9YZ+6c6/xruTvFcQHAB2tsR9CHfRj9ajNwaklEKSEwKK6jWJ +hOx4oybT6S008lvZR8N4atoiMddkBrLg6yHsLRKpTFdkrRIV2YsLO8vR7ZrV2cnZn0W fWtaMj7UtfTsn4bYxIqXttGBVBHGj3qJs/nymzHYoDatntD6iyH9GN2ydguZOjrpFldg Clwp22wcRFJUg0f3WKvdN9oyVLFlnKkOYofBzpZDP+pDsImgjOZNxHxTzkhqKxXJBeId jjfefONHbiZF+LZ+zjjHZZoWOjF/gXYM0+oUBEm9heB++8x3HNUytFQlHAoiOxR/a4pF XIjA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. 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Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: Ming Huang 1. Disable I2C0 device avoiding access conflict in OS; 2. Modify name of _HID for matching the string in OS driver; Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang --- .../Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl | 20 +------------------- 1 file changed, 1 insertion(+), 19 deletions(-) diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl index eb906ef..3cc60d1 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl @@ -18,26 +18,8 @@ Scope(_SB) { - Device(I2C0) { - Name(_HID, "APMC0D0F") - Name(_CID, "APMC0D0F") - Name(_CRS, ResourceTemplate() { - Memory32Fixed(ReadWrite, 0xd00e0000, 0x10000) - Interrupt(ResourceConsumer, Level, ActiveHigh, Exclusive, 0, "\\_SB.MBI6") { 705 } - }) - Name (_DSD, Package () { - ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), - Package () { - Package () {"clock-frequency", 100000}, - Package () {"i2c-sda-falling-time-ns", 913}, - Package () {"i2c-scl-falling-time-ns", 303}, - Package () {"i2c-sda-hold-time-ns", 0x9c2}, - } - }) - } - Device(I2C2) { - Name(_HID, "APMC0D0F") + Name(_HID, "HISI02A1") Name(_CID, "APMC0D0F") Name(_CRS, ResourceTemplate() { Memory32Fixed(ReadWrite, 0xd0100000, 0x10000) From patchwork Wed Sep 20 14:48:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 113148 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp874280qgf; Wed, 20 Sep 2017 08:03:50 -0700 (PDT) X-Received: by 10.200.49.202 with SMTP id i10mr7758634qte.63.1505919829992; Wed, 20 Sep 2017 08:03:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1505919829; cv=none; d=google.com; s=arc-20160816; b=tR5qFeHh71oc1GqLSzJ6IBnFXGucS16za7yaGPcgE1o1QmRa/ntlCc87tdCOPWXSCj 0C4M8/tlpfj8uzEJ2FIX8pqGAP14qNOfjQH64hoezrY0SH+Vj6kt7iI/nUf8oXhkrcTM YLUzVsWvm+VIEc+nQUJJQW4Zr1x1l/BGoId9Ow705BxG2Q+Y96LPAfvrvt/1cKvAwAUu 5N+8WOiFHrS2fiH/vTUGNvYPKolwJLRZmVF+ouTCNJoT/XdKS66Me3kgdanMr6BDgzqg GykDq+OfE2U+D2bBiyfuTG5MMxVJhTMl7UH17WT2bmxiGx2ZVrzbEEcYXBHe8lO858Nz V70w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=DREoqNe+6Lk2VDHIkEyyreQ6GgXgtV0aV9tjJ3+5MkE=; b=zdJMMA7EwChf/wGJE5+ri2+Be0kgWhvVz6S6us6Z6mDKF+ejwk4c/Rf2fN0JRC3Arn IPDdQETLdp0T6j/EQGI9PgJe+7nLUj4Uh0nRsmMOZZZrUYshdEVrfAAZ6pheyUK/bQwN bHAGj9p++lkMKXJCDn92EOBrqqHeZZ6wBdoMpFIgPy7bAjCiNaTjU24clrB5HX/KnYKP 99va31ePKiPYMxeDHi9sC4hejf6sRyueOZtcSNaePLWoCDT3SjcAREnwJ9620Lz/0X2S NAbA+WOFH/6w0FPQxcnVPhREjJEQvvZKWCbLucz9JNbaxOQZ43A3LbIDFqY1WK5uaPhS tD6g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id k57si2056534qtf.10.2017.09.20.08.03.49; Wed, 20 Sep 2017 08:03:49 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 2639860C95; Wed, 20 Sep 2017 15:03:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 80A5960999; Wed, 20 Sep 2017 14:58:38 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 49D9A64456; Wed, 20 Sep 2017 14:58:35 +0000 (UTC) Received: from mail-pg0-f42.google.com (mail-pg0-f42.google.com [74.125.83.42]) by lists.linaro.org (Postfix) with ESMTPS id 0CFA760999 for ; Wed, 20 Sep 2017 14:56:21 +0000 (UTC) Received: by mail-pg0-f42.google.com with SMTP id j70so1803789pgc.10 for ; Wed, 20 Sep 2017 07:56:20 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AcQnNWdD0ooO/mBYeRNJBIHQmsFkBh8KN7ip30l1+iA=; b=pSOnku+VAn6zSy4lKU3fySS9dVgxImBUcMMmIe7RNcIvCNxJ9g+SJmEaZRvMEqWjKR Qe/JI52/e3e2eTmM5SrdD4jcZFEhQIN94QWf/UFiEZ/CWVFjYmsV4MxE5HmL47M6YHD5 6Cmw2gufRzNa20iOaH9+IW3IlO3BSHzwR8Bc5ucRzdqqq21JR3m0zI6AdAwngdZVcrUs lCfocaLS/W2e8JUa+xO4xI5Q+RhsyjBHjVZLjs5AkcwuT057XY9x3wYX1puv4QJT/7Mf HJvsChgQgFjn5VyHn3f5A+q8c5ML3iSNDnDjdmp1hqUPjo4sqOvqmPXhBpp5O89clbf0 TCrw== X-Gm-Message-State: AHPjjUgNfM9Z0VVBzdZoKC7XG/qiUC7g9npc2lEcC4rQKgl81sNkDak1 R4GTLec480ZrEELi7BnMPzERpYf4 X-Google-Smtp-Source: AOwi7QChXAgPqlAQH6GF9R+RCZPCtjuhtytyH5xRDRkEZqLhfrUgMn7flaxyVE7D0C8u4PmJz2ghzQ== X-Received: by 10.99.98.70 with SMTP id w67mr2497774pgb.362.1505919380308; Wed, 20 Sep 2017 07:56:20 -0700 (PDT) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id c7sm9157624pfc.55.2017.09.20.07.56.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 20 Sep 2017 07:56:19 -0700 (PDT) From: Heyi Guo To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, graeme.gregory@linaro.org Date: Wed, 20 Sep 2017 22:48:58 +0800 Message-Id: <1505918938-52550-15-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> References: <1505918938-52550-1-git-send-email-heyi.guo@linaro.org> Cc: Ming Huang , zhangjinsong2@huawei.com, huangming23@huawei.com, guoheyi@huawei.com, wanghuiqiang@huawei.com Subject: [Linaro-uefi] [linaro-uefi v2 11/11] Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device. X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" From: Ming Huang 1. Because Hi161x chip doesn't support "ARI Forwarding Enable" function, BIOS will enumerate 32 same devices (Device Number 0~31) when attach a Non-ARI capable device in the RP. Hi161x chip will not fix it, need BIOS patch. 2. Just enlarge iatu for those root port with ARI capable device attached, Non-ARI capable device's RP, keep iatu limitation. 3. Remove previous temporary solution as below commit id: "7d157da88852cc91df2b11b10ade2edbbfbe77da" Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jason zhang --- .../Drivers/PciHostBridgeDxe/PciHostBridge.c | 1 + .../Drivers/PciHostBridgeDxe/PciHostBridge.h | 4 ++ .../Drivers/PciHostBridgeDxe/PciRootBridgeIo.c | 76 ++++++++++++++++++++++ 3 files changed, 81 insertions(+) diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c index 6ecc1e5..5bc04a2 100644 --- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c +++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c @@ -839,6 +839,7 @@ NotifyPhase( case EfiPciHostBridgeEndEnumeration: PCIE_DEBUG("Case EfiPciHostBridgeEndEnumeration\n"); + EnlargeAtuConfig0 (This); break; case EfiPciHostBridgeBeginBusAllocation: diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h index cddda6b..925ed40 100644 --- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h +++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h @@ -518,4 +518,8 @@ RootBridgeConstructor ( IN UINT32 Seg ); +VOID +EnlargeAtuConfig0 ( + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This + ); #endif diff --git a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c index 8dfb4b9..b41dbe2 100644 --- a/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c +++ b/Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c @@ -14,6 +14,7 @@ **/ #include "PciHostBridge.h" +#include #include #include #include @@ -2322,3 +2323,78 @@ RootBridgeIoConfiguration ( return EFI_SUCCESS; } +BOOLEAN +PcieCheckAriFwdEn ( + UINTN PciBaseAddr + ) +{ + UINT8 PciPrimaryStatus; + UINT8 CapabilityOffset; + UINT8 CapId; + UINT8 TempData; + + PciPrimaryStatus = MmioRead16 (PciBaseAddr + PCI_PRIMARY_STATUS_OFFSET); + + if (PciPrimaryStatus & EFI_PCI_STATUS_CAPABILITY) { + CapabilityOffset = MmioRead8 (PciBaseAddr + PCI_CAPBILITY_POINTER_OFFSET); + CapabilityOffset &= ~(BIT0 | BIT1); + + while ((CapabilityOffset != 0) && (CapabilityOffset != 0xff)) { + CapId = MmioRead8 (PciBaseAddr + CapabilityOffset); + if (CapId == EFI_PCI_CAPABILITY_ID_PCIEXP) { + break; + } + CapabilityOffset = MmioRead8 (PciBaseAddr + CapabilityOffset + 1); + CapabilityOffset &= ~(BIT0 | BIT1); + } + } else { + PCIE_DEBUG ("[%a:%d] - No PCIE Capability.\n", __FUNCTION__, __LINE__); + return FALSE; + } + + if ((CapabilityOffset == 0xff) || (CapabilityOffset == 0x0)) { + PCIE_DEBUG ("[%a:%d] - No PCIE Capability.\n", __FUNCTION__, __LINE__); + return FALSE; + } + + TempData = MmioRead16 (PciBaseAddr + CapabilityOffset + EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET); + TempData &= EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING; + + if (TempData == EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING) { + return TRUE; + } else { + return FALSE; + } +} + +VOID +EnlargeAtuConfig0 ( + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This + ) +{ + UINTN RbPciBase; + UINT64 MemLimit; + LIST_ENTRY *List; + PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance; + PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance; + + PCIE_DEBUG ("In Enlarge RP iatu Config 0.\n"); + + HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This); + List = HostBridgeInstance->Head.ForwardLink; + + while (List != &HostBridgeInstance->Head) { + PCIE_DEBUG ("HostBridge has data.\n"); + RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List); + + RbPciBase = RootBridgeInstance->RbPciBar; + + // Those ARI FWD Enable Root Bridge, need enlarge iatu window. + if (PcieCheckAriFwdEn (RbPciBase)) { + MemLimit = GetPcieCfgAddress (RootBridgeInstance->Ecam, RootBridgeInstance->BusBase + 2, 0, 0, 0) - 1; + MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_VIEW_POINT, 1); + MmioWrite32 (RbPciBase + IATU_OFFSET + IATU_REGION_BASE_LIMIT, (UINT32) MemLimit); + } + List = List->ForwardLink; + } +}