From patchwork Fri Jul 3 07:44:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 226280 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp2153883ilg; Fri, 3 Jul 2020 00:44:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJym50NEjbj+B/HKsBbsOWMWZ2akkVfPMpA3sYN/AwYRreTOTlYoWy1SY2lqQ8J4mZ/hbI7W X-Received: by 2002:aa7:c90a:: with SMTP id b10mr9860095edt.71.1593762246095; Fri, 03 Jul 2020 00:44:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593762246; cv=none; d=google.com; s=arc-20160816; b=SDkwMSTN+7MY6qXiX/SySKiZDvGQYl3cZjTnVFHHuARLznZ9dziYc3hLvlYqfurp+d NEtjC7mtB70qFTr6TjEWbDRld+S0ki3GshxcxvAGYFvALpD045hXFzkxFpLS3CIgumco LvNPv9kUZ1SeHV8S32iw9eFkmYLcbeKYoD3z3Aqo8rRVjvE0plAiUBWk/kUwakq50WY2 aj6RQoDXPd1vL/XvONrHnuwJlxr+f2ez/XdxmMksR4NaOdPk+W14hl45+YdB2w7/AWZG YcniPjRoJi3hfyvdpNYoM5xKQXx5dhdkI+JBSxo8dweKxmpPcxPMJFAam3JLN7kbAdRC tiUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=WDMC1z6jzpUNYiGQWlUKYjUaAdNa/terAf9fLOG3fwk=; b=TF4CD61z9tDr20L5191wOecmLN+X61DWTJp/T1KmP/6UZJaMCx8iYHpSkLMnoAEtN3 lHdip8CJ5FD7iOxUijuE61A+mbE1wM7HXYWG9a8tb1586iHYL5guLrH5yBwIZ4fjdEMd xGmhlN/ahP6zJSTpoW/ZHTG7M5yWKo3VOHwsMxnalHYn30CspiO3AQTN0jKg+AlmYObU SnCx8OPS07OmK3NN4HSD9TukfuafPDNmf9LgFhnSouCVz8DWdVXswQFcjWtHG4ju5Tjg F+Lcdwb7T6+vzy2gq3P1Y3nB003swCRfz0t2AD5Uc8bTlyU3DZ16lm6tZ9ndhMczspnE RFOg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=rHQYeGqH; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q24si7138212edw.193.2020.07.03.00.44.05; Fri, 03 Jul 2020 00:44:06 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=rHQYeGqH; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726437AbgGCHnx (ORCPT + 6 others); Fri, 3 Jul 2020 03:43:53 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:55380 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726228AbgGCHnu (ORCPT ); Fri, 3 Jul 2020 03:43:50 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0637hmPB045483; Fri, 3 Jul 2020 02:43:48 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1593762228; bh=WDMC1z6jzpUNYiGQWlUKYjUaAdNa/terAf9fLOG3fwk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=rHQYeGqHX02tg3eBCScRycBMpMOpSTnCZSdY5t8xWGK1tyDbNd386O/qyM7vyhQt3 L2P/KSDUoAtUnvcYdSlgKp6uTVTUejTQTfS0lLJ2dpyBgyaEpREtBy9dFLyRwzi2zl 8C/1awVodUikxPcgg6aBa75kUVkeVvm42YD7Fs0o= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0637hmGc092268; Fri, 3 Jul 2020 02:43:48 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 3 Jul 2020 02:43:47 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 3 Jul 2020 02:43:47 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0637hhdp098446; Fri, 3 Jul 2020 02:43:45 -0500 From: Peter Ujfalusi To: , CC: , , , , Subject: [PATCH v2 1/2] arm64: dts: ti: k3-j721e-common-proc-board: Remove duplicated main_i2c1_exp4_pins_default Date: Fri, 3 Jul 2020 10:44:42 +0300 Message-ID: <20200703074443.27142-2-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200703074443.27142-1-peter.ujfalusi@ti.com> References: <20200703074443.27142-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Two pimux entry is present with the same name, remove one of them. Fixes: cb27354b38f3 ("arm64: dts: ti: k3-j721e: Add DT nodes for few peripherials") Signed-off-by: Peter Ujfalusi --- arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 6 ------ 1 file changed, 6 deletions(-) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 6df823aaa37c..1f1fee85acca 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -102,12 +102,6 @@ J721E_IOPAD(0x1d0, PIN_INPUT_PULLUP, 2) /* (AA3) SPI0_D1.I2C6_SCL */ J721E_IOPAD(0x1e4, PIN_INPUT_PULLUP, 2) /* (Y2) SPI1_D1.I2C6_SDA */ >; }; - - main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default { - pinctrl-single,pins = < - J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */ - >; - }; }; &wkup_pmx0 { From patchwork Fri Jul 3 07:44:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 226282 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp2153892ilg; Fri, 3 Jul 2020 00:44:06 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyhUdJHD6ceDM7N+BhsHFgngnVl5qkC3C+nCF2UeV3RmzP0kTYdTfHKttyc93ot1hcN8Jnj X-Received: by 2002:a05:6402:3048:: with SMTP id bu8mr40366330edb.367.1593762246711; Fri, 03 Jul 2020 00:44:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1593762246; cv=none; d=google.com; s=arc-20160816; b=xXczlM3Cue44aTWbOsHOPEYXcGAum0iA7rhp/pgpilkhTyKN2mdBOjsxXpAFfWZvan O0gwWP1dRyDcAl3KPq8UHs7D3qaN6iPNk4n3CC0ZgvAASV1qScO4LXcuFmGpyn/4xKWc io7kXyVSvwJRaiOMHZnFFS3mPLJiR6UC2NXYTsddsOsCrLEWxQ52xtLCf8xj8tdOjvoX p6e/mSGjHbCNb+gOXZDtXmocRV9SZhwBNVd8iLoJq5uXQLz4/GtFu2Vw1o4z7/pSasGu 6+ckx1MBoMp5hRWaSzIpvY0cCiueSMOMFBzqWOZAc5aBbGbxfTMdCDesf+B87q0n5vPC LuSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=GKhaCbHVbI4+Y/2kOzzOfVPb8HPfGmDB0coQ3pUUwiY=; b=ezwZQbpzoMhF5/PIGHPMxs/Cwtsbbagh1L78fIna/7J2G1nyHuTswiejPyahuwWQPw 9f8XgOMgn/ZAkvm/z7ekkP9Q7dz5wgVX4BPbnAGVbpay2DK652j6fKEF5mfqPaJNWkBI 3u8Q99yEqQKPwx8O0+ww8oJPFGoGXIUOniK6N+9riSgy9oMCvHy7s+7TsCVPnvjm/Y31 DjDIJb2twcjIq8fIbfoi2hv+eW5Tl0WBwMypvYzA+iE46QJn55L1kk3UjUcpqAMNJzsr +Z+WVN8TIaNzkactG2qO3w3XS2itqgwLXeVu8Lv+JNW4116INuKudJz2VVzrTa7w0E/z 4fhQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=jf3OVh8n; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q24si7138212edw.193.2020.07.03.00.44.06; Fri, 03 Jul 2020 00:44:06 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=jf3OVh8n; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726033AbgGCHoF (ORCPT + 6 others); Fri, 3 Jul 2020 03:44:05 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:52912 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726082AbgGCHnx (ORCPT ); Fri, 3 Jul 2020 03:43:53 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0637ho2Q013451; Fri, 3 Jul 2020 02:43:50 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1593762230; bh=GKhaCbHVbI4+Y/2kOzzOfVPb8HPfGmDB0coQ3pUUwiY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jf3OVh8n4iJ4KBkJJs3zT8ewo8OMsVhZDpGC1YBHG2XfVR+maFUDKOCWIhcatH0Zt Xo81/efiKBQ36hRgK4cckjD3pawhPoCOdyK9ZyRVIDZUg0qYJowzdzmhtUI5xwMZJ7 FKTbcr855RaYA2k2rOg69LK/yH66SKrMD4bC2bgI= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0637hoEs101933 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 3 Jul 2020 02:43:50 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 3 Jul 2020 02:43:49 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 3 Jul 2020 02:43:49 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0637hhdq098446; Fri, 3 Jul 2020 02:43:47 -0500 From: Peter Ujfalusi To: , CC: , , , , Subject: [PATCH v2 2/2] arm64: dts: ti: j721e-common-proc-board: Analog audio support Date: Fri, 3 Jul 2020 10:44:43 +0300 Message-ID: <20200703074443.27142-3-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200703074443.27142-1-peter.ujfalusi@ti.com> References: <20200703074443.27142-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The codec is wired in multi DIN/DOUT setup (DIN1/2/3/4/DOUT1/2/3 is connected to McASP serializer). To support wide range of audio features a generic sound card can not be used since we need to use different reference clock source for 44.1 and 48 KHz family of sampling rates. Depending on the sample size we also need to use different slot width to be able to support 16 and 24 bits. There are couple of notable difference compared to DIN1/DOUT1 mode: the channel mapping is 'random' for first look compared to the single serializer setup: _ _ _ |o|c1 |o|p1 |o|p3 _ | | | | | | |o|c3 |o|c2 |o|p4 |o|p2 ------------------------ c1/2/3 - capture jacks (3rd is line) p1/2/3/4 - playback jacks (4th is line) 2 channel audio (stereo): 0 (left): p1/c1 left 1 (right): p1/c1 right 4 channel audio: 0: p1/c1 left 1: p2/c2 left 2: p1/c1 right 3: p2/c2 right 6 channel audio 0: p1/c1 left 1: p2/c2 left 2: p3/c3 left 3: p1/c1 right 4: p2/c2 right 5: p3/c3 right 8 channel audio 0: p1/c1 left 1: p2/c2 left 2: p3/c3 left 3: p4 left 4: p1/c1 right 5: p2/c2 right 6: p3/c3 right 7: p4 right Signed-off-by: Peter Ujfalusi --- .../dts/ti/k3-j721e-common-proc-board.dts | 136 ++++++++++++++++++ 1 file changed, 136 insertions(+) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts index 1f1fee85acca..165907fe1b0f 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts @@ -34,6 +34,55 @@ sw11: sw11 { gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>; }; }; + + evm_12v0: fixedregulator-evm12v0 { + /* main supply */ + compatible = "regulator-fixed"; + regulator-name = "evm_12v0"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-always-on; + regulator-boot-on; + }; + + vsys_3v3: fixedregulator-vsys3v3 { + /* Output of LMS140 */ + compatible = "regulator-fixed"; + regulator-name = "vsys_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&evm_12v0>; + regulator-always-on; + regulator-boot-on; + }; + + vsys_5v0: fixedregulator-vsys5v0 { + /* Output of LM5140 */ + compatible = "regulator-fixed"; + regulator-name = "vsys_5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&evm_12v0>; + regulator-always-on; + regulator-boot-on; + }; + + sound0: sound@0 { + compatible = "ti,j721e-cpb-audio"; + model = "j721e-cpb"; + + ti,cpb-mcasp = <&mcasp10>; + ti,cpb-codec = <&pcm3168a_1>; + + clocks = <&k3_clks 184 1>, + <&k3_clks 184 2>, <&k3_clks 184 4>, + <&k3_clks 157 371>, + <&k3_clks 157 400>, <&k3_clks 157 401>; + clock-names = "cpb-mcasp-auxclk", + "cpb-mcasp-auxclk-48000", "cpb-mcasp-auxclk-44100", + "cpb-codec-scki", + "cpb-codec-scki-48000", "cpb-codec-scki-44100"; + }; }; &main_pmx0 { @@ -102,6 +151,26 @@ J721E_IOPAD(0x1d0, PIN_INPUT_PULLUP, 2) /* (AA3) SPI0_D1.I2C6_SCL */ J721E_IOPAD(0x1e4, PIN_INPUT_PULLUP, 2) /* (Y2) SPI1_D1.I2C6_SDA */ >; }; + + mcasp10_pins_default: mcasp10_pins_default { + pinctrl-single,pins = < + J721E_IOPAD(0x158, PIN_OUTPUT_PULLDOWN, 12) /* (U23) RGMII5_TX_CTL.MCASP10_ACLKX */ + J721E_IOPAD(0x15c, PIN_OUTPUT_PULLDOWN, 12) /* (U26) RGMII5_RX_CTL.MCASP10_AFSX */ + J721E_IOPAD(0x160, PIN_OUTPUT_PULLDOWN, 12) /* (V28) RGMII5_TD3.MCASP10_AXR0 */ + J721E_IOPAD(0x164, PIN_OUTPUT_PULLDOWN, 12) /* (V29) RGMII5_TD2.MCASP10_AXR1 */ + J721E_IOPAD(0x170, PIN_OUTPUT_PULLDOWN, 12) /* (U29) RGMII5_TXC.MCASP10_AXR2 */ + J721E_IOPAD(0x174, PIN_OUTPUT_PULLDOWN, 12) /* (U25) RGMII5_RXC.MCASP10_AXR3 */ + J721E_IOPAD(0x198, PIN_INPUT_PULLDOWN, 12) /* (V25) RGMII6_TD1.MCASP10_AXR4 */ + J721E_IOPAD(0x19c, PIN_INPUT_PULLDOWN, 12) /* (W27) RGMII6_TD0.MCASP10_AXR5 */ + J721E_IOPAD(0x1a0, PIN_INPUT_PULLDOWN, 12) /* (W29) RGMII6_TXC.MCASP10_AXR6 */ + >; + }; + + audi_ext_refclk2_pins_default: audi_ext_refclk2_pins_default { + pinctrl-single,pins = < + J721E_IOPAD(0x1a4, PIN_OUTPUT, 3) /* (W26) RGMII6_RXC.AUDIO_EXT_REFCLK2 */ + >; + }; }; &wkup_pmx0 { @@ -401,6 +470,22 @@ exp2: gpio@22 { reg = <0x22>; gpio-controller; #gpio-cells = <2>; + + p09 { + /* P11 - MCASP/TRACE_MUX_S0 */ + gpio-hog; + gpios = <9 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "MCASP/TRACE_MUX_S0"; + }; + + p10 { + /* P12 - MCASP/TRACE_MUX_S1 */ + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "MCASP/TRACE_MUX_S1"; + }; }; }; @@ -423,6 +508,12 @@ exp4: gpio@20 { }; }; +&k3_clks { + /* Confiure AUDIO_EXT_REFCLK2 pin as output */ + pinctrl-names = "default"; + pinctrl-0 = <&audi_ext_refclk2_pins_default>; +}; + &main_i2c3 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c3_pins_default>; @@ -434,6 +525,31 @@ exp3: gpio@20 { gpio-controller; #gpio-cells = <2>; }; + + pcm3168a_1: audio-codec@44 { + compatible = "ti,pcm3168a"; + reg = <0x44>; + + #sound-dai-cells = <1>; + + reset-gpios = <&exp3 0 GPIO_ACTIVE_LOW>; + + /* C_AUDIO_REFCLK2 -> RGMII6_RXC (W26) */ + clocks = <&k3_clks 157 371>; + clock-names = "scki"; + + /* HSDIV3_16FFT_MAIN_4_HSDIVOUT2_CLK -> REFCLK2 */ + assigned-clocks = <&k3_clks 157 371>; + assigned-clock-parents = <&k3_clks 157 400>; + assigned-clock-rates = <24576000>; /* for 48KHz */ + + VDD1-supply = <&vsys_3v3>; + VDD2-supply = <&vsys_3v3>; + VCCAD1-supply = <&vsys_5v0>; + VCCAD2-supply = <&vsys_5v0>; + VCCDA1-supply = <&vsys_5v0>; + VCCDA2-supply = <&vsys_5v0>; + }; }; &main_i2c6 { @@ -486,3 +602,23 @@ &dss { <&k3_clks 152 11>, /* PLL18_HSDIV0 */ <&k3_clks 152 18>; /* PLL23_HSDIV0 */ }; + +&mcasp10 { + #sound-dai-cells = <0>; + + pinctrl-names = "default"; + pinctrl-0 = <&mcasp10_pins_default>; + + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <2>; + auxclk-fs-ratio = <256>; + + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 1 1 1 1 + 2 2 2 0 + >; + tx-num-evt = <0>; + rx-num-evt = <0>; + + status = "okay"; +};