From patchwork Thu Jul 9 23:19:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235194 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1638099ecp; Thu, 9 Jul 2020 16:20:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxx7PuG+Kb5UO1j/i5UtYyUys4PXQNJ330YI97Eu3+SbjSm2MuuJa+KQX2+AL9pBLh4CYrb X-Received: by 2002:a05:6402:1a3c:: with SMTP id be28mr65578123edb.140.1594336816744; Thu, 09 Jul 2020 16:20:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336816; cv=none; d=google.com; s=arc-20160816; b=oSk/zz4F6pHwAy5FsgkXv2YNNTpRptOowvnuLE+QkMS/nKftTDnKWE1UrZL/CunfvQ 4q0wJZF/QD3Nkf/lUUffC7hM7gDENBjlB00flJJgM1EdU1yhX5dX/zxqYEy8UbM4qfSg PTRb52s6QmBYaJAywJpojsZb6SNm7Bw1SOVpzZjQkt33dDjMNv9pIcfO+BEtg4zVnlYa BX2NZjIj+pA7f59lpbC7e/G0CJnzy/GkqXOauo6kUOiZ+LX9MnxFhWOUhD9F3K1Egh4O aBNm8aY2/AGdrLATf/vzlEPTOkvX+Ymnt3qAqFZpRPiGdLjWZ17TPgkJ10E3L5M30IRC gGtQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=c0U/6UXwkjm96QgVwEXr+Y99qTURmUnIxiiCuECGvik=; b=YROjXchsb79Hm0TmBqrj/c8tN5B+cICPFWR+5KtX67KM2VdUZvxmCgeHMHgJMk7/Tu poHYNRJI9SACd7nsC1M5GL3wZ6v9bYrQOMM1aNBapwz9FM5l5C+r34ig6EVdGfc/fHV9 NQvMt0RR8Xc8UdQ4B1flC1e72eEA35l/egiNGCzRKoyhKEFs17Zqo76igJorPNQB7cb6 PcUxeERFIpaTt2sKRRiFTVYxJLbZNIPr3aVe1zCbXnyxhUOHpEftqgOh1/hveBePV0Yf PV5tbtvF5EIy3DpW2tehmBa4Hqlr3gpL1tD/JqF5sVTkunprppsUrmqQj/4TaFZkujIC e6tw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="qsqkk/y7"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n23si2740812ejx.656.2020.07.09.16.20.16; Thu, 09 Jul 2020 16:20:16 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="qsqkk/y7"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726840AbgGIXUO (ORCPT + 6 others); Thu, 9 Jul 2020 19:20:14 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:47042 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726828AbgGIXUN (ORCPT ); Thu, 9 Jul 2020 19:20:13 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NK4r7038453; Thu, 9 Jul 2020 18:20:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336804; bh=c0U/6UXwkjm96QgVwEXr+Y99qTURmUnIxiiCuECGvik=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=qsqkk/y7uOV3in98PC1/xYuP038z7MhEE6m0wjq3v8BEqWU2xLPWJCFxWAwRW9dFt YYqL44+lgodeAhBSV5bYznK9BSX3/77m5kX5nZWj/eaRBsbBEJVDAPsdmfc3YU1Utw TpfhX3qYKdYOQ9nuf3uENGagEUoylp9qP5N4Ot8w= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 069NK4Yo011912 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 9 Jul 2020 18:20:04 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:04 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:04 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK4B3119019; Thu, 9 Jul 2020 18:20:04 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NK3qT124367; Thu, 9 Jul 2020 18:20:03 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 02/13] ARM: dts: omap5: Add timer_sys_ck clocks for timers Date: Thu, 9 Jul 2020 18:19:43 -0500 Message-ID: <20200709231954.1973-3-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The commit d41e53040926 ("clk: ti: omap5: cleanup unnecessary clock aliases") has cleaned up all timer_sys_ck clock aliases and retained only the timer_32k_ck clock alias. The OMAP clocksource timer driver though still uses this clock alias when reconfiguring the parent clock source for the timer functional clocks, so add these clocks to all the timer nodes except for the always-on timers 1 and 12. This is required by the OMAP remoteproc driver to successfully acquire a timer and configure the source clock to be driven from timer_sys_ck clock. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap5-l4-abe.dtsi | 20 ++++++++++------- arch/arm/boot/dts/omap5-l4.dtsi | 35 +++++++++++++++++------------ 2 files changed, 33 insertions(+), 22 deletions(-) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap5-l4-abe.dtsi b/arch/arm/boot/dts/omap5-l4-abe.dtsi index bafd6adf9f45..25b7fce8de2d 100644 --- a/arch/arm/boot/dts/omap5-l4-abe.dtsi +++ b/arch/arm/boot/dts/omap5-l4-abe.dtsi @@ -298,8 +298,9 @@ timer5: timer@0 { compatible = "ti,omap5430-timer"; reg = <0x0 0x80>, <0x49038000 0x80>; - clocks = <&abe_clkctrl OMAP5_TIMER5_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&abe_clkctrl OMAP5_TIMER5_CLKCTRL 24>, + <&dss_syc_gfclk_div>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-dsp; ti,timer-pwm; @@ -329,8 +330,9 @@ timer6: timer@0 { compatible = "ti,omap5430-timer"; reg = <0x0 0x80>, <0x4903a000 0x80>; - clocks = <&abe_clkctrl OMAP5_TIMER6_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&abe_clkctrl OMAP5_TIMER6_CLKCTRL 24>, + <&dss_syc_gfclk_div>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-dsp; ti,timer-pwm; @@ -360,8 +362,9 @@ timer7: timer@0 { compatible = "ti,omap5430-timer"; reg = <0x0 0x80>, <0x4903c000 0x80>; - clocks = <&abe_clkctrl OMAP5_TIMER7_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&abe_clkctrl OMAP5_TIMER7_CLKCTRL 24>, + <&dss_syc_gfclk_div>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-dsp; }; @@ -390,8 +393,9 @@ timer8: timer@0 { compatible = "ti,omap5430-timer"; reg = <0x0 0x80>, <0x4903e000 0x80>; - clocks = <&abe_clkctrl OMAP5_TIMER8_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&abe_clkctrl OMAP5_TIMER8_CLKCTRL 24>, + <&dss_syc_gfclk_div>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-dsp; ti,timer-pwm; diff --git a/arch/arm/boot/dts/omap5-l4.dtsi b/arch/arm/boot/dts/omap5-l4.dtsi index 5217805bf126..683394d1e4d6 100644 --- a/arch/arm/boot/dts/omap5-l4.dtsi +++ b/arch/arm/boot/dts/omap5-l4.dtsi @@ -1082,8 +1082,9 @@ target-module@32000 { /* 0x48032000, ap 5 3e.0 */ timer2: timer@0 { compatible = "ti,omap5430-timer"; reg = <0x0 0x80>; - clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4per_clkctrl OMAP5_TIMER2_CLKCTRL 24>, + <&sys_clkin>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; }; }; @@ -1109,8 +1110,9 @@ target-module@34000 { /* 0x48034000, ap 7 46.0 */ timer3: timer@0 { compatible = "ti,omap5430-timer"; reg = <0x0 0x80>; - clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4per_clkctrl OMAP5_TIMER3_CLKCTRL 24>, + <&sys_clkin>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; }; }; @@ -1136,8 +1138,9 @@ target-module@36000 { /* 0x48036000, ap 9 4e.0 */ timer4: timer@0 { compatible = "ti,omap5430-timer"; reg = <0x0 0x80>; - clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4per_clkctrl OMAP5_TIMER4_CLKCTRL 24>, + <&sys_clkin>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; }; }; @@ -1163,8 +1166,9 @@ target-module@3e000 { /* 0x4803e000, ap 11 56.0 */ timer9: timer@0 { compatible = "ti,omap5430-timer"; reg = <0x0 0x80>; - clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4per_clkctrl OMAP5_TIMER9_CLKCTRL 24>, + <&sys_clkin>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-pwm; }; @@ -1730,8 +1734,9 @@ target-module@86000 { /* 0x48086000, ap 41 5e.0 */ timer10: timer@0 { compatible = "ti,omap5430-timer"; reg = <0x0 0x80>; - clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4per_clkctrl OMAP5_TIMER10_CLKCTRL 24>, + <&sys_clkin>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-pwm; }; @@ -1758,8 +1763,9 @@ target-module@88000 { /* 0x48088000, ap 43 66.0 */ timer11: timer@0 { compatible = "ti,omap5430-timer"; reg = <0x0 0x80>; - clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4per_clkctrl OMAP5_TIMER11_CLKCTRL 24>, + <&sys_clkin>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-pwm; }; @@ -2387,8 +2393,9 @@ timer1_target: target-module@8000 { /* 0x4ae18000, ap 9 18.0 */ timer1: timer@0 { compatible = "ti,omap5430-timer"; reg = <0x0 0x80>; - clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>, + <&sys_clkin>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-alwon; }; From patchwork Thu Jul 9 23:19:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235192 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1638065ecp; Thu, 9 Jul 2020 16:20:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwvzANhMNsi/0FFWtGdtv922/S/6hWdgf7PbcR8r467DcLnAY+/dp4//73nboh5Eru8se3O X-Received: by 2002:aa7:cdca:: with SMTP id h10mr61785165edw.285.1594336814523; Thu, 09 Jul 2020 16:20:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336814; cv=none; d=google.com; s=arc-20160816; b=enSNYEXXJkv/3S5JsPTTmE2LXdq5kN7WTKT5T8PyPNjhbv0JxnKyB+ngCsaDLuyDdU U3SBljDquppwFiQsBotADwukmqyk/l4OLwsV1ZjtRABNHJ5+WD8oPhQurvrKXw5cFMDG 3k295fci2riM+HfuPXZoeQuBmm7+oY14qL0ItxLkrxPk9SUKyJ/uYC5BCUwePFkzThXe Z7upQVxj5do6TTp0sy+kggB89YPneOP4dN/WBZNeDkXzpisWEH/VJYyWAwb+LS0lAb+R NTpXafPJdq9C84OT53CBga/Fxs9HcX+4khxRoE8AVQ3mIEyXrFDDq/juhOVPt+oMc1u6 utQA== ARC-Message-Signature: i=1; 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[23.128.96.18]) by mx.google.com with ESMTP id n23si2740812ejx.656.2020.07.09.16.20.14; Thu, 09 Jul 2020 16:20:14 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=vB6whN1e; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726809AbgGIXUN (ORCPT + 6 others); Thu, 9 Jul 2020 19:20:13 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:49288 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726778AbgGIXUM (ORCPT ); Thu, 9 Jul 2020 19:20:12 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NK4IW122916; Thu, 9 Jul 2020 18:20:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336804; bh=zGwp7kf/6vGSBcqJKvT87gomlb9Jc7VbFtUnbKFhyuI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=vB6whN1ey/S1kK6AsIww0TVF5zNxwP6LkFTG3Xsk/+LV1nITqJUR7PIA7rDuBYwal 9+sJifSyUjgR021HRdKFMKoV1n3y0NHI6Mm5/Byhzo6l/tYalGv7oh6JlW6GXj4czh UvuX0PoLTiLK+e/hFrckAt5/O9qZ03ezPFgY4UAQ= Received: from DLEE106.ent.ti.com (dlee106.ent.ti.com [157.170.170.36]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 069NK4go023734 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 9 Jul 2020 18:20:04 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:04 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:04 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK3oX118932; Thu, 9 Jul 2020 18:20:04 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NK3wx124406; Thu, 9 Jul 2020 18:20:03 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 03/13] ARM: dts: omap4: Update the DSP node Date: Thu, 9 Jul 2020 18:19:44 -0500 Message-ID: <20200709231954.1973-4-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The compatible property for the DSP node is updated to match the OMAP remoteproc bindings. The node is moved from the soc node to the ocp node to better reflect the connectivity from MPU side. The node is updated with the 'ti,bootreg', 'clocks', 'resets', 'iommus', 'mboxes' and 'firmware' properties. Note that the node does not have any 'reg' or 'reg-names' properties since it doesn't have any L2 RAM memory, but only Unicaches. The node is disabled for now, and should be enabled as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap4.dtsi | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 4400f5f8e099..8f6b38bb5753 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -106,10 +106,6 @@ mpu { sram = <&ocmcram>; }; - dsp { - compatible = "ti,omap3-c64"; - }; - iva { compatible = "ti,ivahd"; ti,hwmods = "iva"; @@ -277,6 +273,17 @@ emif2: emif@4d000000 { hw-caps-temp-alert; }; + dsp: dsp { + compatible = "ti,omap4-dsp"; + ti,bootreg = <&scm_conf 0x304 0>; + iommus = <&mmu_dsp>; + resets = <&prm_tesla 0>; + clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>; + firmware-name = "omap4-dsp-fw.xe64T"; + mboxes = <&mailbox &mbox_dsp>; + status = "disabled"; + }; + aes1_target: target-module@4b501000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x4b501080 0x4>, From patchwork Thu Jul 9 23:19:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235189 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1638029ecp; Thu, 9 Jul 2020 16:20:12 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzvRjJstP5HpYSitVpgE82nZsXLX7zZSCWEg3FKWsCkjWSarWyogclujrMvTZesVKbCZe/G X-Received: by 2002:a17:907:94ca:: with SMTP id dn10mr57173958ejc.348.1594336812573; Thu, 09 Jul 2020 16:20:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336812; cv=none; d=google.com; s=arc-20160816; b=ewVbSFNHTGSxLhy1K8zzlzzwf0wrWUCDwjxeFEJDRoNptIBtRLUwM+XnVFueC/8weG URJVVW4sqjGd58mM/98CB27yABbUFt+/4Kk74JfyWgHmvwJqUFc2WLSHsiy7JxVGYN9O cM6MiUTQGejbMGg4X2n19/1e1OKX0vmgVpz3+IwOhCjvhJdJrbJ1yzSTPu7VgRJ9gDwz 9VweauzopgyHY77s7EEGC7cqVB+gNWRHOj/x11wDi0a0wx9wcPtaTjl0Gax6DHYHOePx FrBFcOKpgvnhcou4wD7+1lUM5rcpy4SdzIdkKGkX0qWG1qlZJB9UHnKJ0rPNQDNSuNwQ j3BQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bTbO7tKvhum5luzqsKRZJs6tS+jmpYvKHI4pzaAiS9w=; b=Jo3uc1cagDMtTFYi88YG8bYUQNsWLEwIYdX9ObJkgsEt19nBRlRv94U538UzdK6aqq 29Gz4876LmZtWbsB/qQFujPbcjbgOSlMNj9t7X5PiG0UgXTPkB5xAlyPxjNMFtYYr5WG iKEUD/H5nzbQ74FO08rXf35Sd7/Iyx4DOQj9vgvbYpb2fIkCB3k7FGN6rVrTCdLNRfMt fLIm+YcVkC4Ypy/shBK6z8S1zO64Ct5r8YRa24Lt48bWRENZjZdsswv8pwRwGiWwAa78 zYhTFpUM7ZCsI6igkZ+QJlCezZRZPJ1pNCmDXdcz0Dvx1Izqc+JdLmXrFgsKHb6x0DLT Q1fA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=pP0UbUwv; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n23si2740812ejx.656.2020.07.09.16.20.12; Thu, 09 Jul 2020 16:20:12 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=pP0UbUwv; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726756AbgGIXUK (ORCPT + 6 others); Thu, 9 Jul 2020 19:20:10 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:49280 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726446AbgGIXUK (ORCPT ); Thu, 9 Jul 2020 19:20:10 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NK5HP122925; Thu, 9 Jul 2020 18:20:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336806; bh=bTbO7tKvhum5luzqsKRZJs6tS+jmpYvKHI4pzaAiS9w=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=pP0UbUwvvLDPY+nqCHOEHtvohVoePS+OwAkOUoyX6rJxzRFcMg6k7JmHawiBeRCTA eGfv2iSmVdR1o0gpk04PhHTZb6X3iezWPPuDIuClLf4z91DoYKQvQaOwdRb5dxbgj+ F+s6WRTvQ7hZmLkPY8Jjnh2ETfvS32w0CTU/pPgk= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK5Sg099173; Thu, 9 Jul 2020 18:20:05 -0500 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:04 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:04 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK43s052548; Thu, 9 Jul 2020 18:20:04 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NK4t5124425; Thu, 9 Jul 2020 18:20:04 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 04/13] ARM: dts: omap4: Add IPU DT node Date: Thu, 9 Jul 2020 18:19:45 -0500 Message-ID: <20200709231954.1973-5-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The DT node for the Dual-Cortex M3 IPU processor sub-system has been added for OMAP4 SoCs. The L2RAM memory region information has been added to the node through the 'reg' and 'reg-names' properties. The node has the 'iommus', 'clocks', 'resets', 'mboxes' and 'firmware' properties also added, and is disabled for now. It should be enabled as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap4.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 8f6b38bb5753..4928951ad9db 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -284,6 +284,18 @@ dsp: dsp { status = "disabled"; }; + ipu: ipu@55020000 { + compatible = "ti,omap4-ipu"; + reg = <0x55020000 0x10000>; + reg-names = "l2ram"; + iommus = <&mmu_ipu>; + resets = <&prm_core 0>, <&prm_core 1>; + clocks = <&ducati_clkctrl OMAP4_IPU_CLKCTRL 0>; + firmware-name = "omap4-ipu-fw.xem3"; + mboxes = <&mailbox &mbox_ipu>; + status = "disabled"; + }; + aes1_target: target-module@4b501000 { compatible = "ti,sysc-omap2", "ti,sysc"; reg = <0x4b501080 0x4>, From patchwork Thu Jul 9 23:19:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235193 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1638078ecp; Thu, 9 Jul 2020 16:20:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwBCMAblj7/PjM5xtA5lf/g/x/bftTxRfJj5Z2Rba3U+05IxHc+6+Dihhg4j4DtMA5kz9Db X-Received: by 2002:a17:907:2654:: with SMTP id ar20mr55456471ejc.62.1594336815250; Thu, 09 Jul 2020 16:20:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336815; cv=none; d=google.com; s=arc-20160816; b=nFyHUtOPn6WZUXbYLkQF3rDbCcSxTB/J6VkndGIhvtrGFEWQrEV/nGXJ/d+cTAqxmf lYJ//w/iWAMy8w/JmhiwReoy8FgXoY0/SQIayVCG210xXIi9BJtrFez1EMC7ADOD5xB7 wJ68rXt0HOgHUubfbAxjkJkzBMrBE3x0lJhLW3KFfPfNRDzIYr+kIJLQMwTAZxCxOrxO v8KOSd0SyYK3abnOKVUzN5Huuxd7u2w8JelObgA670ISMDXTLBJ9SStU97GDMAn6ZE/y m3tarKD9qyAeUZSowSOUi9P/d7I2H0pJUnQbebLMggiVdTh2w6xoSjLQBj96ApXr8gv/ wxHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4NEaJ+o/Rdfi/1ONnr+25cH1gYQsbvGjOaeF9dyNuSg=; b=wjw8F/P1hwr5ah/bxPqiHljTz8JG6KKkrXFJXIvyQcts2QbFbyTS5ZMKFCAv6JYS5l Mhr7ufi7vNdnZ6k5NjWAwpY7zTalrNlu/ISKurZxVXN4DGQjC+3ih4e3XkSDR+4+4SlW ZmpDy0zSCp7zBkbZH0r/2t5ag+CCGXgTwpT/A7pjJh03FksEIZWRF08lxIZaQ3zT8EOu SA/+D7iEVRFoX2fyJpyiVAo0B2JMEGXS3Frdf/kpZLV67GqJJgVJbKuNdygd3HlktueE sQDi2rvPL1FGcXHjFOMCnKB6VJL9GJk7IROo//Jwj0NPIOeEFMypoO/7IydrQXAzWJ+v zTxQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=yFoI9KYV; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n23si2740812ejx.656.2020.07.09.16.20.15; Thu, 09 Jul 2020 16:20:15 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=yFoI9KYV; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726778AbgGIXUN (ORCPT + 6 others); Thu, 9 Jul 2020 19:20:13 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:47040 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726446AbgGIXUM (ORCPT ); Thu, 9 Jul 2020 19:20:12 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NK6dS038462; Thu, 9 Jul 2020 18:20:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336806; bh=4NEaJ+o/Rdfi/1ONnr+25cH1gYQsbvGjOaeF9dyNuSg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yFoI9KYVaPhM71Uob3JJvXvt56aE7h4B63n5YX0jRt/OsS7X9gU3N2Q6w8oXVasND TjtRdgoPKgKwwgaJh6qn68a5zOvZ4Q27FjA9dJgkGJpJyk7J1SuBWxjmDsvM+pFWJN kP0yXE/MvGIB2YnUxnT6lZHh7w2pvJV+fuiQMu7c= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 069NK5BN051495 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 9 Jul 2020 18:20:06 -0500 Received: from DLEE104.ent.ti.com (157.170.170.34) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:05 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:05 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK5Ms095981; Thu, 9 Jul 2020 18:20:05 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NK5us124429; Thu, 9 Jul 2020 18:20:05 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 05/13] ARM: dts: omap4: Add aliases for rproc nodes Date: Thu, 9 Jul 2020 18:19:46 -0500 Message-ID: <20200709231954.1973-6-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add aliases for the DSP and IPU remoteproc processor nodes common to all OMAP4 boards. The aliases uses the stem "rproc". The aliases can be overridden, if needed, in the respective board files. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap4.dtsi | 2 ++ 1 file changed, 2 insertions(+) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 4928951ad9db..3fd26b22c4f3 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -26,6 +26,8 @@ aliases { serial1 = &uart2; serial2 = &uart3; serial3 = &uart4; + rproc0 = &dsp; + rproc1 = &ipu; }; cpus { From patchwork Thu Jul 9 23:19:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235190 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1638045ecp; Thu, 9 Jul 2020 16:20:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwaD8ePyq7b6KUXwYVm1L/9ReZjQSz+U9k1CCRwmpNBpQE2OJhG+2uyUgTDyXQ8Dze6l9ix X-Received: by 2002:a50:8c06:: with SMTP id p6mr35318539edp.146.1594336813405; Thu, 09 Jul 2020 16:20:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336813; cv=none; d=google.com; s=arc-20160816; b=NgHmYLZaqQFRdktEKKeztVh9zN3iYTK+dTs2/9U5dQjnp1qg9cCX20DLPN0plrFMaM tG/8KskARaFAetTxQ2Y6l5tkvZkzVgjO1rCvZdcObb/QcRRBMT3EX9tetFvScZj/i4C7 +cbFKA67/peh2spMbFHgo/tbf+rJ29g2+HZoKJn62zFD7amsie5VjcQiSc4rEDqSG7h6 rvHhTcoT9DWHyDQKK2I66KgX+/Vt+9fpKCo1dl8We3pJcIBN6RX/3wI1CEDSt4ppG+2O CaNyjgNz1Hi6H/HT62iCE1b3MxCA/CfUpm7JtvkD5j4gBhNTKeOivGX/wnvHnw+nDIIh RpFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=CNBtCJ1QxYrYPVuB3zh0QajQVwCm8p+F9zhXyfSPlEI=; b=gVH2iPCOXkuqadeEdVxVxh5Ucrfo46wKcY+btwQxfdVGotXGz8r5ZYrpjr6McllbRl Fwoy8xHX1Y3M6Q4q5x2EZGUPISxWp5nLElIEAc2HGihNCMI3RGQ6IBqsZjguM+YKGdr7 HRalgReWod+9aF8Y6x4ZqAHnsnzXpO8bECPYSv3pYaOVUzPtXAnrw1OtCuNEJ9kBPkPt i+dE3pcTyOTjaEDz8uiI8wAoqpOKmAY3RfRoy7fGJdfgXfKiP3yEdLKKcyMHB1UIgZdN nEd0RE5YxTx0fxPZ3BbkHgmCCm4/zOWwr0vqERv1MwhCKQe7MWqZ0pmNe5q6B0FHGVol UufA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="sEEFG/7g"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n23si2740812ejx.656.2020.07.09.16.20.13; Thu, 09 Jul 2020 16:20:13 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="sEEFG/7g"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726819AbgGIXUM (ORCPT + 6 others); Thu, 9 Jul 2020 19:20:12 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:49290 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726793AbgGIXUL (ORCPT ); Thu, 9 Jul 2020 19:20:11 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NK6Og122930; Thu, 9 Jul 2020 18:20:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336806; bh=CNBtCJ1QxYrYPVuB3zh0QajQVwCm8p+F9zhXyfSPlEI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=sEEFG/7g8zTe4Q4neAkITmtjd6ZijNs2c194Rlt7Smbc1cYIrA5qhB1yB11lMSbFg nDs8+mIPK2L0c1TIvKZm4Bs3hUEocxRlj7f3TKs+pGOFE2uR16gHAMB4Zt5uc5LaIA p45coctb/QSIGQq003vofMvOjfN/7l3wh9Vz916I= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK6PG099341; Thu, 9 Jul 2020 18:20:06 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:06 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:06 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK6s1096031; Thu, 9 Jul 2020 18:20:06 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NK6tx124433; Thu, 9 Jul 2020 18:20:06 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 06/13] ARM: dts: omap4-panda-common: Add CMA pools and enable IPU & DSP Date: Thu, 9 Jul 2020 18:19:47 -0500 Message-ID: <20200709231954.1973-7-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The CMA reserved memory nodes have been added for the IPU and DSP remoteproc devices on all the OMAP4-based Panda boards. These nodes are assigned to the respective rproc device nodes, and both the IPU and DSP remote processors are enabled for all these boards. The current CMA pools and sizes are defined statically for each device. The starting addresses are fixed to meet current dependencies on the remote processor firmwares, and will go away when the remote-side code has been improved to gather this information runtime during its initialization. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap4-panda-common.dtsi | 30 +++++++++++++++++++++++ 1 file changed, 30 insertions(+) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index 55ea8b6189af..ef79028fc95f 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -12,6 +12,26 @@ memory@80000000 { reg = <0x80000000 0x40000000>; /* 1 GB */ }; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dsp_memory_region: dsp-memory@98000000 { + compatible = "shared-dma-pool"; + reg = <0x98000000 0x800000>; + reusable; + status = "okay"; + }; + + ipu_memory_region: ipu-memory@98800000 { + compatible = "shared-dma-pool"; + reg = <0x98800000 0x7000000>; + reusable; + status = "okay"; + }; + }; + chosen { stdout-path = &uart3; }; @@ -571,3 +591,13 @@ hdmi_out: endpoint { }; }; }; + +&dsp { + status = "okay"; + memory-region = <&dsp_memory_region>; +}; + +&ipu { + status = "okay"; + memory-region = <&ipu_memory_region>; +}; From patchwork Thu Jul 9 23:19:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235197 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1638920ecp; Thu, 9 Jul 2020 16:21:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzyctMMT/S90/wSg15Gg/sV7HhXFony68xpffe1HY5sT0k00vndi0BSpJLWV20LMqSVrZMn X-Received: by 2002:a17:906:54a:: with SMTP id k10mr57275849eja.480.1594336818603; Thu, 09 Jul 2020 16:20:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336818; cv=none; d=google.com; s=arc-20160816; b=crCLJQexMDX99vAn6s1E7HQpqASA696yREtv4yCv/ZTK7cEAsUQ1IDBKxneq8gLjpL 7DmcPLHY4x+lDpF/Es3Y3KSnkEdnKg10Canp2Ww0/da2cD9aesf3PSqh3pKeIWzoosJr Or/hzfzVFcRoDUmmv9iiWzPclkI8MyCllFRGMx0V+xSNaSX97hVlTTnK4pUpOZch5OPz VaXTbQn/UkAq+r95jNThZw13FUol/C75sFmS5H5kHU58ao5u+toVZ9lxtMnAr30n9G4Z 9AGkZReBSsM4iAQLWog1DyFmZY8ERP9BTOio3/OkZ6n2yi3OGnYCJurLP6nOTAmxHWqh G39A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Q2UknZFZp0eYO410jfQeNU8OelHDDnS7sGKVXVirJAw=; b=ZhbAG119CNln6/IiOfUYqs/dL5tJ3eODEOoYg5wi2fl3vZq/Ga6bSKwSpC71WN8y0H sakUWIroMGi5P5hAmlWDRQWyzOXS5JL6CoH+DE+9QIuF9rQGZOZVDukqYBr23CxDyzS3 g3dC8g2YpC2z+avMh3R2NkTSMxw5HIhfdk1DGjjIjeUiHd2WzHpoUhyEahlXujQGw6GX LDR9objkuDAnsOayIVv2mCQ6R4kpvmyn2cg4+2xibRbmvtq7xrThCwJ60rLtUGgm3NBv UL6spPuznV9n+1tZKpd+DjnCMyEXj72jfIBxasZTm/dt+gdtQrNQPQT/UFGmzxEWiGsW rsjA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=CGgXIqVA; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n23si2740812ejx.656.2020.07.09.16.20.18; Thu, 09 Jul 2020 16:20:18 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=CGgXIqVA; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726828AbgGIXUR (ORCPT + 6 others); Thu, 9 Jul 2020 19:20:17 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:49314 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726856AbgGIXUQ (ORCPT ); Thu, 9 Jul 2020 19:20:16 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NK9dI122954; Thu, 9 Jul 2020 18:20:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336809; bh=Q2UknZFZp0eYO410jfQeNU8OelHDDnS7sGKVXVirJAw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=CGgXIqVAYgv0t9mlMOJSAhp3bcCTAObcPuolH/YYwPfRndyjIEd19nZkY+RFi5RtO e9nT4yrN9LmMgaiHyq2fZwIUptudm5aT9+KqXmz+lErU9IIAVStR9TM42hMZhGfCUf alkRlgoppxtOTjpcn7Qe+auyAEYjyOcBXKvuw77I= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK9ZP099442; Thu, 9 Jul 2020 18:20:09 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:08 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:08 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK7Ds119283; Thu, 9 Jul 2020 18:20:08 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NK7ex124457; Thu, 9 Jul 2020 18:20:07 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 09/13] ARM: dts: omap5: Add aliases for rproc nodes Date: Thu, 9 Jul 2020 18:19:50 -0500 Message-ID: <20200709231954.1973-10-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add aliases for the DSP and IPU remoteproc processor nodes common to all OMAP5 boards. The aliases uses the stem "rproc", and are identical to the values chosen on OMAP4 boards. The aliases can be overridden, if needed, in the respective board files. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap5.dtsi | 2 ++ 1 file changed, 2 insertions(+) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 116150ded018..adffc48a6d55 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -31,6 +31,8 @@ aliases { serial3 = &uart4; serial4 = &uart5; serial5 = &uart6; + rproc0 = &dsp; + rproc1 = &ipu; }; cpus { From patchwork Thu Jul 9 23:19:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235198 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1638923ecp; Thu, 9 Jul 2020 16:21:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyjltYa77wESLMhvsJHBripe8F7s50IjeljdkNoP/41Dob6o2JBU9r1P7Fysty3ES2qZEUD X-Received: by 2002:a50:f392:: with SMTP id g18mr51677041edm.151.1594336817143; Thu, 09 Jul 2020 16:20:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336817; cv=none; d=google.com; s=arc-20160816; b=hetAF5yk/eYw0zcRvl3+wqD7UQhDV4WhBBq2Ul0f11tER3hgPcBR6tugvmgIo03FNe CPUS/SVDPd8+qz2okI1RD08a1mC5cvHZhX+yQ2ByXKURqzcLKzgE8DhuLzVpEsVNeITt i7IcpfglCaWCrROyQHbZ5Egxlzd02UzPUTBIwlKW6aWPJSPA7C8UxhPQNZtAO4EGwyyL trFtusXaVHzCY483cnYz0mWP29i63AFNPac+N/hylo8L05VwTcFeYFuGbz1ty1OOYz2D XXzUjPUuaIbIKH2J1hhSCdOr6P5TGB12rQuppn5o343iLdvEyaNqGQWMZLGrv7YcsM3W R5MA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=CyiHZQsfhTO5vLN7NiKzVMU247TNjDR4ol5AODJOUfg=; b=sY8BlpMZ65IkWU+HgRaLzltCE/RBjVmLc0hUlWs/rn4zUbXwhc/iD02+BH0GwjRxeb kQ1lezHpoBv1fuvoQV6EQAJJtqw4wafTGrT/XTLgmGkMb7wuy+6CGoGp+ptk9KVhbZPh /AaxJ24S/NXSc459mm1tMNzRLbtFsNU3P0rMKLLB43cjr2CFhuRcVwIpnsdkO7bcsykH q8h1gF5RZnnOmPb5KwnULVDzAZM5kZW268wRa8NCl/1D/ehqWHD8f9x+Z35XEKWg6WLN 1VNvVwGmETBq8kyGPyhcDgxAJCOwq+PexlbazPhPJn9ux5GiC+yv87r/cH30RhQDKnoe oTLg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=xrAeqnR5; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n23si2740812ejx.656.2020.07.09.16.20.16; Thu, 09 Jul 2020 16:20:17 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=xrAeqnR5; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726859AbgGIXUQ (ORCPT + 6 others); Thu, 9 Jul 2020 19:20:16 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:34598 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726848AbgGIXUP (ORCPT ); Thu, 9 Jul 2020 19:20:15 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NK8hi053753; Thu, 9 Jul 2020 18:20:08 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336808; bh=CyiHZQsfhTO5vLN7NiKzVMU247TNjDR4ol5AODJOUfg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=xrAeqnR5nstmWpZGyl8R2kLPaRLti6sxwL19BxmncbPoV7WJ9rTaPx/FDtf7dOnSn PVA6AVup20WR+YFJuKjsy0LZu1Mq6fLEofc3Xw66IIuE7KrgeT6kg6jhzgApIr0sPM qgynQJY+Sx7z0zhp3SK30opSOTwSH1Z3GSynVgO4= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 069NK82L012077 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 9 Jul 2020 18:20:08 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:08 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:08 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK8HW096124; Thu, 9 Jul 2020 18:20:08 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NK8QA124469; Thu, 9 Jul 2020 18:20:08 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 10/13] ARM: dts: omap5-uevm: Add CMA pools and enable IPU & DSP Date: Thu, 9 Jul 2020 18:19:51 -0500 Message-ID: <20200709231954.1973-11-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The CMA reserved memory nodes have been added for the IPU and DSP remoteproc devices on the OMAP5 uEVM board. These nodes are assigned to the respective rproc device nodes, and both the IPU and DSP remote processors are enabled for this board. The current CMA pools and sizes are defined statically for each device. The starting addresses are fixed to meet current dependencies on the remote processor firmwares, and will go away when the remote-side code has been improved to gather this information runtime during its initialization. An associated pair of the rproc node and its CMA node can be disabled later on if there is no use-case defined to use that remote processor. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap5-uevm.dts | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 9441e9a572ad..251885656697 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -15,6 +15,26 @@ memory@80000000 { reg = <0 0x80000000 0 0x7f000000>; /* 2032 MB */ }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + dsp_memory_region: dsp-memory@95000000 { + compatible = "shared-dma-pool"; + reg = <0 0x95000000 0 0x800000>; + reusable; + status = "okay"; + }; + + ipu_memory_region: ipu-memory@95800000 { + compatible = "shared-dma-pool"; + reg = <0 0x95800000 0 0x3800000>; + reusable; + status = "okay"; + }; + }; + aliases { ethernet = ðernet; }; @@ -198,3 +218,13 @@ ethernet: usbether@3 { &wlcore { compatible = "ti,wl1837"; }; + +&dsp { + status = "okay"; + memory-region = <&dsp_memory_region>; +}; + +&ipu { + status = "okay"; + memory-region = <&ipu_memory_region>; +}; From patchwork Thu Jul 9 23:19:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235196 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1638139ecp; Thu, 9 Jul 2020 16:20:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyDoTo5VL0lL96uvjsngpgaYnPVai9TWKBEy+n//FqM7MmdJ7d1K/4EUrzjFCmOQh1RO4oR X-Received: by 2002:a17:906:4447:: with SMTP id i7mr48756924ejp.191.1594336819718; Thu, 09 Jul 2020 16:20:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336819; cv=none; d=google.com; s=arc-20160816; b=BNK/s/0BSWVZvkZFCnEJKcyA+eWyC6sYHSWFz+3sj+FaRN83EUr7fWFv7NAbNUgus8 cNw4BLY2BZ5L3B6bPGr2mIh/T+o1wTdU4XFs1RSuvT3TuOGLo5ESHCoH7+a7lTnLOH8C QJMCBFHirohQf3coOtsuo0no9qzanQzB1RXYd98sHvF+PDPoyc9EWO/G/wlrc1vwkTFg 3yokbIxRFMBOzWSWFoYKnzNjaBQsYgTT+73ccMF8FNmJs+YqAUr/49bx5VKQYLsSE6U0 sJP38lfMPSBjkP6BuSbmiZJFUgNkf6kPORCOj5LADd21jWuF9Hacl+Ifloy5ajAofRmS zHCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9DEjoc4nTb8pIGGuDBB5IWvIfClSK8JgplovScBDMdE=; b=bqAeSg7d5nRXJ/H7oXhtzI5Q/LMr7mTBl03aTXSxGur7gnkzyRoqup+rgfO7kDpn57 TZgLY09FuzECeVwfiBnkacdtQPWr40PhUnVkIlsOnjMqhZ4iNdllolKhsURPtYl9Me83 o4Sh+paC3b5pu732aPhHBDpb75PkXzCVDHxqE3iy0mAqfVtUtpQZSMPCu33KSt1pf8qh TfkQQziNFRPknQ/p/ZyPJIE2eSpPMjh3YdmQXMWZXMaZ06ozh04zi/38n0O75O0Wop17 PWdgG7mEiugiWRbMx9QC59tK6NZG4kyG38geEpTDRTyLYPVU4PUvRQ+rucgVXJBlSRra doUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=EI1DT7UC; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n23si2740812ejx.656.2020.07.09.16.20.19; Thu, 09 Jul 2020 16:20:19 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=EI1DT7UC; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726852AbgGIXUR (ORCPT + 6 others); Thu, 9 Jul 2020 19:20:17 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:49310 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726828AbgGIXUP (ORCPT ); Thu, 9 Jul 2020 19:20:15 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NK92I122950; Thu, 9 Jul 2020 18:20:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336809; bh=9DEjoc4nTb8pIGGuDBB5IWvIfClSK8JgplovScBDMdE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=EI1DT7UCQe+5y2Z2H0H3Ms6mWNwnsOmiNqNZrQfmXai4vdSHIytN+/4vgKUru0E+X O6jRE4r/LbvMpwfBOx3JInzdQCC6dTdG3DhC+TmFowc8r0pB8A2peEjX/Ty8sqohbz sxtMt354IkXx6hNSd3WjtOYa7ikHHicYe4OfEavA= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 069NK9CA051639 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 9 Jul 2020 18:20:09 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:08 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:08 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK8WX096146; Thu, 9 Jul 2020 18:20:08 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NK8oc124475; Thu, 9 Jul 2020 18:20:08 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 11/13] ARM: dts: omap5-uevm: Add system timers to DSP and IPU Date: Thu, 9 Jul 2020 18:19:52 -0500 Message-ID: <20200709231954.1973-12-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The BIOS System Tick timers have been added for the IPU and DSP remoteproc devices for the OMAP5 uEVM boards. The following timers (same as the timers on OMAP4 Panda boards) are chosen: IPU : GPT3 (SMP-mode) DSP : GPT5 IPU has two Cortex-M4 processors, and is currently expected to be running in SMP-mode, so only a single timer suffices to provide the BIOS tick timer. An additional timer should be added for the second processor in IPU if it were to be run in non-SMP mode. The timer value also needs to be unique from the ones used by other processors so that they can be run simultaneously. The timers are optional, but are mandatory to support device management features such as power management and watchdog support. The above are added to successfully boot and execute firmware images configured with the respective timers, images that use internal processor subsystem timers are not affected. The timers can be changed or removed as per the system integration needs, alongside equivalent changes on the firmware side. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap5-uevm.dts | 2 ++ 1 file changed, 2 insertions(+) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 251885656697..bb016419ef61 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -222,9 +222,11 @@ &wlcore { &dsp { status = "okay"; memory-region = <&dsp_memory_region>; + ti,timers = <&timer5>; }; &ipu { status = "okay"; memory-region = <&ipu_memory_region>; + ti,timers = <&timer3>; };