From patchwork Thu Jul 9 23:19:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235188 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1637992ecp; Thu, 9 Jul 2020 16:20:09 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyLyNHTizzzyvAt6/yfX++51dS0XyWJgRsG3rR7mlf5v0RI6W/JKAwwGbn1nTvdX9JTgYSH X-Received: by 2002:a17:906:84ef:: with SMTP id zp15mr53704284ejb.3.1594336809684; Thu, 09 Jul 2020 16:20:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336809; cv=none; d=google.com; s=arc-20160816; b=Jk1OiLfn2wXvnphDIr4JWZG7B98+dLVF01/IUGGZ7HXd8H71iLf6Jpr4n1ABWZrGLL xmBYIrs46x5KjcUyi4Zy5hD3TyCtU6c4yUyI6dNBFtn5jLOwqAaeUC3xWbrcNNYyS+lC tRjrHOsc3ZTfWvIWOvO2E5GkkBz4JhRTBqHaKMvyMQmYqiSKTYQN4Pd1aatrX+UDn2kU Lk6H0i0XIkk8v0RO7kOelopunUdpKIxCT0CUY8LUM0HpkxLIifOiiGlOub1L+1E0Fa1u Tx4oA7cMphR671XMxW1++it5oc8LAqKeINidtWrLJ2tUhjYfmc8qHaUCu7uPZIm7k+/C vyXQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bj6nkinvxoUBEjdlWJZuVGG0GefCFyrmKPpAuJeavTc=; b=r5SJJS9wLg6FJLi+G/PUlsrvie78ZP68hS5Fti8sLdFgX2kYLe3APsSw2oBwLpOxot LDoakwbymMAejzcmzvDNjPg9XOBGU3yRCvieTk+Z8Evinced4JCWh26oHbRxw5pEpm7a hJSW4LWcpegVcRNld6Vz6+awLMr8tH5HdpSK5ylA9MQaVGKs7SYPgqs0u5EvqtyTMR3K Afq/nG9TiBAvYc3+gQvtfwjp548MxzTV068HU2+uFj8PerBSpGU5egiDkY7W68qop1jZ DAZBY91I0zWIM/fl0S7TTAKvRZdFJMXVvylqHuEun7cMz2aj7IgRXUqfiZl5jn+ue/ZI ZHEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="YDfq/PKy"; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id cq21si2919841edb.353.2020.07.09.16.20.09; Thu, 09 Jul 2020 16:20:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="YDfq/PKy"; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726725AbgGIXUJ (ORCPT + 4 others); Thu, 9 Jul 2020 19:20:09 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:34582 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726446AbgGIXUI (ORCPT ); Thu, 9 Jul 2020 19:20:08 -0400 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NK3aE053728; Thu, 9 Jul 2020 18:20:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336803; bh=bj6nkinvxoUBEjdlWJZuVGG0GefCFyrmKPpAuJeavTc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=YDfq/PKytLFJRXryu9Ga+CbOjFfCBU4OF2i2KTEzETIPvlxnZRW4CGS2Qf66ziQuL soAcyv4iUOc2fg2ilND/xv7hdCl+ZL63wSmc0E/BwZSrMhe5XiXIkyCLi2qY9kl/1N 8Eb9OpCgfhMBgEJFuDNnCPUfH/HLiU0/9aP5AA9I= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK3HK098998; Thu, 9 Jul 2020 18:20:03 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:03 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:02 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK2PF118701; Thu, 9 Jul 2020 18:20:02 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NK2d5124356; Thu, 9 Jul 2020 18:20:02 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 01/13] ARM: dts: omap4: Add timer_sys_ck clocks for timers Date: Thu, 9 Jul 2020 18:19:42 -0500 Message-ID: <20200709231954.1973-2-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The commit 1c7de9f27a65 ("clk: ti: omap4: cleanup unnecessary clock aliases") has cleaned up all timer_sys_ck clock aliases and retained only the timer_32k_ck clock alias. The OMAP clocksource timer driver though still uses this clock alias when reconfiguring the parent clock source for the timer functional clocks, so add these clocks to all the timer nodes. This is required by the OMAP remoteproc driver to successfully acquire a timer and configure the source clock to be driven from timer_sys_ck clock. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap4-l4-abe.dtsi | 20 ++++++++++------- arch/arm/boot/dts/omap4-l4.dtsi | 35 +++++++++++++++++------------ 2 files changed, 33 insertions(+), 22 deletions(-) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap4-l4-abe.dtsi b/arch/arm/boot/dts/omap4-l4-abe.dtsi index a6feb201c569..b2cf5f41e222 100644 --- a/arch/arm/boot/dts/omap4-l4-abe.dtsi +++ b/arch/arm/boot/dts/omap4-l4-abe.dtsi @@ -333,8 +333,9 @@ timer5: timer@0 { compatible = "ti,omap4430-timer"; reg = <0x00000000 0x80>, <0x49038000 0x80>; - clocks = <&abe_clkctrl OMAP4_TIMER5_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&abe_clkctrl OMAP4_TIMER5_CLKCTRL 24>, + <&syc_clk_div_ck>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-dsp; }; @@ -363,8 +364,9 @@ timer6: timer@0 { compatible = "ti,omap4430-timer"; reg = <0x00000000 0x80>, <0x4903a000 0x80>; - clocks = <&abe_clkctrl OMAP4_TIMER6_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&abe_clkctrl OMAP4_TIMER6_CLKCTRL 24>, + <&syc_clk_div_ck>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-dsp; }; @@ -393,8 +395,9 @@ timer7: timer@0 { compatible = "ti,omap4430-timer"; reg = <0x00000000 0x80>, <0x4903c000 0x80>; - clocks = <&abe_clkctrl OMAP4_TIMER7_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&abe_clkctrl OMAP4_TIMER7_CLKCTRL 24>, + <&syc_clk_div_ck>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-dsp; }; @@ -423,8 +426,9 @@ timer8: timer@0 { compatible = "ti,omap4430-timer"; reg = <0x00000000 0x80>, <0x4903e000 0x80>; - clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>, + <&syc_clk_div_ck>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-pwm; ti,timer-dsp; diff --git a/arch/arm/boot/dts/omap4-l4.dtsi b/arch/arm/boot/dts/omap4-l4.dtsi index fcc52121ff09..bf90a683d7b8 100644 --- a/arch/arm/boot/dts/omap4-l4.dtsi +++ b/arch/arm/boot/dts/omap4-l4.dtsi @@ -1163,8 +1163,9 @@ SYSC_OMAP2_SOFTRESET | timer1: timer@0 { compatible = "ti,omap3430-timer"; reg = <0x0 0x80>; - clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>, + <&sys_clkin_ck>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-alwon; }; @@ -1439,8 +1440,9 @@ SYSC_OMAP2_SOFTRESET | timer2: timer@0 { compatible = "ti,omap3430-timer"; reg = <0x0 0x80>; - clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4_per_clkctrl OMAP4_TIMER2_CLKCTRL 24>, + <&sys_clkin_ck>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; }; }; @@ -1466,8 +1468,9 @@ target-module@34000 { /* 0x48034000, ap 7 04.0 */ timer3: timer@0 { compatible = "ti,omap4430-timer"; reg = <0x0 0x80>; - clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4_per_clkctrl OMAP4_TIMER3_CLKCTRL 24>, + <&sys_clkin_ck>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; }; }; @@ -1493,8 +1496,9 @@ target-module@36000 { /* 0x48036000, ap 9 0e.0 */ timer4: timer@0 { compatible = "ti,omap4430-timer"; reg = <0x0 0x80>; - clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4_per_clkctrl OMAP4_TIMER4_CLKCTRL 24>, + <&sys_clkin_ck>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; }; }; @@ -1520,8 +1524,9 @@ target-module@3e000 { /* 0x4803e000, ap 11 08.0 */ timer9: timer@0 { compatible = "ti,omap4430-timer"; reg = <0x0 0x80>; - clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>, + <&sys_clkin_ck>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-pwm; }; @@ -1954,8 +1959,9 @@ SYSC_OMAP2_SOFTRESET | timer10: timer@0 { compatible = "ti,omap3430-timer"; reg = <0x0 0x80>; - clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4_per_clkctrl OMAP4_TIMER10_CLKCTRL 24>, + <&sys_clkin_ck>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-pwm; }; @@ -1982,8 +1988,9 @@ target-module@88000 { /* 0x48088000, ap 45 2e.0 */ timer11: timer@0 { compatible = "ti,omap4430-timer"; reg = <0x0 0x80>; - clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>; - clock-names = "fck"; + clocks = <&l4_per_clkctrl OMAP4_TIMER11_CLKCTRL 24>, + <&sys_clkin_ck>; + clock-names = "fck", "timer_sys_ck"; interrupts = ; ti,timer-pwm; }; From patchwork Thu Jul 9 23:19:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235195 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1638111ecp; Thu, 9 Jul 2020 16:20:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzH1nWvCjoLA8mgb4bTT5BnSpjIZD9+5eRfvCOqtfV2QwflXpCzoObQA1Yo5bMxGO7lBANd X-Received: by 2002:aa7:d049:: with SMTP id n9mr69530233edo.39.1594336817923; Thu, 09 Jul 2020 16:20:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336817; cv=none; d=google.com; s=arc-20160816; b=PtbE01Y2QPuAJesszKsYMFlnL/B3hecUXZvMDa1T5hLXb0EjXPjAaQ/qgH4H3tCweO Ty74XJMNLkYjLtZ32aPlsfiHWZkovhtDPxqvrsFH1OH9QJmxYSGSjKyG2Dt6iwVO2+G5 k9V0YUoz7zNtR9+BH2X+SbY/i9wWFZAMplXjrB1ddQ1a1m0AUlkrpa3+FVx78Mxfl8Dt NI8zRhx6ThyLY3qbrL3gTOUQ2BZ8recL8/9tJKjX7lEJDYtYQK5ClTB/sb4j/xXGKNnp Vv4uxupWHT+8u0l6xRL/Bd2RFkJtex+DNVN9SygMhdQdZfnS4dZXGYuFHzcGZHswtbGm wwlA== ARC-Message-Signature: i=1; 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[23.128.96.18]) by mx.google.com with ESMTP id n23si2740812ejx.656.2020.07.09.16.20.17; Thu, 09 Jul 2020 16:20:17 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=xQFv0l7E; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726848AbgGIXUQ (ORCPT + 4 others); Thu, 9 Jul 2020 19:20:16 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:49312 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726852AbgGIXUP (ORCPT ); Thu, 9 Jul 2020 19:20:15 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NK7px122934; Thu, 9 Jul 2020 18:20:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336807; bh=N+YPQiYfbFNBgXuAu/fQKZpj4xm9HZyt3OSvcyZWSpc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=xQFv0l7EnEZq8iUhXRPo+XXw0aUUqUkTtZF9D9cEpsMvJxcwuCWncWK3FJo397xgo S4pYXTIT2xx5qXa4f2Ew5aKLHX6pp4vz8ghBfS/31LbRka2JZ3ZO5A97Ny7xQf1EdU SwDReNJTsfAuY9XUzr6KGCLnga3SvF1qsTmiuKy0= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 069NK75S012024 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 9 Jul 2020 18:20:07 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:06 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:06 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK6Y7096058; Thu, 9 Jul 2020 18:20:06 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NK6CO124440; Thu, 9 Jul 2020 18:20:06 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 07/13] ARM: dts: omap4-panda-common:: Add system timers to DSP and IPU Date: Thu, 9 Jul 2020 18:19:48 -0500 Message-ID: <20200709231954.1973-8-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The BIOS System Tick timers have been added for the IPU and DSP remoteproc devices on all the OMAP4-based Panda boards. The following DMTimers are chosen: IPU : GPT3 (SMP-mode) DSP : GPT5 IPU has two Cortex-M3 processors, and is currently expected to be running in SMP-mode, so only a single timer suffices to provide the BIOS tick timer. An additional timer should be added for the second processor in IPU if it were to be run in non-SMP mode. The timer value also needs to be unique from the ones used by other processors so that they can be run simultaneously. The timers are optional, but are mandatory to support device management features such as power management and watchdog support. The above are added to successfully boot and execute firmware images configured with the respective timers, images that use internal processor subsystem timers are not affected. The timers can be changed or removed as per the system integration needs, alongside equivalent changes on the firmware side. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap4-panda-common.dtsi | 2 ++ 1 file changed, 2 insertions(+) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index ef79028fc95f..db0b7e9264f9 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -595,9 +595,11 @@ hdmi_out: endpoint { &dsp { status = "okay"; memory-region = <&dsp_memory_region>; + ti,timers = <&timer5>; }; &ipu { status = "okay"; memory-region = <&ipu_memory_region>; + ti,timers = <&timer3>; }; From patchwork Thu Jul 9 23:19:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235191 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1638059ecp; Thu, 9 Jul 2020 16:20:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw/naIDbK2k7SZT6S+7+FwK/S4foY7u1TCM5W4DHDNN+DfEFJVOjQVpRmMOF0x9Ulq8cOd3 X-Received: by 2002:a50:f384:: with SMTP id g4mr71903194edm.205.1594336814167; Thu, 09 Jul 2020 16:20:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336814; cv=none; d=google.com; s=arc-20160816; b=BAW1enT3D3muEGAna6tglpsqvYX5h0h+E4HnFumFeGKMtS6+CzNuIOGFnZfmvVfyMI hRDLvwXwyZ03AkOgWbAGJgGMEa0nHx1NmDtFHSG1IHPAhARsvs5XP0L2GyzgUGYlzhV/ wVSra7593COy5s0SVRiDtXsCVTMgmj6MAKQrv5no6sufzszEJGO6nL1sXDEjH+gGvRzX MXeGBClbS/KJHkicCAM+RlwpR/QCnG7uwmDOU2PZWUrkrYh27fuNqVDv5pdcdGHK9IKV IdPnWCbn3bVDND3DVCAcZP3Gbzo/rd+bAZWFYsn6avwIQsFQdyUzs2RWkY3v69+9GMxo qfZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UgAdMugjQH9zepDiXJKzHbCjKp+TW08nB/thQHWUeAg=; b=Di+oBQzRNaY1WKxxlS6jAmtyAYx1cE48VzfWGsju1nUIPHviUgC5Jf/oY//30SgoUl fZ6I8qsuZEmXAY6d3o9vA3Es/rnMXCDlk05JamIIieZhu3YF+6vhN3iNNAcgElhtOtg5 VqD8oRIEbpmqL7KhX6JqtFHnn5YtUeJAqiRHxUekIuuuugY7BOeBwe+NFnor1Psfqkj+ KJMcX2flFbC2qmhI7EZEX9qv7kHdBXIateHjTY+kaqFXOijiw1NCNgyne4ERTkIQfAjz ZCnKnN226qXBTgDBp8c5056X16sW3NBhi1L5HPLnQFTaUufYLa7QL3dolcwzN6lqTR3u 2gVg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=RlLmUo9a; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n23si2740812ejx.656.2020.07.09.16.20.14; Thu, 09 Jul 2020 16:20:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=RlLmUo9a; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726793AbgGIXUM (ORCPT + 4 others); Thu, 9 Jul 2020 19:20:12 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:34592 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726809AbgGIXUM (ORCPT ); Thu, 9 Jul 2020 19:20:12 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NK763053748; Thu, 9 Jul 2020 18:20:07 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336807; bh=UgAdMugjQH9zepDiXJKzHbCjKp+TW08nB/thQHWUeAg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=RlLmUo9aScgSG3Ri0j6KhzcZPrgR9XrEnJEFBnKjUZx50rErm/CUkKgckgzKohYjb lZV2cEnlaSIa++NYIXRRl63YyTwTbkgnEpAeiOSnQfzgGw+9KiR4Q+zfxl5y27fhEd 3+HASQx8S7PewtcTqK9YTO9q8enqBTvfHm4WrJ2c= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 069NK7Tx051608 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 9 Jul 2020 18:20:07 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:07 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:07 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NK7ol096085; Thu, 9 Jul 2020 18:20:07 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NK7Nj124447; Thu, 9 Jul 2020 18:20:07 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 08/13] ARM: dts: omap5: Add DSP and IPU nodes Date: Thu, 9 Jul 2020 18:19:49 -0500 Message-ID: <20200709231954.1973-9-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org OMAP5, like OMAP4, also has two remote processor subsystems, DSP and IPU. The IPU subsystem though has dual Cortex-M4 processors instead of the dual Cortex-M3 processors in OMAP4, but otherwise has almost the same set of features. Add the DT nodes for these two processor sub-systems for all OMAP5 SoCs. The nodes have the 'iommus', 'clocks', 'resets', 'firmware' and 'mboxes' properties added, and are disabled for now. The IPU node has its L2 RAM memory specified through the 'reg' and 'reg-names' properties. The DSP node doesn't have these since it doesn't have any L2 RAM memories, but has an additional 'ti,bootreg' property instead as it has a specific boot register that needs to be programmed for booting. These nodes should be enabled as per the individual product configuration in the corresponding board dts files. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap5.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index fb889c5b00c9..116150ded018 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -216,6 +216,29 @@ mmu_ipu: mmu@0 { }; }; + dsp: dsp { + compatible = "ti,omap5-dsp"; + ti,bootreg = <&scm_conf 0x304 0>; + iommus = <&mmu_dsp>; + resets = <&prm_dsp 0>; + clocks = <&dsp_clkctrl OMAP5_MMU_DSP_CLKCTRL 0>; + firmware-name = "omap5-dsp-fw.xe64T"; + mboxes = <&mailbox &mbox_dsp>; + status = "disabled"; + }; + + ipu: ipu@55020000 { + compatible = "ti,omap5-ipu"; + reg = <0x55020000 0x10000>; + reg-names = "l2ram"; + iommus = <&mmu_ipu>; + resets = <&prm_core 0>, <&prm_core 1>; + clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>; + firmware-name = "omap5-ipu-fw.xem4"; + mboxes = <&mailbox &mbox_ipu>; + status = "disabled"; + }; + dmm@4e000000 { compatible = "ti,omap5-dmm"; reg = <0x4e000000 0x800>; From patchwork Thu Jul 9 23:19:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235200 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1639156ecp; Thu, 9 Jul 2020 16:22:18 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwpy6ANB38Oj08a15ef75kDd09FQWoJeF90s7dWAsyMaRs0mGMWa8b/qQLaC6DiIA3ZbwY7 X-Received: by 2002:aa7:dcc8:: with SMTP id w8mr76740228edu.305.1594336820712; Thu, 09 Jul 2020 16:20:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336820; cv=none; d=google.com; s=arc-20160816; b=GJq4GuczGft9vimN8qfmGVpq4LxHhV5ZFL01g6i2WQ3r1NJdrr+Uqsp1av8+cF9FGL s+A9AvL1Qtt5AhKNi76FnspJBfKnmYU5N7E+z0Ss1ihlJDY4f91urfYZ/o5wKfwF1R/7 Ybn4RkeqbTW7AOVdcOLz+p7LCCSSywE8xHyaU85wuzjgOLrPKNzgRLDfK7kL3Rw30E48 Tpo6Ky2aj+1LBpGp/i2rmUoJ62nq2KVKg2H/Ka7HnqGmuPMKFQGaH21LQjUqHB7GC2OW j+NkK9qvxPXBxubb0oC0tAkbridNK+ChWelb1swSQf46jKuVW7tElCWLSiVLWo9C3xGq SBog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=u3p1npC2557z4sLt7pkiAxqgy+7rym2HrvMf1wembWw=; b=mxfnED7L/e/cg5cE5ZionjBty+RWvqgWbniTnJhJIIGnIdf3mcDo/l3P39+n8PrG0k c7MWn0dcOW/hXrD+lP0bEdfHFnfnWJ76Q+e6B4kR5A0eRW4QFH3m430k9tVMil9gORIp YPa7GA7TWDYAijzQlUhSUTZkwIesQ5CLLRz4hftOnfFElxPNh8E4+SKVXcGiZ/3asZXn 8til521z4q6r76oCpDwn8TtqeqkpyD+4fLkZxK6tvfLM22A5QgQJVnU2zIdyW72fkQt3 QjRk7DvpLqEjuIdqtPBWPP44styEq8tQjG747gcLzQOVz+u0VcpY7d2FotaHIb3MXUX4 QmRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="IBOg/QN+"; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n23si2740812ejx.656.2020.07.09.16.20.20; Thu, 09 Jul 2020 16:20:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="IBOg/QN+"; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726856AbgGIXUS (ORCPT + 4 others); Thu, 9 Jul 2020 19:20:18 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:49318 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726896AbgGIXUR (ORCPT ); Thu, 9 Jul 2020 19:20:17 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NKAF4122959; Thu, 9 Jul 2020 18:20:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336810; bh=u3p1npC2557z4sLt7pkiAxqgy+7rym2HrvMf1wembWw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=IBOg/QN+aoXjhpU/t5LE6tJIgWUECQCOtRYAfmqwHfUx1I1RG+weVeiRZ02m+FGHX LjMyGPo06hhvZwGkim7yBuBfYWEAiI30NGS/w5JmaShJBmbtGt6iOPou6SM8JUYVgE XqgC3phDPhVA85/BasR+KFBsas69QT8SbhYFs3mo= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 069NKABg012122 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 9 Jul 2020 18:20:10 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:10 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:10 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NKAi3096163; Thu, 9 Jul 2020 18:20:10 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NKAMD124482; Thu, 9 Jul 2020 18:20:10 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 12/13] ARM: dts: omap4-panda-common: Add watchdog timers for IPU and DSP Date: Thu, 9 Jul 2020 18:19:53 -0500 Message-ID: <20200709231954.1973-13-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The watchdog timers have been added for the IPU and DSP remoteproc devices on all the OMAP4-based Panda boards. The following timers are used as the watchdog timers, DSP : GPT6 IPU : GPT9 & GPT11 (one for each Cortex-M3 core) The MPU-side drivers will use this data to initialize the watchdog timers, and listen for any watchdog triggers. The BIOS-side code needs to configure and refresh these timers properly to not throw a watchdog error. These timers can be changed or removed as per the system integration needs, alongside appropriate equivalent changes on the firmware side. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap4-panda-common.dtsi | 2 ++ 1 file changed, 2 insertions(+) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index db0b7e9264f9..a6a0c7b832dd 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -596,10 +596,12 @@ &dsp { status = "okay"; memory-region = <&dsp_memory_region>; ti,timers = <&timer5>; + ti,watchdog-timers = <&timer6>; }; &ipu { status = "okay"; memory-region = <&ipu_memory_region>; ti,timers = <&timer3>; + ti,watchdog-timers = <&timer9>, <&timer11>; }; From patchwork Thu Jul 9 23:19:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 235199 Delivered-To: patch@linaro.org Received: by 2002:a54:2c11:0:0:0:0:0 with SMTP id g17csp1638977ecp; Thu, 9 Jul 2020 16:22:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyBa/yu8Z/ldwV8RFDkflDEHeNFq/IQsHNODqEHmjuvHZRQHLc6IRVFTxNIr5jGKunRqIMK X-Received: by 2002:aa7:d6cf:: with SMTP id x15mr72720035edr.164.1594336820383; Thu, 09 Jul 2020 16:20:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594336820; cv=none; d=google.com; s=arc-20160816; b=cmUpwTH6YtdVxQ7vaUQQtJBQZuiPk8cl3W6VABqujckclPMdFMIFCrdUDogapYQ0DO n31cjWYiQsGa3BVCnITgSiVWQnlIIadyB/JmGNdJL+qoIc9qNLzkSsk5iD+8D91xq+02 IkJ7pbq73H6NbOEldyEyKe+rKOpM2Ip6ygJhw6Z26SW5FZR5FjholdxHCg2tqgmmKPkv AqisS8JwqEz4VLzUwEGo8C8n0xEAY8V13U4TCmSZoKXJfKuyV6lW+T1y6iLPf4s8IPDU vQmftAoORF1Qlg8OHE3yG8KWR+vCdQc4Xh2fHj2q280d4tQCnK+z+o67SYxYVaQpmBwt jYwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=hoL0x9O1kvkaT4prL5tfXltZY55PUwkw/Roc9kLuZoA=; b=gAzf3mJ/ne7eN6nX5UcCxx3uxyJvUhPnE9C7Mh1+FORBpmDHF+sr8TMjDajd2AJUwd QeT/Cf64MqMUbjRAHTcLO6L71oF0DMUgiJmUYJktRyPYBl+2Q7LQSYjg2JijDY/DMht5 +pttrzeEnVU6+NCJjKXpGLSA1RKS2jegtg7fyG/2SbNFX3VzNh2rR2CbnQbFgYz8uYEm 0KmaPY0yzFwbwC7UDpW6DpLG7DD7VHfnq/RfXOjKU5kFFce5n8Mh5CL43+3lHbE4Txhm FsIYnFvQUC6l+ShPMjh8qh+NartwqKBWskuG2SIm9Xc9roMaOs2V5iXk4KrEF2UBhjfD iNmw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=uQrDfkRX; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n23si2740812ejx.656.2020.07.09.16.20.20; Thu, 09 Jul 2020 16:20:20 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=uQrDfkRX; spf=pass (google.com: domain of linux-omap-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-omap-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726896AbgGIXUS (ORCPT + 4 others); Thu, 9 Jul 2020 19:20:18 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:55410 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726894AbgGIXUS (ORCPT ); Thu, 9 Jul 2020 19:20:18 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 069NKB28019098; Thu, 9 Jul 2020 18:20:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1594336811; bh=hoL0x9O1kvkaT4prL5tfXltZY55PUwkw/Roc9kLuZoA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=uQrDfkRX1E7dRRpd+FVkx8e9aDd0eG5JNkddM8kTRSJcGB8SYCakzom7KEQaasN6P z+8aqRnjO5MOOA7bgMXm+ROFz96mOjsz4MAn7ESQ0ppXy9m60CayKsFPRsUiiiO1jZ kGr85dwwFamhgdNTrFHDMDz605ciqbUQNwhrdqrE= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 069NKBoo012138 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 9 Jul 2020 18:20:11 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 9 Jul 2020 18:20:10 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 9 Jul 2020 18:20:10 -0500 Received: from fllv0103.dal.design.ti.com (fllv0103.dal.design.ti.com [10.247.120.73]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 069NKAtp032199; Thu, 9 Jul 2020 18:20:10 -0500 Received: from localhost ([10.250.34.57]) by fllv0103.dal.design.ti.com (8.14.7/8.14.7) with ESMTP id 069NKAmV124485; Thu, 9 Jul 2020 18:20:10 -0500 From: Suman Anna To: Tony Lindgren CC: , , , Tero Kristo , Suman Anna Subject: [PATCH 13/13] ARM: dts: omap5-uevm: Add watchdog timers for IPU and DSP Date: Thu, 9 Jul 2020 18:19:54 -0500 Message-ID: <20200709231954.1973-14-s-anna@ti.com> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200709231954.1973-1-s-anna@ti.com> References: <20200709231954.1973-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org The watchdog timers have been added for the IPU and DSP remoteproc devices for the OMAP5 uEVM board. The following timers (same as the timers on OMAP4 Panda boards) are used as the watchdog timers, DSP : GPT6 IPU : GPT9 & GPT11 (one for each Cortex-M4 core) The MPU-side drivers will use this data to initialize the watchdog timers, and listen for any watchdog triggers. The BIOS-side code needs to configure and refresh these timers properly to not throw a watchdog error. These timers can be changed or removed as per the system integration needs, alongside appropriate equivalent changes on the firmware side. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap5-uevm.dts | 2 ++ 1 file changed, 2 insertions(+) -- 2.26.0 diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index bb016419ef61..9b9e9ee51b5c 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -223,10 +223,12 @@ &dsp { status = "okay"; memory-region = <&dsp_memory_region>; ti,timers = <&timer5>; + ti,watchdog-timers = <&timer6>; }; &ipu { status = "okay"; memory-region = <&ipu_memory_region>; ti,timers = <&timer3>; + ti,watchdog-timers = <&timer9>, <&timer11>; };