From patchwork Fri Jul 10 16:21:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 235247 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp602312ilg; Fri, 10 Jul 2020 09:25:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyXQGWZICHjrliJTzUMQDCB0JPl6pJAgPKqBX/UGHW1Z0bziVUIqC4VH0ps0hAEgkJx3xHx X-Received: by 2002:a50:ab52:: with SMTP id t18mr79951448edc.195.1594398358158; Fri, 10 Jul 2020 09:25:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594398358; cv=none; d=google.com; s=arc-20160816; b=eZxzFw2Eb7Oi4z5YSb+h0uaVpZfqmgYKLZbc5n569SRPSz239te5sdEnCQXCAhInnf yVY+TpUKPUIgo4ML5ySB+ax2d9yUUEOxcHIazEU5lhv46ZHP5YNiGU/r3b2DcExgSUAF qNNE4+58AF1IVl+KfohAnh0h48w0JJYrFrRm3s5I0XIvhOw42Ka8YN667tGYCi9Jk36a 5t0Kum5yU/8Ff+e4WIXIuY7/V+pG2EnjD7KJTynO+6+6biKG6MYijyPd9itUD1dPf0VL VeS86CYCscWSZnkPIBXLelxE80muSKlg8Xrg2vzAsVCZp1VBB3titNb5Xf75KVgOuDV8 tmJw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:message-id:date:cc:to :from; bh=zxfxbdo0sYrNFNcJUOR9b9TSgmOt2qLEniT3VB6RWUU=; b=YB4DYubx7pQ5aToznoe4xyObVfnSOSnf/N6fgv+w6WG+WqGmbNrpMG5T5HkU29DK2E iIrqcBQH2BMESWIjgMDKeHvp5JWMwzsUvkPu6XDzclOotSo8cFOyQ1PBZU72g9F6L896 me4R8Wu8isayaHh+nmNsyqdM84LhjTRnPC9DVHuHczIScXhSjGQJ8BIE+sMoPuF7wi6A dlzuTlGAxDY3XjU74hP//rKL00l/kp0//zhLH+V9eYVmLoyMoIh0857IZsOiqk51ryb+ spbiOZbJkFZ28vDZksI+OITU/v/GWTxg3xP36znJig+40PSHUzg/HNo4JPcPNMt45+kS QZqw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from dpdk.org (dpdk.org. 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Fri, 10 Jul 2020 18:25:54 +0200 (CEST) Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id C2C93402AE; Sat, 11 Jul 2020 00:25:51 +0800 (SGT) From: Hemant Agrawal To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Hemant Agrawal Date: Fri, 10 Jul 2020 21:51:29 +0530 Message-Id: <20200710162137.22973-1-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 1/9] net/dpaa2: remove Rx timestamp enable PMD API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This experimental API is no longer required as the same purpose can be solved with standard DEV_RX_OFFLOAD_TIMESTAMP Signed-off-by: Hemant Agrawal --- drivers/net/dpaa2/dpaa2_ethdev.c | 8 +------- drivers/net/dpaa2/dpaa2_ethdev.h | 2 +- drivers/net/dpaa2/dpaa2_rxtx.c | 2 +- drivers/net/dpaa2/rte_pmd_dpaa2.h | 21 +-------------------- 4 files changed, 4 insertions(+), 29 deletions(-) -- 2.17.1 diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c index 020af4b03..c530596cd 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.c +++ b/drivers/net/dpaa2/dpaa2_ethdev.c @@ -64,7 +64,7 @@ static uint64_t dev_tx_offloads_nodis = DEV_TX_OFFLOAD_MULTI_SEGS; /* enable timestamp in mbuf */ -enum pmd_dpaa2_ts dpaa2_enable_ts; +bool dpaa2_enable_ts; struct rte_dpaa2_xstats_name_off { char name[RTE_ETH_XSTATS_NAME_SIZE]; @@ -106,12 +106,6 @@ static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev); static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev); static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); -void -rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable) -{ - dpaa2_enable_ts = enable; -} - static int dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on) { diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h index 2bc0f3f5a..2e6d26d4f 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.h +++ b/drivers/net/dpaa2/dpaa2_ethdev.h @@ -91,7 +91,7 @@ #define DPAA2_PKT_TYPE_VLAN_2 0x0260 /* enable timestamp in mbuf*/ -extern enum pmd_dpaa2_ts dpaa2_enable_ts; +extern bool dpaa2_enable_ts; #define DPAA2_QOS_TABLE_RECONFIGURE 1 #define DPAA2_FS_TABLE_RECONFIGURE 2 diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c index eb2e84256..86cb95268 100644 --- a/drivers/net/dpaa2/dpaa2_rxtx.c +++ b/drivers/net/dpaa2/dpaa2_rxtx.c @@ -108,7 +108,7 @@ dpaa2_dev_rx_parse_new(struct rte_mbuf *m, const struct qbman_fd *fd, m->hash.rss = fd->simple.flc_hi; m->ol_flags |= PKT_RX_RSS_HASH; - if (dpaa2_enable_ts == PMD_DPAA2_ENABLE_TS) { + if (dpaa2_enable_ts) { m->timestamp = annotation->word2; m->ol_flags |= PKT_RX_TIMESTAMP; DPAA2_PMD_DP_DEBUG("pkt timestamp:0x%" PRIx64 "", m->timestamp); diff --git a/drivers/net/dpaa2/rte_pmd_dpaa2.h b/drivers/net/dpaa2/rte_pmd_dpaa2.h index ca7bf7d46..ec8df75af 100644 --- a/drivers/net/dpaa2/rte_pmd_dpaa2.h +++ b/drivers/net/dpaa2/rte_pmd_dpaa2.h @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP */ #ifndef _RTE_PMD_DPAA2_H @@ -17,25 +17,6 @@ #include -enum pmd_dpaa2_ts { - PMD_DPAA2_DISABLE_TS, - PMD_DPAA2_ENABLE_TS -}; - -/** - * @warning - * @b EXPERIMENTAL: this API may change, or be removed, without prior notice - * - * Enable/Disable timestamping update in mbuf for LX2160 kind of devices. - * For LS2088/LS1088 devices, timestamping will be updated in mbuf without - * calling this API. - * - * @param pmd_dpaa2_ts - * Enum to enable/disable timestamp update in mbuf for LX2160 devices. - */ -__rte_experimental -void rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts); - /** * @warning * @b EXPERIMENTAL: this API may change, or be removed, without prior notice From patchwork Fri Jul 10 16:21:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 235248 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp602380ilg; Fri, 10 Jul 2020 09:26:05 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxKykmmDuBzrRp3ZWfBEr6BB8xTmZlcRCnC/DuVBIqSXxxrZD689eYMEICnctRuBu/HCHf3 X-Received: by 2002:a17:906:b888:: with SMTP id hb8mr61332248ejb.124.1594398365051; Fri, 10 Jul 2020 09:26:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594398365; cv=none; d=google.com; s=arc-20160816; b=fQJcZ1e0Y5Ffb/vtO3bcnW3PzInAr4rp1EVI/Fb5bzGf4QILfGvFy8qXRcL0pTrmYy eVTLGVfdDadBed4rgk5J8lQCkpd+A+uFF7t5jd9s42x+ghf+Lu36vsDywezLvmoEwjJL RW3g/o6aZhiZ5LbpAutYR9WuorOM56zmABaNsvUY0BrlOchUE0YUUUkZ09TqHgvBXaom z0iuTbNM9sldGfR+DF/Xoz8zRGn3Ir6t61bOMZ+ctprLnveDGAVAzCPzVk7AauhHuU+T P4VUd77eA435Uipuc/+4FvZ3ja24j96xPanKvfVUzZ9rUzM4IEaFfT1PVW7pGQ2INiI4 VAJg== ARC-Message-Signature: i=1; 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[92.243.14.124]) by mx.google.com with ESMTP id w23si4621816eds.47.2020.07.10.09.26.04; Fri, 10 Jul 2020 09:26:05 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 95BDC1D9E5; Fri, 10 Jul 2020 18:25:59 +0200 (CEST) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by dpdk.org (Postfix) with ESMTP id E04641D9A4 for ; Fri, 10 Jul 2020 18:25:56 +0200 (CEST) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id BC6261A04BF; Fri, 10 Jul 2020 18:25:56 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 0A0B91A04AF; Fri, 10 Jul 2020 18:25:55 +0200 (CEST) Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 734A7402D3; Sat, 11 Jul 2020 00:25:52 +0800 (SGT) From: Hemant Agrawal To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Hemant Agrawal Date: Fri, 10 Jul 2020 21:51:30 +0530 Message-Id: <20200710162137.22973-2-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200710162137.22973-1-hemant.agrawal@nxp.com> References: <20200710162137.22973-1-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 2/9] net/dpaa2: support per port Rx mbuf timestamp X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" DEV_RX_OFFLOAD_TIMESTAMP is per port, so the internal implementation shall enable it on per port basis only. Signed-off-by: Hemant Agrawal --- doc/guides/nics/features/dpaa2.ini | 2 ++ drivers/net/dpaa2/dpaa2_ethdev.c | 4 ++-- drivers/net/dpaa2/dpaa2_ethdev.h | 2 +- drivers/net/dpaa2/dpaa2_rxtx.c | 2 +- 4 files changed, 6 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/doc/guides/nics/features/dpaa2.ini b/doc/guides/nics/features/dpaa2.ini index 3685e2e02..831883d21 100644 --- a/doc/guides/nics/features/dpaa2.ini +++ b/doc/guides/nics/features/dpaa2.ini @@ -21,6 +21,8 @@ VLAN offload = Y L3 checksum offload = Y L4 checksum offload = Y Packet type parsing = Y +Timesync = Y +Timestamp offload = Y Basic stats = Y Extended stats = Y FW version = Y diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c index c530596cd..3e5502de5 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.c +++ b/drivers/net/dpaa2/dpaa2_ethdev.c @@ -64,7 +64,7 @@ static uint64_t dev_tx_offloads_nodis = DEV_TX_OFFLOAD_MULTI_SEGS; /* enable timestamp in mbuf */ -bool dpaa2_enable_ts; +bool dpaa2_enable_ts[RTE_MAX_ETHPORTS]; struct rte_dpaa2_xstats_name_off { char name[RTE_ETH_XSTATS_NAME_SIZE]; @@ -525,7 +525,7 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev) #if !defined(RTE_LIBRTE_IEEE1588) if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP) #endif - dpaa2_enable_ts = true; + dpaa2_enable_ts[dev->data->port_id] = true; if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM) tx_l3_csum_offload = true; diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h index 2e6d26d4f..e577355d5 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.h +++ b/drivers/net/dpaa2/dpaa2_ethdev.h @@ -91,7 +91,7 @@ #define DPAA2_PKT_TYPE_VLAN_2 0x0260 /* enable timestamp in mbuf*/ -extern bool dpaa2_enable_ts; +extern bool dpaa2_enable_ts[]; #define DPAA2_QOS_TABLE_RECONFIGURE 1 #define DPAA2_FS_TABLE_RECONFIGURE 2 diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c index 86cb95268..4dd1d5f57 100644 --- a/drivers/net/dpaa2/dpaa2_rxtx.c +++ b/drivers/net/dpaa2/dpaa2_rxtx.c @@ -108,7 +108,7 @@ dpaa2_dev_rx_parse_new(struct rte_mbuf *m, const struct qbman_fd *fd, m->hash.rss = fd->simple.flc_hi; m->ol_flags |= PKT_RX_RSS_HASH; - if (dpaa2_enable_ts) { + if (dpaa2_enable_ts[m->port]) { m->timestamp = annotation->word2; m->ol_flags |= PKT_RX_TIMESTAMP; DPAA2_PMD_DP_DEBUG("pkt timestamp:0x%" PRIx64 "", m->timestamp); From patchwork Fri Jul 10 16:21:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 235249 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp602485ilg; Fri, 10 Jul 2020 09:26:14 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy6LIyZDb+sT+BG5274Jp5xuEwqDFDWvTFU59ubcy//hB54ypHFqTcqm2imWOFL2PvCf/Xc X-Received: by 2002:a05:6402:1346:: with SMTP id y6mr79125767edw.192.1594398374112; Fri, 10 Jul 2020 09:26:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594398374; cv=none; d=google.com; s=arc-20160816; b=cwQ7XiHiZcdBZHfX4ww18Dti/Sy6daUQ67RziQfYQf2AiOJq7bFWOCPz8+bbd/bR7l 3ZDmnz+9DLRYmyvOMsDHfCOwnWaekHo+or2Btjopa1E85KWVWS3PFfukF382N3NfMn+A 34BffGU+jIZ4VczLjHbzLvq+/Y54x6TsrmFg7EWYV8KAJGErVMeSgQNMrptvDGoDgOja G/TLSNWOehqzxfl5b3M5iWow181cGZSm5CVApx1SmkLVSU82kOtwmwAp+2L7d4QexrVO L7zNuxzKxedVB9TbfmP2pAdBPGyIRoHBLFDZfe8T6ofqHQ0Tcj1A22jqUnzVhox4X2wx C76w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:cc:to:from; bh=h8INA/LxnYnFPDJTpZ0jGxIKzG7cbqcWQc5w+RcRDrU=; b=KOGXWfhpXi/huRAenlqkElokKdKwjNlWArbMkw+NeFNM2VpSrw7t3EwzBQUnX/x/7/ ckkoWjDxMWqyQSk+NGVhyqFCerUoQMP/BiIp4R0ea/UMk8qVBFH3e45PSoLumIo40MaO 75PUEvBXZM0T5w1ZqDyPSLUCXIa6OeQhQxOjzjiePMPMvUqvvW3kZ/jTeY4KqLHKWZn1 jy1aX2WKugIfVQpaayyd1ATGGMz0asARohOMZagU+Qhx1nZRZrRaqEgef7Ls5sZhJkvl bGbBHO/2ZEdRGLgCO5YM8F72hKgSbYGUKyAsryf6LLiNidBWj1fz+t1paVtmb2upj7F2 tO2A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from dpdk.org (dpdk.org. [92.243.14.124]) by mx.google.com with ESMTP id op5si4108452ejb.617.2020.07.10.09.26.13; Fri, 10 Jul 2020 09:26:14 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D4F641D9FB; Fri, 10 Jul 2020 18:26:00 +0200 (CEST) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by dpdk.org (Postfix) with ESMTP id D85B01D9DA for ; Fri, 10 Jul 2020 18:25:57 +0200 (CEST) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id ACFAB1A04AF; Fri, 10 Jul 2020 18:25:57 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id C9E001A04B2; Fri, 10 Jul 2020 18:25:55 +0200 (CEST) Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 288FA402AA; Sat, 11 Jul 2020 00:25:53 +0800 (SGT) From: Hemant Agrawal To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Apeksha Gupta Date: Fri, 10 Jul 2020 21:51:31 +0530 Message-Id: <20200710162137.22973-3-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200710162137.22973-1-hemant.agrawal@nxp.com> References: <20200710162137.22973-1-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 3/9] net/dpaa: add Tx/Rx burst mode info X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Apeksha Gupta Retrieve burst mode information according to the selected Rx/Tx mode and offloads. Signed-off-by: Apeksha Gupta --- doc/guides/nics/features/dpaa.ini | 1 + drivers/net/dpaa/dpaa_ethdev.c | 70 ++++++++++++++++++++++++++++++- 2 files changed, 70 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/doc/guides/nics/features/dpaa.ini b/doc/guides/nics/features/dpaa.ini index 816a6e08e..e0ed3e868 100644 --- a/doc/guides/nics/features/dpaa.ini +++ b/doc/guides/nics/features/dpaa.ini @@ -7,6 +7,7 @@ Speed capabilities = Y Link status = Y Link status event = Y +Burst mode info = Y Jumbo frame = Y MTU update = Y Scattered Rx = Y diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c index 3a5b319d4..62ecb112f 100644 --- a/drivers/net/dpaa/dpaa_ethdev.c +++ b/drivers/net/dpaa/dpaa_ethdev.c @@ -457,6 +457,73 @@ static int dpaa_eth_dev_info(struct rte_eth_dev *dev, return 0; } +static int +dpaa_dev_rx_burst_mode_get(struct rte_eth_dev *dev, + __rte_unused uint16_t queue_id, + struct rte_eth_burst_mode *mode) +{ + struct rte_eth_conf *eth_conf = &dev->data->dev_conf; + int ret = -EINVAL; + unsigned int i; + const struct burst_info { + uint64_t flags; + const char *output; + } rx_offload_map[] = { + {DEV_RX_OFFLOAD_JUMBO_FRAME, " Jumbo frame,"}, + {DEV_RX_OFFLOAD_SCATTER, " Scattered,"}, + {DEV_RX_OFFLOAD_IPV4_CKSUM, " IPV4 csum,"}, + {DEV_RX_OFFLOAD_UDP_CKSUM, " UDP csum,"}, + {DEV_RX_OFFLOAD_TCP_CKSUM, " TCP csum,"}, + {DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM, " Outer IPV4 csum,"}, + {DEV_RX_OFFLOAD_RSS_HASH, " RSS,"} + }; + + /* Update Rx offload info */ + for (i = 0; i < RTE_DIM(rx_offload_map); i++) { + if (eth_conf->rxmode.offloads & rx_offload_map[i].flags) { + snprintf(mode->info, sizeof(mode->info), "%s", + rx_offload_map[i].output); + ret = 0; + break; + } + } + return ret; +} + +static int +dpaa_dev_tx_burst_mode_get(struct rte_eth_dev *dev, + __rte_unused uint16_t queue_id, + struct rte_eth_burst_mode *mode) +{ + struct rte_eth_conf *eth_conf = &dev->data->dev_conf; + int ret = -EINVAL; + unsigned int i; + const struct burst_info { + uint64_t flags; + const char *output; + } tx_offload_map[] = { + {DEV_TX_OFFLOAD_MT_LOCKFREE, " MT lockfree,"}, + {DEV_TX_OFFLOAD_MBUF_FAST_FREE, " MBUF free disable,"}, + {DEV_TX_OFFLOAD_IPV4_CKSUM, " IPV4 csum,"}, + {DEV_TX_OFFLOAD_UDP_CKSUM, " UDP csum,"}, + {DEV_TX_OFFLOAD_TCP_CKSUM, " TCP csum,"}, + {DEV_TX_OFFLOAD_SCTP_CKSUM, " SCTP csum,"}, + {DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM, " Outer IPV4 csum,"}, + {DEV_TX_OFFLOAD_MULTI_SEGS, " Scattered,"} + }; + + /* Update Tx offload info */ + for (i = 0; i < RTE_DIM(tx_offload_map); i++) { + if (eth_conf->txmode.offloads & tx_offload_map[i].flags) { + snprintf(mode->info, sizeof(mode->info), "%s", + tx_offload_map[i].output); + ret = 0; + break; + } + } + return ret; +} + static int dpaa_eth_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused) { @@ -1182,7 +1249,8 @@ static struct eth_dev_ops dpaa_devops = { .rx_queue_release = dpaa_eth_rx_queue_release, .tx_queue_release = dpaa_eth_tx_queue_release, .rx_queue_count = dpaa_dev_rx_queue_count, - + .rx_burst_mode_get = dpaa_dev_rx_burst_mode_get, + .tx_burst_mode_get = dpaa_dev_tx_burst_mode_get, .flow_ctrl_get = dpaa_flow_ctrl_get, .flow_ctrl_set = dpaa_flow_ctrl_set, From patchwork Fri Jul 10 16:21:32 2020 Content-Type: text/plain; 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[92.243.14.124]) by mx.google.com with ESMTP id d9si3998178eja.455.2020.07.10.09.26.21; Fri, 10 Jul 2020 09:26:21 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8FD691DA16; Fri, 10 Jul 2020 18:26:02 +0200 (CEST) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by dpdk.org (Postfix) with ESMTP id 85D401D9E1 for ; Fri, 10 Jul 2020 18:25:58 +0200 (CEST) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 68BEC20130B; Fri, 10 Jul 2020 18:25:58 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 847AC2003D1; Fri, 10 Jul 2020 18:25:56 +0200 (CEST) Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id CEA17402D7; Sat, 11 Jul 2020 00:25:53 +0800 (SGT) From: Hemant Agrawal To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Apeksha Gupta Date: Fri, 10 Jul 2020 21:51:32 +0530 Message-Id: <20200710162137.22973-4-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200710162137.22973-1-hemant.agrawal@nxp.com> References: <20200710162137.22973-1-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 4/9] net/dpaa2: add Tx/Rx burst mode info X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Apeksha Gupta Retrieve burst mode information according to the selected Tx/Rx mode and offloads. Signed-off-by: Apeksha Gupta --- doc/guides/nics/features/dpaa2.ini | 2 + drivers/net/dpaa2/dpaa2_ethdev.c | 73 ++++++++++++++++++++++++++++++ 2 files changed, 75 insertions(+) -- 2.17.1 diff --git a/doc/guides/nics/features/dpaa2.ini b/doc/guides/nics/features/dpaa2.ini index 831883d21..878f03d40 100644 --- a/doc/guides/nics/features/dpaa2.ini +++ b/doc/guides/nics/features/dpaa2.ini @@ -7,8 +7,10 @@ Speed capabilities = Y Link status = Y Link status event = Y +Burst mode info = Y Queue start/stop = Y Jumbo frame = Y +Scattered Rx = Y MTU update = Y Promiscuous mode = Y Allmulticast mode = Y diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c index 3e5502de5..a7195f6c1 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.c +++ b/drivers/net/dpaa2/dpaa2_ethdev.c @@ -286,6 +286,77 @@ dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) return 0; } +static int +dpaa2_dev_rx_burst_mode_get(struct rte_eth_dev *dev, + __rte_unused uint16_t queue_id, + struct rte_eth_burst_mode *mode) +{ + struct rte_eth_conf *eth_conf = &dev->data->dev_conf; + int ret = -EINVAL; + unsigned int i; + const struct burst_info { + uint64_t flags; + const char *output; + } rx_offload_map[] = { + {DEV_RX_OFFLOAD_CHECKSUM, " Checksum,"}, + {DEV_RX_OFFLOAD_SCTP_CKSUM, " SCTP csum,"}, + {DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM, " Outer IPV4 csum,"}, + {DEV_RX_OFFLOAD_OUTER_UDP_CKSUM, " Outer UDP csum,"}, + {DEV_RX_OFFLOAD_VLAN_STRIP, " VLAN strip,"}, + {DEV_RX_OFFLOAD_VLAN_FILTER, " VLAN filter,"}, + {DEV_RX_OFFLOAD_JUMBO_FRAME, " Jumbo frame,"}, + {DEV_RX_OFFLOAD_TIMESTAMP, " Timestamp,"}, + {DEV_RX_OFFLOAD_RSS_HASH, " RSS,"}, + {DEV_RX_OFFLOAD_SCATTER, " Scattered,"} + }; + + /* Update Rx offload info */ + for (i = 0; i < RTE_DIM(rx_offload_map); i++) { + if (eth_conf->rxmode.offloads & rx_offload_map[i].flags) { + snprintf(mode->info, sizeof(mode->info), "%s", + rx_offload_map[i].output); + ret = 0; + break; + } + } + return ret; +} + +static int +dpaa2_dev_tx_burst_mode_get(struct rte_eth_dev *dev, + __rte_unused uint16_t queue_id, + struct rte_eth_burst_mode *mode) +{ + struct rte_eth_conf *eth_conf = &dev->data->dev_conf; + int ret = -EINVAL; + unsigned int i; + const struct burst_info { + uint64_t flags; + const char *output; + } tx_offload_map[] = { + {DEV_TX_OFFLOAD_VLAN_INSERT, " VLAN Insert,"}, + {DEV_TX_OFFLOAD_IPV4_CKSUM, " IPV4 csum,"}, + {DEV_TX_OFFLOAD_UDP_CKSUM, " UDP csum,"}, + {DEV_TX_OFFLOAD_TCP_CKSUM, " TCP csum,"}, + {DEV_TX_OFFLOAD_SCTP_CKSUM, " SCTP csum,"}, + {DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM, " Outer IPV4 csum,"}, + {DEV_TX_OFFLOAD_MT_LOCKFREE, " MT lockfree,"}, + {DEV_TX_OFFLOAD_MBUF_FAST_FREE, " MBUF free disable,"}, + {DEV_TX_OFFLOAD_MULTI_SEGS, " Scattered,"} + }; + + /* Update Tx offload info */ + for (i = 0; i < RTE_DIM(tx_offload_map); i++) { + if (eth_conf->txmode.offloads & tx_offload_map[i].flags) { + snprintf(mode->info, sizeof(mode->info), "%s", + tx_offload_map[i].output); + ret = 0; + break; + } + } + return ret; +} + static int dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev) { @@ -2206,6 +2277,8 @@ static struct eth_dev_ops dpaa2_ethdev_ops = { .rx_queue_release = dpaa2_dev_rx_queue_release, .tx_queue_setup = dpaa2_dev_tx_queue_setup, .tx_queue_release = dpaa2_dev_tx_queue_release, + .rx_burst_mode_get = dpaa2_dev_rx_burst_mode_get, + .tx_burst_mode_get = dpaa2_dev_tx_burst_mode_get, .rx_queue_count = dpaa2_dev_rx_queue_count, .flow_ctrl_get = dpaa2_flow_ctrl_get, .flow_ctrl_set = dpaa2_flow_ctrl_set, From patchwork Fri Jul 10 16:21:33 2020 Content-Type: text/plain; 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Fri, 10 Jul 2020 18:25:57 +0200 (CEST) Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id A1407402E3; Sat, 11 Jul 2020 00:25:54 +0800 (SGT) From: Hemant Agrawal To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Hemant Agrawal Date: Fri, 10 Jul 2020 21:51:33 +0530 Message-Id: <20200710162137.22973-5-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200710162137.22973-1-hemant.agrawal@nxp.com> References: <20200710162137.22973-1-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 5/9] net/dpaa: report error on using deferred start X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch add support to report on error for rx and tx deferred start config Signed-off-by: Hemant Agrawal --- drivers/net/dpaa/dpaa_ethdev.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c index 62ecb112f..ea178f4d4 100644 --- a/drivers/net/dpaa/dpaa_ethdev.c +++ b/drivers/net/dpaa/dpaa_ethdev.c @@ -723,7 +723,7 @@ static int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, uint16_t nb_desc, unsigned int socket_id __rte_unused, - const struct rte_eth_rxconf *rx_conf __rte_unused, + const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mp) { struct dpaa_if *dpaa_intf = dev->data->dev_private; @@ -743,6 +743,12 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, return -rte_errno; } + /* Rx deferred start is not supported */ + if (rx_conf->rx_deferred_start) { + DPAA_PMD_ERR("%p:Rx deferred start not supported", (void *)dev); + return -EINVAL; + } + DPAA_PMD_INFO("Rx queue setup for queue index: %d fq_id (0x%x)", queue_idx, rxq->fqid); @@ -1006,12 +1012,17 @@ static int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, uint16_t nb_desc __rte_unused, unsigned int socket_id __rte_unused, - const struct rte_eth_txconf *tx_conf __rte_unused) + const struct rte_eth_txconf *tx_conf) { struct dpaa_if *dpaa_intf = dev->data->dev_private; PMD_INIT_FUNC_TRACE(); + /* Tx deferred start is not supported */ + if (tx_conf->tx_deferred_start) { + DPAA_PMD_ERR("%p:Tx deferred start not supported", (void *)dev); + return -EINVAL; + } if (queue_idx >= dev->data->nb_tx_queues) { rte_errno = EOVERFLOW; DPAA_PMD_ERR("%p: queue index out of range (%u >= %u)", From patchwork Fri Jul 10 16:21:34 2020 Content-Type: text/plain; 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[92.243.14.124]) by mx.google.com with ESMTP id dt5si5598503ejc.335.2020.07.10.09.26.41; Fri, 10 Jul 2020 09:26:42 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BFEDD1DC43; Fri, 10 Jul 2020 18:26:05 +0200 (CEST) Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) by dpdk.org (Postfix) with ESMTP id A42191D9EA for ; Fri, 10 Jul 2020 18:25:59 +0200 (CEST) Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 8B9632017EF; Fri, 10 Jul 2020 18:25:59 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id DE245201329; Fri, 10 Jul 2020 18:25:57 +0200 (CEST) Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 5577F402F0; Sat, 11 Jul 2020 00:25:55 +0800 (SGT) From: Hemant Agrawal To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Hemant Agrawal Date: Fri, 10 Jul 2020 21:51:34 +0530 Message-Id: <20200710162137.22973-6-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200710162137.22973-1-hemant.agrawal@nxp.com> References: <20200710162137.22973-1-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 6/9] net/dpaa2: report error on queue deferred start X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch add support to reports errors on configuring deferred start for rx or tx queues. Signed-off-by: Hemant Agrawal --- drivers/net/dpaa2/dpaa2_ethdev.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c index a7195f6c1..701a6ca68 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.c +++ b/drivers/net/dpaa2/dpaa2_ethdev.c @@ -649,7 +649,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id, uint16_t nb_rx_desc, unsigned int socket_id __rte_unused, - const struct rte_eth_rxconf *rx_conf __rte_unused, + const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mb_pool) { struct dpaa2_dev_priv *priv = dev->data->dev_private; @@ -666,6 +666,13 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev, DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p", dev, rx_queue_id, mb_pool, rx_conf); + /* Rx deferred start is not supported */ + if (rx_conf->rx_deferred_start) { + DPAA2_PMD_ERR("%p:Rx deferred start not supported", + (void *)dev); + return -EINVAL; + } + if (!priv->bp_list || priv->bp_list->mp != mb_pool) { bpid = mempool_to_bpid(mb_pool); ret = dpaa2_attach_bp_list(priv, @@ -794,7 +801,7 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, uint16_t nb_tx_desc __rte_unused, unsigned int socket_id __rte_unused, - const struct rte_eth_txconf *tx_conf __rte_unused) + const struct rte_eth_txconf *tx_conf) { struct dpaa2_dev_priv *priv = dev->data->dev_private; struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *) @@ -811,6 +818,13 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, PMD_INIT_FUNC_TRACE(); + /* Tx deferred start is not supported */ + if (tx_conf->tx_deferred_start) { + DPAA2_PMD_ERR("%p:Tx deferred start not supported", + (void *)dev); + return -EINVAL; + } + /* Return if queue already configured */ if (dpaa2_q->flow_id != 0xffff) { dev->data->tx_queues[tx_queue_id] = dpaa2_q; From patchwork Fri Jul 10 16:21:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 235253 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp602911ilg; Fri, 10 Jul 2020 09:26:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwTs/g0Wn5Xyp9i40tHWxv2owv+T5J+eXN2fO3dRc6nWwUJGKZNRTorUoKumTxnUG7i2y95 X-Received: by 2002:a17:906:7e04:: with SMTP id e4mr54696167ejr.83.1594398410689; Fri, 10 Jul 2020 09:26:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594398410; cv=none; d=google.com; s=arc-20160816; b=q9t33DOvvhdvmuZ7jHPRWaH+Z84TWJGf3tEsRxsVg+O8gPHekwDTyVOhhC2P+6YTgt OwKTwELqqi4Epmmyeqs9TEoGJ2/JPDvdHi2gtISV3IkZSJOuUu4A/dH/JiQqjBgmKj0B 6bDJKpL3HPBAulHPa5tHoukvj0G9uip0XXDMNITPHKSnKhA2cQRGjwLDm14U44XrjNKN qVB2KjOP5wyvccYBTXKE41EAuOuyNxaOHn89ZdWnYa9Sswp6CCtVxICDQyaItL5rTcE+ wqv+tSAYpnYcgxzF3eqHjD04LjPFcGVdKdzRyHEKJPhQ268L/U2mhvuY7NuWi4t078+D uDSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:cc:to:from; bh=YqvsbnNsm+d+HeWh0YfHQFksXg9iRhrt4f52V41n094=; b=beIzxY3Iu9wIB0ykU5vo4a9vxtqekbCkmN+kH6Wz2T3fQ1s4yjeNtTOIBZuGBcaAxG UEBj4js2svSDZ21B70dUqwkSTXrDR9rz7IfBR+Y6Y0eSRrlXRO/09VUYuU7sWHiWX45f vDAqil71dAk8/R34X0UdM8JZdcH6KBbeVfNOsE03Rns345VJ19hj+NWB1M0alBblgw6p wpYIw2yOYuiF80YTtQCQ+eTz7MBq8NiGtDFgM0jU05vksHg5zGVgv2IvoMkgOpQbzz4f MBrIpnftjw2rBwfSkt83Q4jXIbJaTAH5chFGdcw62nuLL3PJnSJA8rUxO3RK3kKmN+D4 ytJw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from dpdk.org (dpdk.org. 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Fri, 10 Jul 2020 18:25:58 +0200 (CEST) Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 090A4402F7; Sat, 11 Jul 2020 00:25:55 +0800 (SGT) From: Hemant Agrawal To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Hemant Agrawal Date: Fri, 10 Jul 2020 21:51:35 +0530 Message-Id: <20200710162137.22973-7-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200710162137.22973-1-hemant.agrawal@nxp.com> References: <20200710162137.22973-1-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 7/9] net/dpaa2: add support to use Tx Queue desc size X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support to use Tx queue desc size to configure congestion notification on TX queue Signed-off-by: Hemant Agrawal --- drivers/net/dpaa2/dpaa2_ethdev.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c index 701a6ca68..33d52efd7 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.c +++ b/drivers/net/dpaa2/dpaa2_ethdev.c @@ -799,7 +799,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev, static int dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id, - uint16_t nb_tx_desc __rte_unused, + uint16_t nb_tx_desc, unsigned int socket_id __rte_unused, const struct rte_eth_txconf *tx_conf) { @@ -879,11 +879,11 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, struct dpni_congestion_notification_cfg cong_notif_cfg = {0}; cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES; - cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD; + cong_notif_cfg.threshold_entry = nb_tx_desc; /* Notify that the queue is not congested when the data in * the queue is below this thershold. */ - cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD; + cong_notif_cfg.threshold_exit = nb_tx_desc - 24; cong_notif_cfg.message_ctx = 0; cong_notif_cfg.message_iova = (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn); From patchwork Fri Jul 10 16:21:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 235254 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp603031ilg; Fri, 10 Jul 2020 09:26:59 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwTBoD1ttWLutGDPjcF/zIUIXiB89D/uhWnAX/dPADErkyhV/k0t9sCaGm73d53+O0dHH5j X-Received: by 2002:a05:6402:1d35:: with SMTP id dh21mr74312560edb.186.1594398419152; Fri, 10 Jul 2020 09:26:59 -0700 (PDT) ARC-Seal: i=1; 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Fri, 10 Jul 2020 18:25:59 +0200 (CEST) Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id B3102402AE; Sat, 11 Jul 2020 00:25:56 +0800 (SGT) From: Hemant Agrawal To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Hemant Agrawal Date: Fri, 10 Jul 2020 21:51:36 +0530 Message-Id: <20200710162137.22973-8-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200710162137.22973-1-hemant.agrawal@nxp.com> References: <20200710162137.22973-1-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 8/9] net/dpaa2: support Rxq and Txq info routines X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch add support for rxq_info_get and txq_info_get Signed-off-by: Hemant Agrawal --- drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 7 ++-- drivers/net/dpaa2/dpaa2_ethdev.c | 48 ++++++++++++++++++++++++- 2 files changed, 52 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h index be48462dd..35423df12 100644 --- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h +++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h @@ -167,13 +167,16 @@ struct dpaa2_queue { struct qbman_result *cscn; }; struct rte_event ev; - int32_t eventfd; /*!< Event Fd of this queue */ dpaa2_queue_cb_dqrr_t *cb; dpaa2_queue_cb_eqresp_free_t *cb_eqresp_free; struct dpaa2_bp_info *bp_array; /*to store tx_conf_queue corresponding to tx_queue*/ struct dpaa2_queue *tx_conf_queue; -}; + int32_t eventfd; /*!< Event Fd of this queue */ + uint16_t nb_desc; + uint16_t resv; + uint64_t offloads; +} __rte_cache_aligned; struct swp_active_dqs { struct qbman_result *global_active_dqs; diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c index 33d52efd7..3bd435b45 100644 --- a/drivers/net/dpaa2/dpaa2_ethdev.c +++ b/drivers/net/dpaa2/dpaa2_ethdev.c @@ -683,6 +683,8 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev, dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id]; dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */ dpaa2_q->bp_array = rte_dpaa2_bpid_info; + dpaa2_q->nb_desc = UINT16_MAX; + dpaa2_q->offloads = rx_conf->offloads; /*Get the flow id from given VQ id*/ flow_id = dpaa2_q->flow_id; @@ -735,7 +737,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev, struct dpni_taildrop taildrop; taildrop.enable = 1; - + dpaa2_q->nb_desc = nb_rx_desc; /* Private CGR will use tail drop length as nb_rx_desc. * for rest cases we can use standard byte based tail drop. * There is no HW restriction, but number of CGRs are limited, @@ -825,6 +827,9 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, return -EINVAL; } + dpaa2_q->nb_desc = UINT16_MAX; + dpaa2_q->offloads = tx_conf->offloads; + /* Return if queue already configured */ if (dpaa2_q->flow_id != 0xffff) { dev->data->tx_queues[tx_queue_id] = dpaa2_q; @@ -878,6 +883,8 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev, if (!(priv->flags & DPAA2_TX_CGR_OFF)) { struct dpni_congestion_notification_cfg cong_notif_cfg = {0}; + dpaa2_q->nb_desc = nb_tx_desc; + cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES; cong_notif_cfg.threshold_entry = nb_tx_desc; /* Notify that the queue is not congested when the data in @@ -2261,6 +2268,43 @@ dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev, return ret; } +static void +dpaa2_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_rxq_info *qinfo) +{ + struct dpaa2_queue *rxq; + + rxq = (struct dpaa2_queue *)dev->data->rx_queues[queue_id]; + + qinfo->mp = rxq->mb_pool; + qinfo->scattered_rx = dev->data->scattered_rx; + qinfo->nb_desc = rxq->nb_desc; + + qinfo->conf.rx_free_thresh = 1; + qinfo->conf.rx_drop_en = 1; + qinfo->conf.rx_deferred_start = 0; + qinfo->conf.offloads = rxq->offloads; +} + +static void +dpaa2_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_txq_info *qinfo) +{ + struct dpaa2_queue *txq; + + txq = dev->data->tx_queues[queue_id]; + + qinfo->nb_desc = txq->nb_desc; + qinfo->conf.tx_thresh.pthresh = 0; + qinfo->conf.tx_thresh.hthresh = 0; + qinfo->conf.tx_thresh.wthresh = 0; + + qinfo->conf.tx_free_thresh = 0; + qinfo->conf.tx_rs_thresh = 0; + qinfo->conf.offloads = txq->offloads; + qinfo->conf.tx_deferred_start = 0; +} + static struct eth_dev_ops dpaa2_ethdev_ops = { .dev_configure = dpaa2_eth_dev_configure, .dev_start = dpaa2_dev_start, @@ -2302,6 +2346,8 @@ static struct eth_dev_ops dpaa2_ethdev_ops = { .rss_hash_update = dpaa2_dev_rss_hash_update, .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get, .filter_ctrl = dpaa2_dev_flow_ctrl, + .rxq_info_get = dpaa2_rxq_info_get, + .txq_info_get = dpaa2_txq_info_get, #if defined(RTE_LIBRTE_IEEE1588) .timesync_enable = dpaa2_timesync_enable, .timesync_disable = dpaa2_timesync_disable, From patchwork Fri Jul 10 16:21:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hemant Agrawal X-Patchwork-Id: 235255 Delivered-To: patch@linaro.org Received: by 2002:a92:d244:0:0:0:0:0 with SMTP id v4csp603155ilg; Fri, 10 Jul 2020 09:27:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxeIxdH1KahXP5sKIuJkPNq653vuIAjH9WvmPev7xE4/Q97TAa0/iuZ38+9PONkySH64Pvl X-Received: by 2002:a50:fd07:: with SMTP id i7mr44075215eds.221.1594398428525; Fri, 10 Jul 2020 09:27:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1594398428; cv=none; d=google.com; s=arc-20160816; b=uv8x9kXrphzbbYOAXGzmjB+yNfqkO2FzkAZF7odPuP0YCPiJ3jwLAY31twkG4AeZ2x Ye4VSXDXXj15DrmQdu7HkCT5Dn8x/Kkz6uJT6I37f2hbUj/qqyEtWMs3+xL/rri8wtUf tkzlSMCjKwdXcDf2Of2UiJJB5rxAIQJw/FzgbEe6wKa5GDZZXyNR4LAfjLG/bcVlFt1Q IZb+NUF5qkGve/Cxn5Upz4H14oPzX56BbxdVZfw0+/Gz9h23DJakBqqePEWjWSopEKaC VeHcfZMys1wLrtz6g4U67T8YGpPqujUqgwhQlLyyi76m12XdgGaA5Q6NlLkbhG5dMSrF 8klA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; 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[92.243.14.124]) by mx.google.com with ESMTP id b24si4057592edw.188.2020.07.10.09.27.08; Fri, 10 Jul 2020 09:27:08 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8B2561DD43; Fri, 10 Jul 2020 18:26:10 +0200 (CEST) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) by dpdk.org (Postfix) with ESMTP id 984BD1DA05 for ; Fri, 10 Jul 2020 18:26:01 +0200 (CEST) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 76C2E1A04AF; Fri, 10 Jul 2020 18:26:01 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 937E51A04BF; Fri, 10 Jul 2020 18:25:59 +0200 (CEST) Received: from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net [10.232.133.63]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 6426540305; Sat, 11 Jul 2020 00:25:57 +0800 (SGT) From: Hemant Agrawal To: dev@dpdk.org Cc: ferruh.yigit@intel.com, Hemant Agrawal Date: Fri, 10 Jul 2020 21:51:37 +0530 Message-Id: <20200710162137.22973-9-hemant.agrawal@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200710162137.22973-1-hemant.agrawal@nxp.com> References: <20200710162137.22973-1-hemant.agrawal@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Subject: [dpdk-dev] [PATCH 9/9] net/dpaa: support Rxq and Txq info routines X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch add support for rxq_info_get and txq_info_get Signed-off-by: Hemant Agrawal --- drivers/bus/dpaa/include/fsl_qman.h | 3 ++ drivers/net/dpaa/dpaa_ethdev.c | 51 +++++++++++++++++++++++++++-- 2 files changed, 52 insertions(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h index 0d9cfc339..8ba37411a 100644 --- a/drivers/bus/dpaa/include/fsl_qman.h +++ b/drivers/bus/dpaa/include/fsl_qman.h @@ -1251,6 +1251,9 @@ struct qman_fq { void **qman_fq_lookup_table; u32 key; #endif + u16 nb_desc; + u16 resv; + u64 offloads; }; /* diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c index ea178f4d4..c15e2b546 100644 --- a/drivers/net/dpaa/dpaa_ethdev.c +++ b/drivers/net/dpaa/dpaa_ethdev.c @@ -748,6 +748,8 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, DPAA_PMD_ERR("%p:Rx deferred start not supported", (void *)dev); return -EINVAL; } + rxq->nb_desc = UINT16_MAX; + rxq->offloads = rx_conf->offloads; DPAA_PMD_INFO("Rx queue setup for queue index: %d fq_id (0x%x)", queue_idx, rxq->fqid); @@ -895,6 +897,7 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, if (dpaa_intf->cgr_rx) { struct qm_mcc_initcgr cgr_opts = {0}; + rxq->nb_desc = nb_desc; /* Enable tail drop with cgr on this queue */ qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, nb_desc, 0); ret = qman_modify_cgr(dpaa_intf->cgr_rx, 0, &cgr_opts); @@ -1015,6 +1018,7 @@ int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, const struct rte_eth_txconf *tx_conf) { struct dpaa_if *dpaa_intf = dev->data->dev_private; + struct qman_fq *txq = &dpaa_intf->tx_queues[queue_idx]; PMD_INIT_FUNC_TRACE(); @@ -1023,6 +1027,9 @@ int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, DPAA_PMD_ERR("%p:Tx deferred start not supported", (void *)dev); return -EINVAL; } + txq->nb_desc = UINT16_MAX; + txq->offloads = tx_conf->offloads; + if (queue_idx >= dev->data->nb_tx_queues) { rte_errno = EOVERFLOW; DPAA_PMD_ERR("%p: queue index out of range (%u >= %u)", @@ -1031,8 +1038,8 @@ int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, } DPAA_PMD_INFO("Tx queue setup for queue index: %d fq_id (0x%x)", - queue_idx, dpaa_intf->tx_queues[queue_idx].fqid); - dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx]; + queue_idx, txq->fqid); + dev->data->tx_queues[queue_idx] = txq; return 0; } @@ -1247,6 +1254,43 @@ static int dpaa_dev_queue_intr_disable(struct rte_eth_dev *dev, return 0; } +static void +dpaa_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_rxq_info *qinfo) +{ + struct dpaa_if *dpaa_intf = dev->data->dev_private; + struct qman_fq *rxq; + + rxq = dev->data->rx_queues[queue_id]; + + qinfo->mp = dpaa_intf->bp_info->mp; + qinfo->scattered_rx = dev->data->scattered_rx; + qinfo->nb_desc = rxq->nb_desc; + qinfo->conf.rx_free_thresh = 1; + qinfo->conf.rx_drop_en = 1; + qinfo->conf.rx_deferred_start = 0; + qinfo->conf.offloads = rxq->offloads; +} + +static void +dpaa_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_txq_info *qinfo) +{ + struct qman_fq *txq; + + txq = dev->data->tx_queues[queue_id]; + + qinfo->nb_desc = txq->nb_desc; + qinfo->conf.tx_thresh.pthresh = 0; + qinfo->conf.tx_thresh.hthresh = 0; + qinfo->conf.tx_thresh.wthresh = 0; + + qinfo->conf.tx_free_thresh = 0; + qinfo->conf.tx_rs_thresh = 0; + qinfo->conf.offloads = txq->offloads; + qinfo->conf.tx_deferred_start = 0; +} + static struct eth_dev_ops dpaa_devops = { .dev_configure = dpaa_eth_dev_configure, .dev_start = dpaa_eth_dev_start, @@ -1262,6 +1306,9 @@ static struct eth_dev_ops dpaa_devops = { .rx_queue_count = dpaa_dev_rx_queue_count, .rx_burst_mode_get = dpaa_dev_rx_burst_mode_get, .tx_burst_mode_get = dpaa_dev_tx_burst_mode_get, + .rxq_info_get = dpaa_rxq_info_get, + .txq_info_get = dpaa_txq_info_get, + .flow_ctrl_get = dpaa_flow_ctrl_get, .flow_ctrl_set = dpaa_flow_ctrl_set,