From patchwork Thu Feb 9 19:26:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Lloyd X-Patchwork-Id: 93777 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp159548qgi; Thu, 9 Feb 2017 11:26:39 -0800 (PST) X-Received: by 10.98.217.209 with SMTP id b78mr5421860pfl.53.1486668399153; Thu, 09 Feb 2017 11:26:39 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id 140si10898617pgg.95.2017.02.09.11.26.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 Feb 2017 11:26:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id A5C3C81FF5; Thu, 9 Feb 2017 11:26:34 -0800 (PST) X-Original-To: edk2-devel@ml01.01.org Delivered-To: edk2-devel@ml01.01.org Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id EA73281F3D for ; Thu, 9 Feb 2017 11:26:31 -0800 (PST) Received: from E107800.Emea.Arm.com (e107800.emea.arm.com [10.1.31.76]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id v19JQSog006780; Thu, 9 Feb 2017 19:26:29 GMT From: evan.lloyd@arm.com To: edk2-devel@ml01.01.org Date: Thu, 9 Feb 2017 19:26:20 +0000 Message-Id: <20170209192623.262044-2-evan.lloyd@arm.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20170209192623.262044-1-evan.lloyd@arm.com> References: <20170209192623.262044-1-evan.lloyd@arm.com> Subject: [edk2] [PATCH 1/4] EmbeddedPkg: introduce HardwareInterrupt2 protocol X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ryan Harkin , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Ard Biesheuvel The existing HardwareInterrupt protocol lacks the method to configure the level/edge and polarity properties of an interrupt. So introduce a new protocol HardwareInterrupt2, and add some new members that allow the manipulation of those properties. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Signed-off-by: Girish Pathak Signed-off-by: Evan Lloyd Tested-by: Girish Pathak --- EmbeddedPkg/EmbeddedPkg.dec | 1 + EmbeddedPkg/Include/Protocol/HardwareInterrupt2.h | 181 ++++++++++++++++++++ 2 files changed, 182 insertions(+) -- Guid("CE165669-3EF3-493F-B85D-6190EE5B9759") _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/EmbeddedPkg/EmbeddedPkg.dec b/EmbeddedPkg/EmbeddedPkg.dec index 2c2cf41103c282103c2a83ad9a105d0f6ac2e9a3..2464f715e68c8e0eb1214c0170fb040830b88f06 100644 --- a/EmbeddedPkg/EmbeddedPkg.dec +++ b/EmbeddedPkg/EmbeddedPkg.dec @@ -58,6 +58,7 @@ [Guids.common] [Protocols.common] gHardwareInterruptProtocolGuid = { 0x2890B3EA, 0x053D, 0x1643, { 0xAD, 0x0C, 0xD6, 0x48, 0x08, 0xDA, 0x3F, 0xF1 } } + gHardwareInterrupt2ProtocolGuid = { 0x32898322, 0x2da1, 0x474a, { 0xba, 0xaa, 0xf3, 0xf7, 0xcf, 0x56, 0x94, 0x70 } } gEfiDebugSupportPeriodicCallbackProtocolGuid = { 0x9546e07c, 0x2cbb, 0x4c88, { 0x98, 0x6c, 0xcd, 0x34, 0x10, 0x86, 0xf0, 0x44 } } gEfiEblAddCommandProtocolGuid = { 0xaeda2428, 0x9a22, 0x4637, { 0x9b, 0x21, 0x54, 0x5e, 0x28, 0xfb, 0xb8, 0x29 } } gEmbeddedDeviceGuid = { 0xbf4b9d10, 0x13ec, 0x43dd, { 0x88, 0x80, 0xe9, 0xb, 0x71, 0x8f, 0x27, 0xde } } diff --git a/EmbeddedPkg/Include/Protocol/HardwareInterrupt2.h b/EmbeddedPkg/Include/Protocol/HardwareInterrupt2.h new file mode 100644 index 0000000000000000000000000000000000000000..61acdaac4341951b8c1916858490a815cf94dc99 --- /dev/null +++ b/EmbeddedPkg/Include/Protocol/HardwareInterrupt2.h @@ -0,0 +1,181 @@ +/** @file + + Copyright (c) 2016, Linaro Ltd. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __HARDWARE_INTERRUPT2_H__ +#define __HARDWARE_INTERRUPT2_H__ + +#include + +// 22838932-1a2d-4a47-aaba-f3f7cf569470 + +#define EFI_HARDWARE_INTERRUPT2_PROTOCOL_GUID \ + { 0x32898322, 0x2da1, 0x474a, { 0xba, 0xaa, 0xf3, 0xf7, 0xcf, 0x56, 0x94, 0x70 } } + +typedef enum { + EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_LOW, + EFI_HARDWARE_INTERRUPT2_TRIGGER_LEVEL_HIGH, + EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_FALLING, + EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING, +} EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE; + +typedef struct _EFI_HARDWARE_INTERRUPT2_PROTOCOL EFI_HARDWARE_INTERRUPT2_PROTOCOL; + +/** + Register Handler for the specified interrupt source. + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + @param Handler Callback for interrupt. NULL to unregister + + @retval EFI_SUCCESS Source was updated to support Handler. + @retval EFI_DEVICE_ERROR Hardware could not be programmed. + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_REGISTER) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source, + IN HARDWARE_INTERRUPT_HANDLER Handler + ); + + +/** + Enable interrupt source Source. + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + + @retval EFI_SUCCESS Source interrupt enabled. + @retval EFI_DEVICE_ERROR Hardware could not be programmed. + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_ENABLE) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source + ); + + + +/** + Disable interrupt source Source. + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + + @retval EFI_SUCCESS Source interrupt disabled. + @retval EFI_DEVICE_ERROR Hardware could not be programmed. + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_DISABLE) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source + ); + + +/** + Return current state of interrupt source Source. + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + @param InterruptState TRUE: source enabled, FALSE: source disabled. + + @retval EFI_SUCCESS InterruptState is valid + @retval EFI_DEVICE_ERROR InterruptState is not valid + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_INTERRUPT_STATE) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source, + IN BOOLEAN *InterruptState + ); + +/** + Signal to the hardware that the End Of Intrrupt state + has been reached. + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + + @retval EFI_SUCCESS Source interrupt EOI'ed. + @retval EFI_DEVICE_ERROR Hardware could not be programmed. + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_END_OF_INTERRUPT) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source + ); + +/** + Return the configured trigger type for an interrupt source + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + @param TriggerType The configured trigger type + + @retval EFI_SUCCESS Operation successful + @retval EFI_DEVICE_ERROR Information could not be returned + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_GET_TRIGGER_TYPE) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source, + OUT EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE *TriggerType + ); + + +/** + Configure the trigger type for an interrupt source + + @param This Instance pointer for this protocol + @param Source Hardware source of the interrupt + @param TriggerType The trigger type to configure + + @retval EFI_SUCCESS Operation successful + @retval EFI_DEVICE_ERROR Hardware could not be programmed. + +**/ +typedef +EFI_STATUS +(EFIAPI *HARDWARE_INTERRUPT2_SET_TRIGGER_TYPE) ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source, + IN EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE TriggerType + ); + +struct _EFI_HARDWARE_INTERRUPT2_PROTOCOL { + HARDWARE_INTERRUPT2_REGISTER RegisterInterruptSource; + HARDWARE_INTERRUPT2_ENABLE EnableInterruptSource; + HARDWARE_INTERRUPT2_DISABLE DisableInterruptSource; + HARDWARE_INTERRUPT2_INTERRUPT_STATE GetInterruptSourceState; + HARDWARE_INTERRUPT2_END_OF_INTERRUPT EndOfInterrupt; + + // v2 members + HARDWARE_INTERRUPT2_GET_TRIGGER_TYPE GetTriggerType; + HARDWARE_INTERRUPT2_SET_TRIGGER_TYPE SetTriggerType; +}; + +extern EFI_GUID gHardwareInterrupt2ProtocolGuid; + +#endif From patchwork Thu Feb 9 19:26:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Lloyd X-Patchwork-Id: 93775 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp159508qgi; Thu, 9 Feb 2017 11:26:33 -0800 (PST) X-Received: by 10.99.163.109 with SMTP id v45mr5751517pgn.39.1486668393777; Thu, 09 Feb 2017 11:26:33 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id a85si10907510pfe.100.2017.02.09.11.26.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 Feb 2017 11:26:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 06C9181F3D; Thu, 9 Feb 2017 11:26:33 -0800 (PST) X-Original-To: edk2-devel@ml01.01.org Delivered-To: edk2-devel@ml01.01.org Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id BBA8481F39 for ; Thu, 9 Feb 2017 11:26:31 -0800 (PST) Received: from E107800.Emea.Arm.com (e107800.emea.arm.com [10.1.31.76]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id v19JQSoh006780; Thu, 9 Feb 2017 19:26:29 GMT From: evan.lloyd@arm.com To: edk2-devel@ml01.01.org Date: Thu, 9 Feb 2017 19:26:21 +0000 Message-Id: <20170209192623.262044-3-evan.lloyd@arm.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20170209192623.262044-1-evan.lloyd@arm.com> References: <20170209192623.262044-1-evan.lloyd@arm.com> Subject: [edk2] [PATCH 2/4] ArmPkg/ArmGicDxe: expose HardwareInterrupt2 protocol X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ryan Harkin , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Ard Biesheuvel Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Signed-off-by: Girish Pathak Signed-off-by: Evan Lloyd Tested-by: Girish Pathak --- ArmPkg/Drivers/ArmGic/ArmGicDxe.inf | 1 + ArmPkg/Drivers/ArmGic/ArmGicDxe.h | 2 ++ ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c | 2 ++ ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 38 +++++++++++++++++++- ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c | 37 ++++++++++++++++++- 5 files changed, 78 insertions(+), 2 deletions(-) -- Guid("CE165669-3EF3-493F-B85D-6190EE5B9759") _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf b/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf index e554301c4b28022c805f69242cf6ee979d19abc2..69390638a9afb6aeccad510e7b572450568c1409 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf +++ b/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf @@ -48,6 +48,7 @@ [LibraryClasses] [Protocols] gHardwareInterruptProtocolGuid + gHardwareInterrupt2ProtocolGuid gEfiCpuArchProtocolGuid [Pcd.common] diff --git a/ArmPkg/Drivers/ArmGic/ArmGicDxe.h b/ArmPkg/Drivers/ArmGic/ArmGicDxe.h index af33aa90b00c6775e10a831d63ed707394862362..2633e1ea194fa67511861a4165d54dad99a6f39b 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicDxe.h +++ b/ArmPkg/Drivers/ArmGic/ArmGicDxe.h @@ -24,6 +24,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include #include +#include extern UINTN mGicNumInterrupts; extern HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers; @@ -34,6 +35,7 @@ extern HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers; EFI_STATUS InstallAndRegisterInterruptService ( IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol, + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol, IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler, IN EFI_EVENT_NOTIFY ExitBootServicesEvent ); diff --git a/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c b/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c index be77b8361c5af033fd2889cdb48902af867f321d..ef6746f1ad7afba5bba30fc17774987cf17121b6 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c @@ -88,6 +88,7 @@ RegisterInterruptSource ( EFI_STATUS InstallAndRegisterInterruptService ( IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol, + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol, IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler, IN EFI_EVENT_NOTIFY ExitBootServicesEvent ) @@ -104,6 +105,7 @@ InstallAndRegisterInterruptService ( Status = gBS->InstallMultipleProtocolInterfaces ( &gHardwareInterruptHandle, &gHardwareInterruptProtocolGuid, InterruptProtocol, + &gHardwareInterrupt2ProtocolGuid, Interrupt2Protocol, NULL ); if (EFI_ERROR (Status)) { diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c index b9ecd5543a3e2e0b00fffbcf5543a60567bb5dde..8c4d66125e2e8c7af9898f336ee742ed0aebf058 100644 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c +++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c @@ -193,6 +193,41 @@ EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol = { GicV2EndOfInterrupt }; +STATIC +EFI_STATUS +EFIAPI +GicV2GetTriggerType ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source, + OUT EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE *TriggerType + ) +{ + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +EFIAPI +GicV2SetTriggerType ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source, + IN EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE TriggerType + ) +{ + return EFI_SUCCESS; +} + +STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V2Protocol = { + (HARDWARE_INTERRUPT2_REGISTER)RegisterInterruptSource, + (HARDWARE_INTERRUPT2_ENABLE)GicV2EnableInterruptSource, + (HARDWARE_INTERRUPT2_DISABLE)GicV2DisableInterruptSource, + (HARDWARE_INTERRUPT2_INTERRUPT_STATE)GicV2GetInterruptSourceState, + (HARDWARE_INTERRUPT2_END_OF_INTERRUPT)GicV2EndOfInterrupt, + GicV2GetTriggerType, + GicV2SetTriggerType +}; + + /** Shutdown our hardware @@ -311,7 +346,8 @@ GicV2DxeInitialize ( ArmGicEnableDistributor (mGicDistributorBase); Status = InstallAndRegisterInterruptService ( - &gHardwareInterruptV2Protocol, GicV2IrqInterruptHandler, GicV2ExitBootServicesEvent); + &gHardwareInterruptV2Protocol, &gHardwareInterrupt2V2Protocol, + GicV2IrqInterruptHandler, GicV2ExitBootServicesEvent); return Status; } diff --git a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c index 8af97a93b1889b33978a7c7fb2a8417c83139142..02deeef78b6d7737172a5992c6decac43cfdd64a 100644 --- a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c +++ b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c @@ -184,6 +184,40 @@ EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol = { GicV3EndOfInterrupt }; +STATIC +EFI_STATUS +EFIAPI +GicV3GetTriggerType ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source, + OUT EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE *TriggerType + ) +{ + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +EFIAPI +GicV3SetTriggerType ( + IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *This, + IN HARDWARE_INTERRUPT_SOURCE Source, + IN EFI_HARDWARE_INTERRUPT2_TRIGGER_TYPE TriggerType + ) +{ + return EFI_SUCCESS; +} + +STATIC EFI_HARDWARE_INTERRUPT2_PROTOCOL gHardwareInterrupt2V3Protocol = { + (HARDWARE_INTERRUPT2_REGISTER)RegisterInterruptSource, + (HARDWARE_INTERRUPT2_ENABLE)GicV3EnableInterruptSource, + (HARDWARE_INTERRUPT2_DISABLE)GicV3DisableInterruptSource, + (HARDWARE_INTERRUPT2_INTERRUPT_STATE)GicV3GetInterruptSourceState, + (HARDWARE_INTERRUPT2_END_OF_INTERRUPT)GicV3EndOfInterrupt, + GicV3GetTriggerType, + GicV3SetTriggerType +}; + /** Shutdown our hardware @@ -331,7 +365,8 @@ GicV3DxeInitialize ( ArmGicEnableDistributor (mGicDistributorBase); Status = InstallAndRegisterInterruptService ( - &gHardwareInterruptV3Protocol, GicV3IrqInterruptHandler, GicV3ExitBootServicesEvent); + &gHardwareInterruptV3Protocol, &gHardwareInterrupt2V3Protocol, + GicV3IrqInterruptHandler, GicV3ExitBootServicesEvent); return Status; } From patchwork Thu Feb 9 19:26:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Evan Lloyd X-Patchwork-Id: 93776 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp159539qgi; Thu, 9 Feb 2017 11:26:36 -0800 (PST) X-Received: by 10.99.135.195 with SMTP id i186mr5735377pge.105.1486668396901; Thu, 09 Feb 2017 11:26:36 -0800 (PST) Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id 82si10901191pge.77.2017.02.09.11.26.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 Feb 2017 11:26:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 6EE7D81F6D; Thu, 9 Feb 2017 11:26:33 -0800 (PST) X-Original-To: edk2-devel@ml01.01.org Delivered-To: edk2-devel@ml01.01.org Received: from cam-smtp0.cambridge.arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 03C1A81F3F for ; Thu, 9 Feb 2017 11:26:31 -0800 (PST) Received: from E107800.Emea.Arm.com (e107800.emea.arm.com [10.1.31.76]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id v19JQSoi006780; Thu, 9 Feb 2017 19:26:29 GMT From: evan.lloyd@arm.com To: edk2-devel@ml01.01.org Date: Thu, 9 Feb 2017 19:26:22 +0000 Message-Id: <20170209192623.262044-4-evan.lloyd@arm.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20170209192623.262044-1-evan.lloyd@arm.com> References: <20170209192623.262044-1-evan.lloyd@arm.com> Subject: [edk2] [PATCH 3/4] ArmPkg/GenericWatchdogDxe: Set Watchdog interrupt type X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ryan Harkin , Leif Lindholm , Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Ard Biesheuvel Utilise the new HardwareInterrupt2 protocol to adjust the Edje/Level characteristics of the Watchdog interrupt. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Signed-off-by: Girish Pathak Signed-off-by: Evan Lloyd Tested-by: Girish Pathak --- ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf | 4 +-- ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c | 27 ++++++++++++-------- 2 files changed, 19 insertions(+), 12 deletions(-) -- Guid("CE165669-3EF3-493F-B85D-6190EE5B9759") _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf index fece14cc18315cd15510680c438288687b60c018..51d5c0042d84333b9fe66547c99a8d8ed987f175 100644 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf +++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf @@ -47,7 +47,7 @@ [Pcd.common] [Protocols] gEfiWatchdogTimerArchProtocolGuid - gHardwareInterruptProtocolGuid + gHardwareInterrupt2ProtocolGuid [Depex] - gHardwareInterruptProtocolGuid + gHardwareInterrupt2ProtocolGuid diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c index 54a1625a32137556b58fa93ddf7fbe4d0f22c786..9ba9bf79c961b52dc9b448039a9186e069fc29f7 100644 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c +++ b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c @@ -25,7 +25,8 @@ #include #include -#include + +#include #include "GenericWatchdog.h" @@ -41,7 +42,7 @@ UINTN mTimerFrequencyHz = 0; // It is therefore stored here. 0 means the timer is not running. UINT64 mNumTimerTicks = 0; -EFI_HARDWARE_INTERRUPT_PROTOCOL *mInterruptProtocol; +EFI_HARDWARE_INTERRUPT2_PROTOCOL *mInterruptProtocol; EFI_STATUS WatchdogWriteOffsetRegister ( @@ -320,7 +321,7 @@ GenericWatchdogEntry ( if (!EFI_ERROR (Status)) { // Install interrupt handler Status = gBS->LocateProtocol ( - &gHardwareInterruptProtocolGuid, + &gHardwareInterrupt2ProtocolGuid, NULL, (VOID **)&mInterruptProtocol ); @@ -331,13 +332,19 @@ GenericWatchdogEntry ( WatchdogInterruptHandler ); if (!EFI_ERROR (Status)) { - // Install the Timer Architectural Protocol onto a new handle - Handle = NULL; - Status = gBS->InstallMultipleProtocolInterfaces ( - &Handle, - &gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer, - NULL - ); + Status = mInterruptProtocol->SetTriggerType ( + mInterruptProtocol, + FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum), + EFI_HARDWARE_INTERRUPT2_TRIGGER_EDGE_RISING); + if (!EFI_ERROR (Status)) { + // Install the Timer Architectural Protocol onto a new handle + Handle = NULL; + Status = gBS->InstallMultipleProtocolInterfaces ( + &Handle, + &gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer, + NULL + ); + } } } }