From patchwork Wed Jul 1 09:43:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Biwen Li \(OSS\)" X-Patchwork-Id: 240544 List-Id: U-Boot discussion From: biwen.li at oss.nxp.com (Biwen Li) Date: Wed, 1 Jul 2020 17:43:26 +0800 Subject: [PATCH 1/5] i2c: mxc: move i2c_early_init_f to common function Message-ID: <20200701094330.27091-1-biwen.li@oss.nxp.com> From: Biwen Li Move i2c_early_init_f to common function to initialize baudrate of i2c Signed-off-by: Biwen Li --- drivers/i2c/mxc_i2c.c | 138 +++++++++++++++++++++++++------------------------- 1 file changed, 70 insertions(+), 68 deletions(-) diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index a03c465..1cc1f50 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -4,6 +4,7 @@ * * (c) 2007 Pengutronix, Sascha Hauer * (c) 2011 Marek Vasut + * Copyright 2020 NXP * * Based on i2c-imx.c from linux kernel: * Copyright (C) 2005 Torsten Koschorrek @@ -338,6 +339,57 @@ static int i2c_init_transfer_(struct mxc_i2c_bus *i2c_bus, u8 chip, return 0; } +#if !defined(I2C2_BASE_ADDR) +#define I2C2_BASE_ADDR 0 +#endif + +#if !defined(I2C3_BASE_ADDR) +#define I2C3_BASE_ADDR 0 +#endif + +#if !defined(I2C4_BASE_ADDR) +#define I2C4_BASE_ADDR 0 +#endif + +#if !defined(I2C5_BASE_ADDR) +#define I2C5_BASE_ADDR 0 +#endif + +#if !defined(I2C6_BASE_ADDR) +#define I2C6_BASE_ADDR 0 +#endif + +#if !defined(I2C7_BASE_ADDR) +#define I2C7_BASE_ADDR 0 +#endif + +#if !defined(I2C8_BASE_ADDR) +#define I2C8_BASE_ADDR 0 +#endif + +static struct mxc_i2c_bus mxc_i2c_buses[] = { +#if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_VF610) || \ + defined(CONFIG_FSL_LAYERSCAPE) + { 0, I2C1_BASE_ADDR, I2C_QUIRK_FLAG }, + { 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG }, + { 2, I2C3_BASE_ADDR, I2C_QUIRK_FLAG }, + { 3, I2C4_BASE_ADDR, I2C_QUIRK_FLAG }, + { 4, I2C5_BASE_ADDR, I2C_QUIRK_FLAG }, + { 5, I2C6_BASE_ADDR, I2C_QUIRK_FLAG }, + { 6, I2C7_BASE_ADDR, I2C_QUIRK_FLAG }, + { 7, I2C8_BASE_ADDR, I2C_QUIRK_FLAG }, +#else + { 0, I2C1_BASE_ADDR, 0 }, + { 1, I2C2_BASE_ADDR, 0 }, + { 2, I2C3_BASE_ADDR, 0 }, + { 3, I2C4_BASE_ADDR, 0 }, + { 4, I2C5_BASE_ADDR, 0 }, + { 5, I2C6_BASE_ADDR, 0 }, + { 6, I2C7_BASE_ADDR, 0 }, + { 7, I2C8_BASE_ADDR, 0 }, +#endif +}; + #ifndef CONFIG_DM_I2C int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus) { @@ -431,6 +483,24 @@ exit: return ret; } #endif +/* + * Early init I2C for prepare read the clk through I2C. + */ +void i2c_early_init_f(void) +{ + ulong base = mxc_i2c_buses[I2C_EARLY_INIT_INDEX].base; + bool quirk = mxc_i2c_buses[I2C_EARLY_INIT_INDEX].driver_data + & I2C_QUIRK_FLAG ? true : false; + int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; + + /* Set I2C divider value */ + writeb(I2C_IFDR_DIV_CONSERVATIVE, base + (IFDR << reg_shift)); + /* Reset module */ + writeb(I2CR_IDIS, base + (I2CR << reg_shift)); + writeb(0, base + (I2SR << reg_shift)); + /* Enable I2C */ + writeb(I2CR_IEN, base + (I2CR << reg_shift)); +} static int i2c_init_transfer(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr, int alen) @@ -659,57 +729,6 @@ static int bus_i2c_write(struct mxc_i2c_bus *i2c_bus, u8 chip, u32 addr, return ret; } -#if !defined(I2C2_BASE_ADDR) -#define I2C2_BASE_ADDR 0 -#endif - -#if !defined(I2C3_BASE_ADDR) -#define I2C3_BASE_ADDR 0 -#endif - -#if !defined(I2C4_BASE_ADDR) -#define I2C4_BASE_ADDR 0 -#endif - -#if !defined(I2C5_BASE_ADDR) -#define I2C5_BASE_ADDR 0 -#endif - -#if !defined(I2C6_BASE_ADDR) -#define I2C6_BASE_ADDR 0 -#endif - -#if !defined(I2C7_BASE_ADDR) -#define I2C7_BASE_ADDR 0 -#endif - -#if !defined(I2C8_BASE_ADDR) -#define I2C8_BASE_ADDR 0 -#endif - -static struct mxc_i2c_bus mxc_i2c_buses[] = { -#if defined(CONFIG_ARCH_LS1021A) || defined(CONFIG_VF610) || \ - defined(CONFIG_FSL_LAYERSCAPE) - { 0, I2C1_BASE_ADDR, I2C_QUIRK_FLAG }, - { 1, I2C2_BASE_ADDR, I2C_QUIRK_FLAG }, - { 2, I2C3_BASE_ADDR, I2C_QUIRK_FLAG }, - { 3, I2C4_BASE_ADDR, I2C_QUIRK_FLAG }, - { 4, I2C5_BASE_ADDR, I2C_QUIRK_FLAG }, - { 5, I2C6_BASE_ADDR, I2C_QUIRK_FLAG }, - { 6, I2C7_BASE_ADDR, I2C_QUIRK_FLAG }, - { 7, I2C8_BASE_ADDR, I2C_QUIRK_FLAG }, -#else - { 0, I2C1_BASE_ADDR, 0 }, - { 1, I2C2_BASE_ADDR, 0 }, - { 2, I2C3_BASE_ADDR, 0 }, - { 3, I2C4_BASE_ADDR, 0 }, - { 4, I2C5_BASE_ADDR, 0 }, - { 5, I2C6_BASE_ADDR, 0 }, - { 6, I2C7_BASE_ADDR, 0 }, - { 7, I2C8_BASE_ADDR, 0 }, -#endif -}; - struct mxc_i2c_bus *i2c_get_base(struct i2c_adapter *adap) { return &mxc_i2c_buses[adap->hwadapnr]; @@ -767,24 +786,7 @@ void bus_i2c_init(int index, int speed, int unused, bus_i2c_set_bus_speed(&mxc_i2c_buses[index], speed); } -/* - * Early init I2C for prepare read the clk through I2C. - */ -void i2c_early_init_f(void) -{ - ulong base = mxc_i2c_buses[I2C_EARLY_INIT_INDEX].base; - bool quirk = mxc_i2c_buses[I2C_EARLY_INIT_INDEX].driver_data - & I2C_QUIRK_FLAG ? true : false; - int reg_shift = quirk ? VF610_I2C_REGSHIFT : IMX_I2C_REGSHIFT; - /* Set I2C divider value */ - writeb(I2C_IFDR_DIV_CONSERVATIVE, base + (IFDR << reg_shift)); - /* Reset module */ - writeb(I2CR_IDIS, base + (I2CR << reg_shift)); - writeb(0, base + (I2SR << reg_shift)); - /* Enable I2C */ - writeb(I2CR_IEN, base + (I2CR << reg_shift)); -} /* * Init I2C Bus From patchwork Wed Jul 1 09:43:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Biwen Li \(OSS\)" X-Patchwork-Id: 240545 List-Id: U-Boot discussion From: biwen.li at oss.nxp.com (Biwen Li) Date: Wed, 1 Jul 2020 17:43:27 +0800 Subject: [PATCH 2/5] freescale: ls1046aqds: enable secure system counter In-Reply-To: <20200701094330.27091-1-biwen.li@oss.nxp.com> References: <20200701094330.27091-1-biwen.li@oss.nxp.com> Message-ID: <20200701094330.27091-2-biwen.li@oss.nxp.com> From: Biwen Li Enable secure system counter in board_early_init_f for udelay() to fix a bug that always return 0 by timer_read_counter() when boot from qspi(No TFA) Signed-off-by: Biwen Li --- board/freescale/ls1046aqds/ls1046aqds.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index cabd7ee..c6f79c9 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2016 Freescale Semiconductor, Inc. - * Copyright 2019 NXP + * Copyright 2019-2020 NXP */ #include @@ -322,6 +322,7 @@ int i2c_multiplexer_select_vid_channel(u8 channel) int board_early_init_f(void) { + u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR; #ifdef CONFIG_HAS_FSL_XHCI_USB struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; u32 usb_pwrfault; @@ -330,6 +331,11 @@ int board_early_init_f(void) u8 uart; #endif + /* + * Enable secure system counter for timer + */ + out_le32(cntcr, 0x1); + #ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_EARLY_INIT i2c_early_init_f(); From patchwork Wed Jul 1 09:43:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Biwen Li \(OSS\)" X-Patchwork-Id: 240547 List-Id: U-Boot discussion From: biwen.li at oss.nxp.com (Biwen Li) Date: Wed, 1 Jul 2020 17:43:28 +0800 Subject: [PATCH 3/5] freescale: ls1046aqds: drop ifdef CONFIG_SYS_I2C In-Reply-To: <20200701094330.27091-1-biwen.li@oss.nxp.com> References: <20200701094330.27091-1-biwen.li@oss.nxp.com> Message-ID: <20200701094330.27091-3-biwen.li@oss.nxp.com> From: Biwen Li - Drop ifdef CONFIG_SYS_I2C to initialize baudrate of i2c - Drop warning of i2c_early_init_f as follows, warning: implicit declaration of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'? [-Wimplicit-function-declaration] Signed-off-by: Biwen Li --- board/freescale/ls1046aqds/ls1046aqds.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c index c6f79c9..fbe0511 100644 --- a/board/freescale/ls1046aqds/ls1046aqds.c +++ b/board/freescale/ls1046aqds/ls1046aqds.c @@ -34,6 +34,10 @@ DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_SYS_I2C_EARLY_INIT +void i2c_early_init_f(void); +#endif + #ifdef CONFIG_TFABOOT struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { { @@ -336,11 +340,9 @@ int board_early_init_f(void) */ out_le32(cntcr, 0x1); -#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_EARLY_INIT i2c_early_init_f(); #endif -#endif fsl_lsch2_early_init_f(); #ifdef CONFIG_HAS_FSL_XHCI_USB From patchwork Wed Jul 1 09:43:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Biwen Li \(OSS\)" X-Patchwork-Id: 240546 List-Id: U-Boot discussion From: biwen.li at oss.nxp.com (Biwen Li) Date: Wed, 1 Jul 2020 17:43:29 +0800 Subject: [PATCH 4/5] freescale: ls1043aqds: enable secure system counter In-Reply-To: <20200701094330.27091-1-biwen.li@oss.nxp.com> References: <20200701094330.27091-1-biwen.li@oss.nxp.com> Message-ID: <20200701094330.27091-4-biwen.li@oss.nxp.com> From: Biwen Li Enable secure system counter in board_early_init_f for udelay() to fix a bug that always return 0 by timer_read_counter() when boot from qspi(No TFA) Signed-off-by: Biwen Li --- board/freescale/ls1043aqds/ls1043aqds.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index 2d4b18c..5e4b030 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2015 Freescale Semiconductor, Inc. - * Copyright 2019 NXP + * Copyright 2019-2020 NXP */ #include @@ -451,6 +451,7 @@ void board_retimer_init(void) int board_early_init_f(void) { + u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR; #ifdef CONFIG_HAS_FSL_XHCI_USB struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; u32 usb_pwrfault; @@ -459,6 +460,11 @@ int board_early_init_f(void) u8 uart; #endif + /* + * Enable secure system counter for timer + */ + out_le32(cntcr, 0x1); + #ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_EARLY_INIT i2c_early_init_f(); From patchwork Wed Jul 1 09:43:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Biwen Li \(OSS\)" X-Patchwork-Id: 240548 List-Id: U-Boot discussion From: biwen.li at oss.nxp.com (Biwen Li) Date: Wed, 1 Jul 2020 17:43:30 +0800 Subject: [PATCH 5/5] freescale: ls1043aqds: drop ifdef CONFIG_SYS_I2C In-Reply-To: <20200701094330.27091-1-biwen.li@oss.nxp.com> References: <20200701094330.27091-1-biwen.li@oss.nxp.com> Message-ID: <20200701094330.27091-5-biwen.li@oss.nxp.com> From: Biwen Li - Drop ifdef CONFIG_SYS_I2C to initialize baudrate of i2c - Drop warning of i2c_early_init_f as follows, warning: implicit declaration of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'? [-Wimplicit-function-declaration] Signed-off-by: Biwen Li --- board/freescale/ls1043aqds/ls1043aqds.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c index 5e4b030..6c73832 100644 --- a/board/freescale/ls1043aqds/ls1043aqds.c +++ b/board/freescale/ls1043aqds/ls1043aqds.c @@ -48,6 +48,10 @@ enum { #define CFG_UART_MUX_SHIFT 1 #define CFG_LPUART_EN 0x1 +#ifdef CONFIG_SYS_I2C_EARLY_INIT +void i2c_early_init_f(void); +#endif + #ifdef CONFIG_TFABOOT struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = { { @@ -465,11 +469,9 @@ int board_early_init_f(void) */ out_le32(cntcr, 0x1); -#ifdef CONFIG_SYS_I2C #ifdef CONFIG_SYS_I2C_EARLY_INIT i2c_early_init_f(); #endif -#endif fsl_lsch2_early_init_f(); #ifdef CONFIG_HAS_FSL_XHCI_USB