From patchwork Mon Mar 16 13:35:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florinel Iordache X-Patchwork-Id: 243701 List-Id: U-Boot discussion From: florinel.iordache at nxp.com (Florinel Iordache) Date: Mon, 16 Mar 2020 15:35:59 +0200 Subject: [PATCH 1/4] phy: add support for backplane kr mode In-Reply-To: <1584365762-9009-1-git-send-email-florinel.iordache@nxp.com> References: <1584365762-9009-1-git-send-email-florinel.iordache@nxp.com> Message-ID: <1584365762-9009-2-git-send-email-florinel.iordache@nxp.com> Add generic support for backplane kr modes currently available: 10gbase-kr, 40gbase-kr4. Remove platform generic fixups (armv8/layerscape and powerpc) for ethernet interfaces specified in device tree as supported backplane modes. Signed-off-by: Florinel Iordache --- arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 9 +++++++++ arch/powerpc/cpu/mpc8xxx/fdt.c | 9 +++++++++ include/phy_interface.h | 23 +++++++++++++++++++++++ 3 files changed, 41 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index 87c3e05..0774387 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014-2015 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ #include @@ -31,6 +32,14 @@ int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) { + const char *conn; + + /* Do NOT apply fixup for backplane modes specified in DT */ + if (phyc == PHY_INTERFACE_MODE_XGMII) { + conn = fdt_getprop(blob, offset, "phy-connection-type", NULL); + if (is_backplane_mode(conn)) + return 0; + } return fdt_setprop_string(blob, offset, "phy-connection-type", phy_string_for_interface(phyc)); } diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 485c2d4..67f8b10 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2009-2014 Freescale Semiconductor, Inc. + * Copyright 2020 NXP * * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains @@ -76,6 +77,14 @@ void ft_fixup_num_cores(void *blob) { int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) { + const char *conn; + + /* Do NOT apply fixup for backplane modes specified in DT */ + if (phyc == PHY_INTERFACE_MODE_XGMII) { + conn = fdt_getprop(blob, offset, "phy-connection-type", NULL); + if (is_backplane_mode(conn)) + return 0; + } return fdt_setprop_string(blob, offset, "phy-connection-type", phy_string_for_interface(phyc)); } diff --git a/include/phy_interface.h b/include/phy_interface.h index 31ca72a..882e4af 100644 --- a/include/phy_interface.h +++ b/include/phy_interface.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2020 NXP * Andy Fleming * * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h @@ -67,6 +68,15 @@ static const char * const phy_interface_strings[] = { [PHY_INTERFACE_MODE_NONE] = "", }; +/* Backplane modes: + * are considered a sub-type of phy_interface_t: XGMII + * and are specified in "phy-connection-type" with one of the following strings + */ +static const char * const backplane_mode_strings[] = { + "10gbase-kr", + "40gbase-kr4", +}; + static inline const char *phy_string_for_interface(phy_interface_t i) { /* Default to unknown */ @@ -76,4 +86,17 @@ static inline const char *phy_string_for_interface(phy_interface_t i) return phy_interface_strings[i]; } +static inline bool is_backplane_mode(const char *phyconn) +{ + int i; + + if (!phyconn) + return false; + for (i = 0; i < ARRAY_SIZE(backplane_mode_strings); i++) { + if (!strcmp(phyconn, backplane_mode_strings[i])) + return true; + } + return false; +} + #endif /* _PHY_INTERFACE_H */ From patchwork Mon Mar 16 13:36:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florinel Iordache X-Patchwork-Id: 243699 List-Id: U-Boot discussion From: florinel.iordache at nxp.com (Florinel Iordache) Date: Mon, 16 Mar 2020 15:36:00 +0200 Subject: [PATCH 2/4] ls1046aqds: add support for backplane kr In-Reply-To: <1584365762-9009-1-git-send-email-florinel.iordache@nxp.com> References: <1584365762-9009-1-git-send-email-florinel.iordache@nxp.com> Message-ID: <1584365762-9009-3-git-send-email-florinel.iordache@nxp.com> Add support for backplane kr on ls1046aqds: remove board specific fixups on ls1046aqds for ethernet interfaces specified in device tree as supported backplane modes. Signed-off-by: Florinel Iordache --- board/freescale/ls1046aqds/eth.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/board/freescale/ls1046aqds/eth.c b/board/freescale/ls1046aqds/eth.c index 1eb4067..1d40e8b 100644 --- a/board/freescale/ls1046aqds/eth.c +++ b/board/freescale/ls1046aqds/eth.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2016 Freescale Semiconductor, Inc. - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP */ #include @@ -154,9 +154,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, enum fm_port port, int offset) { struct fixed_link f_link; - const u32 *handle; - const char *prop = NULL; - int off; + const char *phyconn; if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) { switch (port) { @@ -212,14 +210,11 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, "qsgmii"); } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_XGMII && (port == FM1_10GEC1 || port == FM1_10GEC2)) { - handle = fdt_getprop(fdt, offset, "phy-handle", NULL); - prop = NULL; - if (handle) { - off = fdt_node_offset_by_phandle(fdt, - fdt32_to_cpu(*handle)); - prop = fdt_getprop(fdt, off, "backplane-mode", NULL); - } - if (!prop || strcmp(prop, "10gbase-kr")) { + phyconn = fdt_getprop(fdt, offset, "phy-connection-type", NULL); + if (is_backplane_mode(phyconn)) { + /* Backplane KR mode: skip fixups */ + printf("Interface %d in backplane KR mode\n", port); + } else { /* XFI interface */ f_link.phy_id = cpu_to_fdt32(port); f_link.duplex = cpu_to_fdt32(1); From patchwork Mon Mar 16 13:36:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florinel Iordache X-Patchwork-Id: 243700 List-Id: U-Boot discussion From: florinel.iordache at nxp.com (Florinel Iordache) Date: Mon, 16 Mar 2020 15:36:01 +0200 Subject: [PATCH 3/4] lx2160aqds: add support for backplane kr In-Reply-To: <1584365762-9009-1-git-send-email-florinel.iordache@nxp.com> References: <1584365762-9009-1-git-send-email-florinel.iordache@nxp.com> Message-ID: <1584365762-9009-4-git-send-email-florinel.iordache@nxp.com> Add support for backplane kr on lx2160aqds: remove board specific fixups on lx2160aqds for ethernet interfaces specified in device tree as supported backplane modes. Signed-off-by: Florinel Iordache --- board/freescale/lx2160a/eth_lx2160aqds.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/board/freescale/lx2160a/eth_lx2160aqds.c b/board/freescale/lx2160a/eth_lx2160aqds.c index 6500649..0e928eb 100644 --- a/board/freescale/lx2160a/eth_lx2160aqds.c +++ b/board/freescale/lx2160a/eth_lx2160aqds.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP * */ @@ -616,6 +616,13 @@ int fdt_fixup_dpmac_phy_handle(void *fdt, int dpmac_id, int node_phandle) return offset; } + phy_string = fdt_getprop(fdt, offset, "phy-connection-type", NULL); + if (is_backplane_mode(phy_string)) { + /* Backplane KR mode: skip fixups */ + printf("Interface %d in backplane KR mode\n", dpmac_id); + return 0; + } + ret = fdt_appendprop_cell(fdt, offset, "phy-handle", node_phandle); if (ret) printf("%d@%s %d\n", __LINE__, __func__, ret); From patchwork Mon Mar 16 13:36:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florinel Iordache X-Patchwork-Id: 243702 List-Id: U-Boot discussion From: florinel.iordache at nxp.com (Florinel Iordache) Date: Mon, 16 Mar 2020 15:36:02 +0200 Subject: [PATCH 4/4] t208xqds: add support for backplane kr In-Reply-To: <1584365762-9009-1-git-send-email-florinel.iordache@nxp.com> References: <1584365762-9009-1-git-send-email-florinel.iordache@nxp.com> Message-ID: <1584365762-9009-5-git-send-email-florinel.iordache@nxp.com> Add support for backplane kr on t208xqds: remove board specific fixups on t208xqds for ethernet interfaces specified in device tree as supported backplane modes. Signed-off-by: Florinel Iordache --- board/freescale/t208xqds/eth_t208xqds.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/board/freescale/t208xqds/eth_t208xqds.c b/board/freescale/t208xqds/eth_t208xqds.c index 23b59bc..697c23b 100644 --- a/board/freescale/t208xqds/eth_t208xqds.c +++ b/board/freescale/t208xqds/eth_t208xqds.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2013 Freescale Semiconductor, Inc. + * Copyright 2020 NXP * * Shengzhou Liu */ @@ -200,6 +201,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, char buf[32] = "serdes-1,"; struct fixed_link f_link; int media_type = 0; + const char *phyconn; int off; ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -412,15 +414,24 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, } if (!media_type) { - /* fixed-link is used for XFI fiber cable */ - f_link.phy_id = port; - f_link.duplex = 1; - f_link.link_speed = 10000; - f_link.pause = 0; - f_link.asym_pause = 0; - fdt_delprop(fdt, offset, "phy-handle"); - fdt_setprop(fdt, offset, "fixed-link", &f_link, - sizeof(f_link)); + phyconn = fdt_getprop(fdt, offset, + "phy-connection-type", + NULL); + if (is_backplane_mode(phyconn)) { + /* Backplane KR mode: skip fixups */ + printf("Interface %d in backplane KR mode\n", + port); + } else { + /* fixed-link for XFI fiber cable */ + f_link.phy_id = port; + f_link.duplex = 1; + f_link.link_speed = 10000; + f_link.pause = 0; + f_link.asym_pause = 0; + fdt_delprop(fdt, offset, "phy-handle"); + fdt_setprop(fdt, offset, "fixed-link", + &f_link, sizeof(f_link)); + } } else { /* set property for copper cable */ off = fdt_node_offset_by_compat_reg(fdt,