From patchwork Thu Mar 26 16:05:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 244335 List-Id: U-Boot discussion From: bmeng.cn at gmail.com (Bin Meng) Date: Thu, 26 Mar 2020 09:05:21 -0700 Subject: [PATCH 1/4] travis: Remove qemu-riscv64 testing Message-ID: <1585238724-2928-1-git-send-email-bmeng.cn@gmail.com> As of today there is no pre-built UEFI GRUB image for RISC-V 32/64 available on the internet, and with travis-ci we don't build GRUB images like we do for azure and gitlab. Remove qemu-riscv64 testing temporarily. Signed-off-by: Bin Meng --- .travis.yml | 7 ------- 1 file changed, 7 deletions(-) diff --git a/.travis.yml b/.travis.yml index c59bd77..55b94cf 100644 --- a/.travis.yml +++ b/.travis.yml @@ -481,13 +481,6 @@ matrix: QEMU_TARGET="ppc-softmmu" BUILDMAN="^qemu-ppce500$" TOOLCHAIN="powerpc" - - name: "test/py qemu-riscv64" - env: - - TEST_PY_BD="qemu-riscv64" - TEST_PY_TEST_SPEC="not sleep" - QEMU_TARGET="riscv64-softmmu" - BUILDMAN="^qemu-riscv64$" - TOOLCHAIN="riscv" - name: "test/py qemu-x86" env: - TEST_PY_BD="qemu-x86" From patchwork Thu Mar 26 16:05:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 244339 List-Id: U-Boot discussion From: bmeng.cn at gmail.com (Bin Meng) Date: Thu, 26 Mar 2020 09:05:22 -0700 Subject: [PATCH 2/4] azure/gitlab: Add qemu-riscv32 testing In-Reply-To: <1585238724-2928-1-git-send-email-bmeng.cn@gmail.com> References: <1585238724-2928-1-git-send-email-bmeng.cn@gmail.com> Message-ID: <1585238724-2928-2-git-send-email-bmeng.cn@gmail.com> This adds the qemu-riscv32_defconfig test configuration. Signed-off-by: Bin Meng --- .azure-pipelines.yml | 5 +++++ .gitlab-ci.yml | 9 +++++++++ 2 files changed, 14 insertions(+) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index f66d58a..99a93cc 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -215,6 +215,10 @@ jobs: TEST_PY_BD: "qemu-ppce500" TEST_PY_TEST_SPEC: "not sleep" BUILDMAN: "^qemu-ppce500$" + qemu_riscv32: + TEST_PY_BD: "qemu-riscv32" + TEST_PY_TEST_SPEC: "not sleep" + BUILDMAN: "^qemu-riscv32$" qemu_riscv64: TEST_PY_BD: "qemu-riscv64" TEST_PY_TEST_SPEC: "not sleep" @@ -263,6 +267,7 @@ jobs: grub-mkimage --prefix=\"\" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd grub-mkimage --prefix=\"\" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd cp /opt/grub/grubriscv64.efi ~/grub_riscv64.efi + cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi cp /opt/grub/grubaa64.efi ~/grub_arm64.efi cp /opt/grub/grubarm.efi ~/grub_arm.efi # the below corresponds to .gitlab-ci.yml "script" diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 55943bb..39437ce 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -21,6 +21,7 @@ stages: - grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd - grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd - cp /opt/grub/grubriscv64.efi ~/grub_riscv64.efi + - cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi - cp /opt/grub/grubaa64.efi ~/grub_arm64.efi - cp /opt/grub/grubarm.efi ~/grub_arm.efi @@ -296,6 +297,14 @@ qemu-ppce500 test.py: BUILDMAN: "^qemu-ppce500$" <<: *buildman_and_testpy_dfn +qemu-riscv32 test.py: + tags: [ 'all' ] + variables: + TEST_PY_BD: "qemu-riscv32" + TEST_PY_TEST_SPEC: "not sleep" + BUILDMAN: "^qemu-riscv32$" + <<: *buildman_and_testpy_dfn + qemu-riscv64 test.py: tags: [ 'all' ] variables: From patchwork Thu Mar 26 16:05:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 244337 List-Id: U-Boot discussion From: bmeng.cn at gmail.com (Bin Meng) Date: Thu, 26 Mar 2020 09:05:23 -0700 Subject: [PATCH 3/4] test/py: Update u_boot_utils.find_ram_base to bypass the low 2MiB memory In-Reply-To: <1585238724-2928-1-git-send-email-bmeng.cn@gmail.com> References: <1585238724-2928-1-git-send-email-bmeng.cn@gmail.com> Message-ID: <1585238724-2928-3-git-send-email-bmeng.cn@gmail.com> On some RISC-V targets the low memory is protected that prevents S-mode U-Boot from access. Signed-off-by: Bin Meng --- test/py/u_boot_utils.py | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py index bf2a0fc..939d82e 100644 --- a/test/py/u_boot_utils.py +++ b/test/py/u_boot_utils.py @@ -237,10 +237,11 @@ def find_ram_base(u_boot_console): raise Exception('Failed to find RAM bank start in `bdinfo`') # We don't want ram_base to be zero as some functions test if the given - # address is NULL (0). Let's add 2MiB then (size of an ARM LPAE/v8 section). + # address is NULL (0). Besides, on some RISC-V targets the low memory + # is protected that prevents S-mode U-Boot from access. + # Let's add 2MiB then (size of an ARM LPAE/v8 section). - if ram_base == 0: - ram_base += 1024 * 1024 * 2 + ram_base += 1024 * 1024 * 2 return ram_base From patchwork Thu Mar 26 16:05:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 244340 List-Id: U-Boot discussion From: bmeng.cn at gmail.com (Bin Meng) Date: Thu, 26 Mar 2020 09:05:24 -0700 Subject: [PATCH 4/4] azure/gitlab: Add RISC-V SPL testing In-Reply-To: <1585238724-2928-1-git-send-email-bmeng.cn@gmail.com> References: <1585238724-2928-1-git-send-email-bmeng.cn@gmail.com> Message-ID: <1585238724-2928-4-git-send-email-bmeng.cn@gmail.com> This adds QEMU RISC-V 32/64 SPL testing. Unlike QEMU RISC-V 32/64, we test SPL running in M-mode and U-Boot proper running in S-mode, with a 4-core SMP configuration. Signed-off-by: Bin Meng --- .azure-pipelines.yml | 16 ++++++++++++++++ .gitlab-ci.yml | 24 ++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 99a93cc..55a2d75 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -223,6 +223,14 @@ jobs: TEST_PY_BD: "qemu-riscv64" TEST_PY_TEST_SPEC: "not sleep" BUILDMAN: "^qemu-riscv64$" + qemu_riscv32_spl: + TEST_PY_BD: "qemu-riscv32_spl" + TEST_PY_TEST_SPEC: "not sleep" + BUILDMAN: "^qemu-riscv32_spl$" + qemu_riscv64_spl: + TEST_PY_BD: "qemu-riscv64_spl" + TEST_PY_TEST_SPEC: "not sleep" + BUILDMAN: "^qemu-riscv64_spl$" qemu_x86: TEST_PY_BD: "qemu-x86" TEST_PY_TEST_SPEC: "not sleep" @@ -270,6 +278,14 @@ jobs: cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi cp /opt/grub/grubaa64.efi ~/grub_arm64.efi cp /opt/grub/grubarm.efi ~/grub_arm.efi + if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then + wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ + export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin + fi + if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then + wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ + export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin + fi # the below corresponds to .gitlab-ci.yml "script" cd ${WORK_DIR} if [[ "${BUILDMAN}" != "" ]]; then diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 39437ce..a393a10 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -24,6 +24,14 @@ stages: - cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi - cp /opt/grub/grubaa64.efi ~/grub_arm64.efi - cp /opt/grub/grubarm.efi ~/grub_arm.efi + - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then + wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ + export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin + fi + - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then + wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ + export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin + fi after_script: - rm -rf /tmp/uboot-test-hooks /tmp/venv @@ -313,6 +321,22 @@ qemu-riscv64 test.py: BUILDMAN: "^qemu-riscv64$" <<: *buildman_and_testpy_dfn +qemu-riscv32_spl test.py: + tags: [ 'all' ] + variables: + TEST_PY_BD: "qemu-riscv32_spl" + TEST_PY_TEST_SPEC: "not sleep" + BUILDMAN: "^qemu-riscv32_spl$" + <<: *buildman_and_testpy_dfn + +qemu-riscv64_spl test.py: + tags: [ 'all' ] + variables: + TEST_PY_BD: "qemu-riscv64_spl" + TEST_PY_TEST_SPEC: "not sleep" + BUILDMAN: "^qemu-riscv64_spl$" + <<: *buildman_and_testpy_dfn + qemu-x86 test.py: tags: [ 'all' ] variables: