From patchwork Fri Oct 6 20:41:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 115133 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp2215554qgn; Fri, 6 Oct 2017 13:42:04 -0700 (PDT) X-Received: by 10.98.60.14 with SMTP id j14mr3336742pfa.234.1507322524300; Fri, 06 Oct 2017 13:42:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507322524; cv=none; d=google.com; s=arc-20160816; b=pvaWOYJKnwvXuHRHROyShSn1rK2FhU7DZc0Y66MSs6HOgrzqbLfA17aBtt0BvorrTK ze455OQSh3YycQ6jKjjDoxx5TfShsmMpWS21GzKEcegMbK3jG2OKb/sv8cOK4MFXG3vy HZJ9P+h7502KjYezctxCoJxXwzm7eSwOtpgxpkGXV6wwWj6mvm6Ic1ENhmV+ZN1D85+k zlH80XGy0fHa0AuewfB/CRHb3E5BgMDGJyBKiXrGk/pJ8Uzav8IMLSOrOmPGLr07RkLo jZJ0eA4s76hNmZGI6o08kB88YXeTB25F5lZWTgLOGpQz2YhrgwFRTZ8NXpvBFTDcVFMz b1gQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:message-id:date:to:from:dkim-signature :delivered-to:arc-authentication-results; bh=8fdFJFeeZfVvn2jk5n8QWOK3USmW70tgxR5wlXCPFRI=; b=owM2x0OQNPcv1KHuzyhg0xjG0wThq0Viz5i4F7pRjTilqXKH7a0JCvDjNeN0T/zFNF A3URTAIvaxxeUBK6wzZoHPuQ66UsYsfe/VEWyGxO153Paz8wGfMbp5LYyWuRBAMQAqhC zudvqYQV2CMExRe/+ZgoOPyEs355avZ9XZpYlma9tNY0Y1i+Gi3UxaERBQvMfV6xDCGR xYpFa9VxymUypFdmK/F1deVh3S+ZFySVtymTYRIarb8ap6VY40mq5C90BwV/riHY3gWX 8pFA1mlcgL/md7iNum2tW25vxenrNMII0U6D4/pJ2ir5DbrJhMeJvCOEPlOJDM0YMs8i kaEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HlFEDmA0; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id l197si1735930pga.371.2017.10.06.13.42.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 06 Oct 2017 13:42:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HlFEDmA0; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id E915C21EA15A2; Fri, 6 Oct 2017 13:38:38 -0700 (PDT) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::22d; helo=mail-wm0-x22d.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x22d.google.com (mail-wm0-x22d.google.com [IPv6:2a00:1450:400c:c09::22d]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A523321E78217 for ; Fri, 6 Oct 2017 13:38:37 -0700 (PDT) Received: by mail-wm0-x22d.google.com with SMTP id b189so9700540wmd.4 for ; Fri, 06 Oct 2017 13:42:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=Pd1VU6vIbjLWo7vHgyScO7i09y1ouI4Y8H/hxKpTQy8=; b=HlFEDmA0BsdBelcU4o14Q3cd9R7HXlQm18SCv0j1g9WmZyVdK5CpHjFs5P40SkliDS BxlDp8ZxAEmZSl9/yD+iII6G0jZoNvXyHwgzWeFRXNPKjTbREYpciXJ5D1lKZYeEekKb TABtY+tMFQrN8tpaXohk5bnADWSfbyQjYmx/8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Pd1VU6vIbjLWo7vHgyScO7i09y1ouI4Y8H/hxKpTQy8=; b=oG6Cga0NAncn4qMXLASJ3g9ucj1g8TCyz6PaNdSLAcihgCSwz7FdMQFcuUBxYtazCo lnuFAYDdJ1oEYLTtQJoCCCx3o9o4YUlMeVpOFbH1kPUQJDwbLuDx7qgu7hs/xjfCHFTP benmyd3P0lZDZy9WcNf6GAq2Vkz4ZszFMSgY3jOsD2YqvWuQ/ehWlOUkkcHAGeyK4jQ4 OKyG7E1GEMIuAa93l6e1LbU1inC35HWO2RtY+pQRrQl+zLR119u4mys7KfYrVgLN8Hzs ILEP/OCHx1iKnJsQEW/mGq5O5s9QVrDegdzb+mUAZ0GcEbZqB+dkKKvVZQmy3VVpNFOP lQzQ== X-Gm-Message-State: AMCzsaWuwu6dbYcuO4CokWA+lGNqscnm1qwvjfPMXvg7jYmw285OfM0z S8judrojQ29X0sVOWhF+Ao6LgIWRutQ= X-Google-Smtp-Source: AOwi7QAPzWIPV2VtM4dehttz0+RHbUHylf9oRQj6EgIMTsCuZMsm03zNspTJfmr+/0IiJaBb6SL0QQ== X-Received: by 10.28.57.4 with SMTP id g4mr2447556wma.92.1507322519853; Fri, 06 Oct 2017 13:41:59 -0700 (PDT) Received: from localhost.localdomain ([154.150.7.171]) by smtp.gmail.com with ESMTPSA id n191sm5600164wmd.7.2017.10.06.13.41.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 06 Oct 2017 13:41:58 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 6 Oct 2017 21:41:52 +0100 Message-Id: <20171006204152.19376-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 Subject: [edk2] [PATCH] ArmPkg/ArmSmcPsciResetSystemLib: add support for warm reboot X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" PSCI SYSTEM_RESET is specified as a cold reboot, which does not preserve the contents of DRAM. In version 1.1, a new reset method was introduced that allows a warm reboot to be requested. This is especially relevant for capsule update, given that it will invoke a warm reboot before processing the capsule, under the assumption that the capsule will still be in memory when the PEI phase is reentered. So wire up the [rather inaccurately named] EnterS3WithImmediateWake() entry point that the capsule update runtime uses to the new PSCI 1.1 warm reboot. Note that many PSCI implementations will not support this yet, so fall back to a cold reboot if warm reboot fails. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- I don't actually need this code for Synquacer, but given that I had already wrote it, we may just as well merge it. ArmPkg/Include/IndustryStandard/ArmStdSmc.h | 10 +++++++--- ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c | 14 ++++++++++++-- 2 files changed, 19 insertions(+), 5 deletions(-) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm diff --git a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h index 593a3ce729ce..41b086947eaa 100644 --- a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h +++ b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h @@ -57,10 +57,12 @@ #define ARM_SMC_ID_PSCI_MIGRATE_AARCH32 0x84000005 #define ARM_SMC_ID_PSCI_SYSTEM_OFF 0x84000008 #define ARM_SMC_ID_PSCI_SYSTEM_RESET 0x84000009 +#define ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH64 0xc4000012 +#define ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH32 0x84000012 -/* The current PSCI version is: 0.2 */ -#define ARM_SMC_PSCI_VERSION_MAJOR 0 -#define ARM_SMC_PSCI_VERSION_MINOR 2 +/* The current PSCI version is: 1.1 */ +#define ARM_SMC_PSCI_VERSION_MAJOR 1 +#define ARM_SMC_PSCI_VERSION_MINOR 1 #define ARM_SMC_PSCI_VERSION \ ((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR) @@ -93,4 +95,6 @@ #define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1 #define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING 2 +#define ARM_SMC_ID_PSCI_SYSTEM_RESET2_WARM 0 + #endif diff --git a/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c b/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c index d6d26bce5009..ffd726554c0f 100644 --- a/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c +++ b/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c @@ -55,7 +55,17 @@ ResetWarm ( VOID ) { - // Map a warm reset into a cold reset + ARM_SMC_ARGS ArmSmcArgs; + +#if defined(MDE_CPU_AARCH64) + ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH64; +#else + ArmSmcArgs.Arg0 = ARM_SMC_ID_PSCI_SYSTEM_RESET2_AARCH32; +#endif + ArmSmcArgs.Arg1 = ARM_SMC_ID_PSCI_SYSTEM_RESET2_WARM; + ArmCallSmc (&ArmSmcArgs); + + // Fall back to cold reset if unsupported ResetCold (); } @@ -89,7 +99,7 @@ EnterS3WithImmediateWake ( VOID ) { - // Not implemented + ResetWarm (); } /**