From patchwork Fri May 22 18:03:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suniel Mahesh X-Patchwork-Id: 246320 List-Id: U-Boot discussion From: sunil at amarulasolutions.com (sunil at amarulasolutions.com) Date: Fri, 22 May 2020 23:33:24 +0530 Subject: [PATCH 1/5] rockchip: spl: Move board_early_init_f after cpu timer In-Reply-To: <1590170608-12229-1-git-send-email-sunil@amarulasolutions.com> References: <1590170608-12229-1-git-send-email-sunil@amarulasolutions.com> Message-ID: <1590170608-12229-2-git-send-email-sunil@amarulasolutions.com> From: Jagan Teki Custom board_early_init_f not only deal with simple gpio configuration but also have a possibility to access clocks to process any clock related operations like checking reset cause state and etc. So, call it once the rockchip timer initialization done instead of calling first place of board_init_f which doesn't have any rockchip init code before. This specific concern was tested with checking reset reason via board_early_init_f, which indeed require a clk probe. Signed-off-by: Jagan Teki Tested-by: Suniel Mahesh --- arch/arm/mach-rockchip/spl.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index ec2f66d..82586fe 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -124,8 +124,6 @@ void board_init_f(ulong dummy) debug("\nspl:debug uart enabled in %s\n", __func__); #endif - board_early_init_f(); - ret = spl_early_init(); if (ret) { printf("spl_early_init() failed: %d\n", ret); @@ -139,6 +137,9 @@ void board_init_f(ulong dummy) /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */ timer_init(); #endif + + board_early_init_f(); + #if !defined(CONFIG_TPL) || defined(CONFIG_SPL_OS_BOOT) debug("\nspl:init dram\n"); ret = uclass_get_device(UCLASS_RAM, 0, &dev); From patchwork Fri May 22 18:03:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suniel Mahesh X-Patchwork-Id: 246321 List-Id: U-Boot discussion From: sunil at amarulasolutions.com (sunil at amarulasolutions.com) Date: Fri, 22 May 2020 23:33:25 +0530 Subject: [PATCH 2/5] roc-pc-rk3399: Enable I2C in SPL for add-on board detection In-Reply-To: <1590170608-12229-1-git-send-email-sunil@amarulasolutions.com> References: <1590170608-12229-1-git-send-email-sunil@amarulasolutions.com> Message-ID: <1590170608-12229-3-git-send-email-sunil@amarulasolutions.com> From: Suniel Mahesh This patch enables I2C in SPL for any add-on board detection at run time. Signed-off-by: Suniel Mahesh Signed-off-by: Jagan Teki --- arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 13 +++++++++++++ configs/roc-pc-rk3399_defconfig | 5 ++++- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi index 141dd0b..6de30d4 100644 --- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi +++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi @@ -56,3 +56,16 @@ &vcc_sdio { regulator-always-on; }; + +&pcfg_pull_none_12ma { + u-boot,dm-pre-reloc; +}; + +&i2c2 { + u-boot,dm-pre-reloc; + status= "okay"; +}; + +&i2c2_xfer { + u-boot,dm-pre-reloc; +}; diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 76e76c1..4d1a077 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -13,19 +13,22 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 +CONFIG_SPL_I2C_SUPPORT=y CONFIG_TPL=y CONFIG_TPL_GPIO_SUPPORT=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc" -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y From patchwork Fri May 22 18:03:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suniel Mahesh X-Patchwork-Id: 246322 List-Id: U-Boot discussion From: sunil at amarulasolutions.com (sunil at amarulasolutions.com) Date: Fri, 22 May 2020 23:33:26 +0530 Subject: [PATCH 3/5] roc-pc-rk3399: Add support for add-on board run-time detection In-Reply-To: <1590170608-12229-1-git-send-email-sunil@amarulasolutions.com> References: <1590170608-12229-1-git-send-email-sunil@amarulasolutions.com> Message-ID: <1590170608-12229-4-git-send-email-sunil@amarulasolutions.com> From: Suniel Mahesh roc-pc-rk3399 target has an add-on board, this add-on board hosts a CW2015 chip which is connected as slave to I2C2. In order to dynamically detect this add-on board at runtime, I2C2 is probed in SPL. If probe is successfull then a corresponding dtb is loaded, else regular dtb is loaded for the u-boot proper. Signed-off-by: Suniel Mahesh Signed-off-by: Jagan Teki --- board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 56 +++++++++++++++++++++++++++++ configs/roc-pc-rk3399_defconfig | 2 ++ 2 files changed, 58 insertions(+) diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c index 7c3a803..b3cbfaa 100644 --- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c +++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c @@ -32,6 +32,62 @@ out: } #endif +#if !defined(CONFIG_TPL_BUILD) && defined(CONFIG_SPL_BUILD) + +#include + +#define BUS_NUM 2 +#define ROC_RK3399_MEZZ_BAT_ADDR 0x62 + +enum roc_rk3399_pc_board_type { + ROC_RK3399_PC, /* roc-rk3399-pc base board */ + ROC_RK3399_MEZZ_M2_POE, /* roc-rk3399-Mezz M.2 PoE */ +}; + +int board_early_init_f(void) +{ + struct udevice *bus, *dev; + int ret; + + /* default board type */ + gd->board_type = ROC_RK3399_PC; + + ret = uclass_get_device_by_seq(UCLASS_I2C, BUS_NUM, &bus); + if (ret) { + debug("failed to get i2c bus 2\n"); + return ret; + } + + ret = dm_i2c_probe(bus, ROC_RK3399_MEZZ_BAT_ADDR, 0, &dev); + if (ret) { + debug("failed to probe i2c2 battery controller IC\n"); + return ret; + } + + gd->board_type = ROC_RK3399_MEZZ_M2_POE; + + return 0; +} + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + if (gd->board_type == ROC_RK3399_PC) { + if (!strcmp(name, "rk3399-roc-pc.dtb")) + return 0; + } + + if (gd->board_type == ROC_RK3399_MEZZ_M2_POE) { + if (!strcmp(name, "rk3399-roc-pc-mezzanine.dtb")) + return 0; + } + + return -EINVAL; +} +#endif + +#endif /* CONFIG_SPL_BUILD */ + #if defined(CONFIG_TPL_BUILD) #define GPIO0_BASE 0xff720000 diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 4d1a077..e56fd3d 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -10,6 +10,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BOARD_TYPES=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 @@ -25,6 +26,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc" +CONFIG_OF_LIST="rk3399-roc-pc rk3399-roc-pc-mezzanine" CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y From patchwork Fri May 22 18:03:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suniel Mahesh X-Patchwork-Id: 246323 List-Id: U-Boot discussion From: sunil at amarulasolutions.com (sunil at amarulasolutions.com) Date: Fri, 22 May 2020 23:33:27 +0530 Subject: [PATCH 4/5] rk3399: drop ROC-RK3399-PC Mezzanine board In-Reply-To: <1590170608-12229-1-git-send-email-sunil@amarulasolutions.com> References: <1590170608-12229-1-git-send-email-sunil@amarulasolutions.com> Message-ID: <1590170608-12229-5-git-send-email-sunil@amarulasolutions.com> From: Suniel Mahesh As we have added runtime detection support for ROC-RK3399-PC Mezzanine board, which is an add-on board and as indicated in earlier commit, we are dropping separate defconfig file and support. see commit f417d71ea78b ("rk3399: Add ROC-RK3399-PC Mezzanine board") Signed-off-by: Suniel Mahesh Signed-off-by: Jagan Teki --- board/firefly/roc-pc-rk3399/MAINTAINERS | 2 - configs/roc-pc-mezzanine-rk3399_defconfig | 74 ------------------------------- 2 files changed, 76 deletions(-) delete mode 100644 configs/roc-pc-mezzanine-rk3399_defconfig diff --git a/board/firefly/roc-pc-rk3399/MAINTAINERS b/board/firefly/roc-pc-rk3399/MAINTAINERS index 68a5b75..7564dd2 100644 --- a/board/firefly/roc-pc-rk3399/MAINTAINERS +++ b/board/firefly/roc-pc-rk3399/MAINTAINERS @@ -1,8 +1,6 @@ ROC-RK3399-PC M: Levin Du -M: Suniel Mahesh S: Maintained F: board/firefly/roc-pc-rk3399 F: include/configs/roc-pc-rk3399.h F: configs/roc-pc-rk3399_defconfig -F: configs/roc-pc-mezzanine-rk3399_defconfig diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig deleted file mode 100644 index ff49413..0000000 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ /dev/null @@ -1,74 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_ROCKCHIP=y -CONFIG_SYS_TEXT_BASE=0x00200000 -CONFIG_ENV_OFFSET=0x3F8000 -CONFIG_ROCKCHIP_RK3399=y -CONFIG_TARGET_ROC_PC_RK3399=y -CONFIG_NR_DRAM_BANKS=1 -CONFIG_DEBUG_UART_BASE=0xFF1A0000 -CONFIG_DEBUG_UART_CLOCK=24000000 -CONFIG_DEBUG_UART=y -CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" -CONFIG_DISPLAY_BOARDINFO_LATE=y -# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 -CONFIG_TPL=y -CONFIG_TPL_GPIO_SUPPORT=y -CONFIG_CMD_BOOTZ=y -CONFIG_CMD_GPT=y -CONFIG_CMD_MMC=y -CONFIG_CMD_USB=y -CONFIG_CMD_PCI=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_TIME=y -CONFIG_SPL_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine" -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_ROCKCHIP_GPIO=y -CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_MISC=y -CONFIG_MMC_DW=y -CONFIG_MMC_DW_ROCKCHIP=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_SPI_FLASH_WINBOND=y -CONFIG_DM_ETH=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y -CONFIG_NVME=y -CONFIG_PCI=y -CONFIG_PHY_ROCKCHIP_INNO_USB2=y -CONFIG_PHY_ROCKCHIP_TYPEC=y -CONFIG_PMIC_RK8XX=y -CONFIG_REGULATOR_PWM=y -CONFIG_REGULATOR_RK8XX=y -CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y -CONFIG_DM_RESET=y -CONFIG_BAUDRATE=1500000 -CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_ROCKCHIP_SPI=y -CONFIG_SYSRESET=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GENERIC=y -CONFIG_USB_KEYBOARD=y -CONFIG_USB_HOST_ETHER=y -CONFIG_USB_ETHER_ASIX=y -CONFIG_USB_ETHER_ASIX88179=y -CONFIG_USB_ETHER_MCS7830=y -CONFIG_USB_ETHER_RTL8152=y -CONFIG_USB_ETHER_SMSC95XX=y -CONFIG_DM_VIDEO=y -CONFIG_DISPLAY=y -CONFIG_VIDEO_ROCKCHIP=y -CONFIG_DISPLAY_ROCKCHIP_HDMI=y -CONFIG_SPL_TINY_MEMSET=y -CONFIG_ERRNO_STR=y From patchwork Fri May 22 18:03:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suniel Mahesh X-Patchwork-Id: 246324 List-Id: U-Boot discussion From: sunil at amarulasolutions.com (sunil at amarulasolutions.com) Date: Fri, 22 May 2020 23:33:28 +0530 Subject: [PATCH 5/5] roc-pc-rk3399: Enable PCIe/M.2, NVMe In-Reply-To: <1590170608-12229-1-git-send-email-sunil@amarulasolutions.com> References: <1590170608-12229-1-git-send-email-sunil@amarulasolutions.com> Message-ID: <1590170608-12229-6-git-send-email-sunil@amarulasolutions.com> From: Suniel Mahesh ROC-RK3399-PC Mezzanine is an add-on board for roc-pc-rk3399 target and it hosts a PCIe/M.2 interface. As we have added runtime detection support for this add-on board, this patch enables PCIe/M.2, NVMe so that SSD's which have a PCIe/M.2 interface can be detected. => nvme scan => nvme device IDE device 0: Vendor: 0x144d Rev: 2B2QEXM7 Prod: S4EUNG0N104275H Type: Hard Disk Capacity: 238475.1 MB = 232.8 GB (488397168 x 512) Signed-off-by: Suniel Mahesh Signed-off-by: Jagan Teki --- configs/roc-pc-rk3399_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index e56fd3d..ae08be1 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -22,6 +22,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y @@ -42,6 +43,8 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_NVME=y +CONFIG_PCI=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PMIC_RK8XX=y