From patchwork Tue May 26 02:30:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 246534 List-Id: U-Boot discussion From: marex at denx.de (Marek Vasut) Date: Tue, 26 May 2020 04:30:19 +0200 Subject: [PATCH 1/5] ARM: stm32: Re-enable KS8851 on DHCOM Message-ID: <20200526023023.293909-1-marex@denx.de> Since the KS8851 driver is now in, enable the Kconfig entry on DHCOM to make the second ethernet available. Signed-off-by: Marek Vasut Cc: Patrick Delaunay Cc: Patrice Chotard Reviewed-by: Patrick Delaunay --- configs/stm32mp15_dhcom_basic_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index c1c83eb4fc..6106572673 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -101,6 +101,7 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_DM_ETH=y CONFIG_DWC_ETH_QOS=y +CONFIG_KS8851_MLL=y CONFIG_PHY=y CONFIG_PHY_STM32_USBPHYC=y CONFIG_PINCONF=y From patchwork Tue May 26 02:30:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 246535 List-Id: U-Boot discussion From: marex at denx.de (Marek Vasut) Date: Tue, 26 May 2020 04:30:20 +0200 Subject: [PATCH 2/5] ARM: stm32: Hog GPIO PF7 high on DHCOR to unlock SPI NOR nWP In-Reply-To: <20200526023023.293909-1-marex@denx.de> References: <20200526023023.293909-1-marex@denx.de> Message-ID: <20200526023023.293909-2-marex@denx.de> The SPI NOR nWP line is connected to GPIO PF7 on the SoM, pull the GPIO line high by default to clear SPI NOR WP. Signed-off-by: Marek Vasut Cc: Patrick Delaunay Cc: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 9 +++++++++ configs/stm32mp15_dhcor_basic_defconfig | 1 + 2 files changed, 10 insertions(+) diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi index ef730a8322..bd4c2adc35 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi @@ -21,6 +21,15 @@ }; }; +&gpiof { + snor-nwp { + gpio-hog; + gpios = <7 0>; + output-high; + line-name = "spi-nor-nwp"; + }; +}; + &i2c4 { u-boot,dm-pre-reloc; }; diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 7163d0ad1b..249646c449 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -71,6 +71,7 @@ CONFIG_SPL_BLOCK_CACHE=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y CONFIG_DFU_VIRT=y +CONFIG_GPIO_HOG=y CONFIG_DM_HWSPINLOCK=y CONFIG_HWSPINLOCK_STM32=y CONFIG_DM_I2C=y From patchwork Tue May 26 02:30:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 246538 List-Id: U-Boot discussion From: marex at denx.de (Marek Vasut) Date: Tue, 26 May 2020 04:30:21 +0200 Subject: [PATCH 3/5] ARM: dts: stm32: Add alternate pinmux for I2C2 pins In-Reply-To: <20200526023023.293909-1-marex@denx.de> References: <20200526023023.293909-1-marex@denx.de> Message-ID: <20200526023023.293909-3-marex@denx.de> Add another mux option for I2C2 pins, this is used on AV96 board. Signed-off-by: Marek Vasut Cc: Patrick Delaunay Cc: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp15-pinctrl.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi index 8d00391978..c385896ebc 100644 --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi @@ -357,6 +357,23 @@ }; }; + i2c2_pins_c: i2c2-4 { + pins { + pinmux = , /* I2C2_SCL */ + ; /* I2C2_SDA */ + bias-disable; + drive-open-drain; + slew-rate = <0>; + }; + }; + + i2c2_pins_sleep_c: i2c2-5 { + pins { + pinmux = , /* I2C2_SCL */ + ; /* I2C2_SDA */ + }; + }; + i2c5_pins_a: i2c5-0 { pins { pinmux = , /* I2C5_SCL */ From patchwork Tue May 26 02:30:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 246537 List-Id: U-Boot discussion From: marex at denx.de (Marek Vasut) Date: Tue, 26 May 2020 04:30:22 +0200 Subject: [PATCH 4/5] ARM: dts: stm32: Repair I2C2 operation on AV96 In-Reply-To: <20200526023023.293909-1-marex@denx.de> References: <20200526023023.293909-1-marex@denx.de> Message-ID: <20200526023023.293909-4-marex@denx.de> The I2C2 uses different pinmux on AV96, use correct pinmux and also add comments about the I2C being present on the "low-speed" expansion connector X6. Signed-off-by: Marek Vasut Cc: Patrick Delaunay Cc: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts index 1b0579c8ab..7f2e4b98a7 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts @@ -107,7 +107,7 @@ }; }; -&i2c1 { +&i2c1 { /* X6 I2C1 */ pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins_b>; i2c-scl-rising-time-ns = <185>; @@ -117,9 +117,9 @@ /delete-property/dma-names; }; -&i2c2 { +&i2c2 { /* X6 I2C2 */ pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins_b1 &i2c2_pins_b2>; + pinctrl-0 = <&i2c2_pins_c>; i2c-scl-rising-time-ns = <185>; i2c-scl-falling-time-ns = <20>; status = "okay"; From patchwork Tue May 26 02:30:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 246536 List-Id: U-Boot discussion From: marex at denx.de (Marek Vasut) Date: Tue, 26 May 2020 04:30:23 +0200 Subject: [PATCH 5/5] ARM: dts: stm32: Disable SDR104 mode on AV96 In-Reply-To: <20200526023023.293909-1-marex@denx.de> References: <20200526023023.293909-1-marex@denx.de> Message-ID: <20200526023023.293909-5-marex@denx.de> Disable SDR104 mode until we know it is really stable. Signed-off-by: Marek Vasut Cc: Patrick Delaunay Cc: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts index 7f2e4b98a7..c1cc80bcf5 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts +++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts @@ -144,7 +144,6 @@ st,sig-dir; st,neg-edge; st,use-ckin; - sd-uhs-sdr104; bus-width = <4>; vmmc-supply = <&vdd_sd>; vqmmc-supply = <&sd_switch>;