From patchwork Tue Sep 8 08:13:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 249285 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4336424ilg; Tue, 8 Sep 2020 01:14:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy29GTw1jADYVciM2vAzOzecbBv/CA7p3QLxgFUV468Kbi6k3ebxuRv5Vvv/lCz5ccLnkks X-Received: by 2002:a25:9c87:: with SMTP id y7mr9753340ybo.18.1599552864161; Tue, 08 Sep 2020 01:14:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599552864; cv=none; d=google.com; s=arc-20160816; b=VW7pVBUsJRVjdHYgh4UYe9reBdB2XJzOYk0hRaRgJiSJyTlU5Acq5cZ4wA+YHPA1Jd y/1XmbCrDr+10trEF3kQcfvYIyx4knWBw3I1kaTx+3g2EeP44olKxRkjTbfcIUJLrv6Q f+zAyKshEnBEchF9zR2teuTOos/zqEqL6yVLHQbr99NXYg0RtbNO3DEIXQoXtoBT75oM H4FRnUECyMivlcqvMl8yMjvEhb7yjMId/r3hQfqMxkYKyctS9QNNkv4iRjGOnFXHC/9J PV+EN1u5dFbbH9TH6FIS+Gy1DAKTDH5mrfdL44lBEo8dDQDXJBlFndXqhlMbFaGIgGjW q+qQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=+orWxGBa1SRb2nSQN/q2qViaNIRmFc8NrraWTotMcp4=; b=oXuN/MgwIRBtM18ME+LPjbJ6cCyuWP673FXLH94P8jSX6GD4HP6QthAXFTGFAfQGq3 xNZoqOaxcwG/Sdxaw/l6tgXQ2LIFD7l8mTLX9+dOX3UTvpJ07xbMUr6IMZyBk1UfFsby zK6PfvyuUt6NnpCMhNT8RjVnSRqocUS71rguF1uQ8OyOuc4VpN8K4L0Dyu93NnO81QLb dDWDqYjp/8VGpTAtBvaSpQRQ0xknXkUHu5id7Y0I0UQCjUIybbp5XkNRU2gzud1k5yPH CSzdVFMu+bS/sWaIfogg3Je2uV0zTp3DzxVu3GhvLE5oA8+hBpo6MnW4AHAQUESgX4Xv 4zsg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=xkAbbSsM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id p12si9161567ybl.42.2020.09.08.01.14.24 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 08 Sep 2020 01:14:24 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=xkAbbSsM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:50748 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYlj-0005aI-KI for patch@linaro.org; Tue, 08 Sep 2020 04:14:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58240) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYl9-0005ZS-0R for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:47 -0400 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]:33595) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYl7-0000QX-1i for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:46 -0400 Received: by mail-pg1-x531.google.com with SMTP id e33so9525557pgm.0 for ; Tue, 08 Sep 2020 01:13:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+orWxGBa1SRb2nSQN/q2qViaNIRmFc8NrraWTotMcp4=; b=xkAbbSsMHL13QIEKseh5FvDJpbVn1+R2Sg1fgccSIWpkC58PzKCqMkM1NBtdSnWE++ ipaKwJSL2vLp8dsX0n3pvml9YkcnEGputtAoaK/8rCSraQu60jc3FzpHS2eNrrT1sMXi FPMwomj4AQ6HKJQl9fd+eEg6m0sicxxuAHVG3+Qlfgnc0q/ss013jz7NS0cgpCPqn7sk jnlYhdfAwcoSB8ttZ9HaALVK1We1M95q5+JG5JpNWtQJF/I12lsT6TmkLimIMEfupF8n qj0QCkTy/H/dnaY09xmSvUu+9b0JR1BH8mfAH+hzZ4uXK5AkRwn2PpjMyAineTKNNh5U 8H7g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=+orWxGBa1SRb2nSQN/q2qViaNIRmFc8NrraWTotMcp4=; b=b5OOB2ggt6PFXYIHWq31TXUZgamSzytj8W8Twr/BBNHwABsb10ElMC0LPfstVhyZIg XgMYiu1NqUJEhae9EMn3C7FZGERBtpUDg81KfI7k7TM9cFuenl7/VE7x0fu6w0qX6pqo 1lQnzvMZLVsgWVZvCapl/R/jFRQXSxZwb23abSDayM3i3PlexBlkjmS3a3IXcTLsa0xw PZUcmNuXkxLgfeEvPD0eLqYc6DHxV55ZlGZ2y4TVlYy1jl1XRrR9nIegqo8ER3PAF41X FdtGzKE1xkg4duqQvBSQkn06ImNmZ7wQfSoECc+S/sTZNexqTp4HPlLbPX0woqGEXiod soSw== X-Gm-Message-State: AOAM5332vLMtxR8zAxzkg00P2J+5kgXXDgzaQ5Dvxshyaq2jCOkxiPXW mWCZeKZCuijYLa6UIfqoMTCv X-Received: by 2002:aa7:9aef:: with SMTP id y15mr2846154pfp.119.1599552823600; Tue, 08 Sep 2020 01:13:43 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:43 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 01/12] update Linux headers with new vSPE macros Date: Tue, 8 Sep 2020 08:13:19 +0000 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::531; envelope-from=haibo.xu@linaro.org; helo=mail-pg1-x531.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Haibo Xu --- linux-headers/asm-arm64/kvm.h | 4 ++++ linux-headers/linux/kvm.h | 1 + 2 files changed, 5 insertions(+) -- 2.17.1 diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h index 9e34f0f875..802319ee02 100644 --- a/linux-headers/asm-arm64/kvm.h +++ b/linux-headers/asm-arm64/kvm.h @@ -106,6 +106,7 @@ struct kvm_regs { #define KVM_ARM_VCPU_SVE 4 /* enable SVE for this CPU */ #define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 /* VCPU uses address authentication */ #define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 /* VCPU uses generic authentication */ +#define KVM_ARM_VCPU_SPE_V1 7 /* Support guest SPEv1 */ struct kvm_vcpu_init { __u32 target; @@ -334,6 +335,9 @@ struct kvm_vcpu_events { #define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1 #define KVM_ARM_VCPU_PVTIME_CTRL 2 #define KVM_ARM_VCPU_PVTIME_IPA 0 +#define KVM_ARM_VCPU_SPE_V1_CTRL 3 +#define KVM_ARM_VCPU_SPE_V1_IRQ 0 +#define KVM_ARM_VCPU_SPE_V1_INIT 1 /* KVM_IRQ_LINE irq field index values */ #define KVM_ARM_IRQ_VCPU2_SHIFT 28 diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index a28c366737..8840cbb01c 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -1031,6 +1031,7 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_PPC_SECURE_GUEST 181 #define KVM_CAP_HALT_POLL 182 #define KVM_CAP_ASYNC_PF_INT 183 +#define KVM_CAP_ARM_SPE_V1 184 #ifdef KVM_CAP_IRQ_ROUTING From patchwork Tue Sep 8 08:13:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 249293 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4338565ilg; Tue, 8 Sep 2020 01:17:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxjhTBUBwrRYmKtjBHWrmyNqAaP92Dycka0zKxjwf5MNBi8aIxhGDJLkUmxplWhe44Roc2e X-Received: by 2002:a5b:804:: with SMTP id x4mr31635306ybp.404.1599553078299; Tue, 08 Sep 2020 01:17:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599553078; cv=none; d=google.com; s=arc-20160816; b=ptP59NVIJYU1f1m1kFDzie1kcLg2q4735J0fBqNSPYOgiFZaW9pfAN7fy7RbFyT4e8 htixHiEaChFLhMMPNVHCGD+ApI7Bwo38V2EHEDSid+aOV/bSU1/J82QjGFrvLk2eir5k rZP6QozuJICYFhCrbq6pPgfLaWx0TU0SDEoLpx4SOCcJMFOHbT1x/wOALtpyXq7Kkwu3 lcXQCa7+UJ7FHubiYYPKtRa/8ciqil4wq6VpxFRVOSKlUudCnClmNixtbzDAxvWBWO/Y WtCYRtj1hUdPEDeJrj8Y4mPWQbNyjWvGenI76MFcX++4vMEeqpi5SIb45VKqERe8DU6y cBOA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=NODmkJ7zv3Ze8nSAAv5Nj47e1RMWaOU9HVwH97SKsQI=; b=jDCYn0kuynAIYDcqHsp/jFIxRaORTOJhjqsBHMn2YAakdVsI76mZFoqe3NxKa9/sGZ Ck7y8LA0wjQFfiRXOchTyljvdjHNj8Se0pRUsqxwSGi2CWIlwaCKw2plcJDJByTttzEq ZftE1P8HtA5b62zkTQ1YEhVEDLq7alLKsfXN3392FtDJ8QBqcVbBIwTT5TKoqf62BIma QG/ZPD2cE7N4098KL7/KcNOoDdHIjoDbl0njB/DzGpRKbWvZUQo3/oZnD6GNH6Kf+SNz l/K9D7fl18cbYtuSlU6xs9zj+SYbwJXIIslBBqBO8xmwvzfGtYfnmdOElBLtb0CzCfcq 1Aaw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=vJ8gJHor; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Richard Henderson Signed-off-by: Haibo Xu --- target/arm/kvm.c | 5 +++++ target/arm/kvm_arm.h | 13 +++++++++++++ 2 files changed, 18 insertions(+) -- 2.17.1 Reviewed-by: Andrew Jones diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 8bb7318378..58f991e890 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -214,6 +214,11 @@ bool kvm_arm_pmu_supported(void) return kvm_check_extension(kvm_state, KVM_CAP_ARM_PMU_V3); } +bool kvm_arm_spe_supported(void) +{ + return kvm_check_extension(kvm_state, KVM_CAP_ARM_SPE_V1); +} + int kvm_arm_get_max_vm_ipa_size(MachineState *ms) { KVMState *s = KVM_STATE(ms->accelerator); diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index adb38514bf..f79655674e 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -283,6 +283,14 @@ bool kvm_arm_aarch32_supported(void); */ bool kvm_arm_pmu_supported(void); +/** + * kvm_arm_spe_supported: + * + * Returns: true if the KVM VCPU can enable its SPE + * and false otherwise. + */ +bool kvm_arm_spe_supported(void); + /** * kvm_arm_sve_supported: * @@ -366,6 +374,11 @@ static inline bool kvm_arm_pmu_supported(void) return false; } +static inline bool kvm_arm_spe_supported(void) +{ + return false; +} + static inline bool kvm_arm_sve_supported(void) { return false; From patchwork Tue Sep 8 08:13:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 249290 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4337227ilg; Tue, 8 Sep 2020 01:15:48 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwAT9bXUf5c5NVOhGEbBpHM7vspgPBn+qgZ9JdwO600QLojZeSV2icrILA710c5cZObYn2W X-Received: by 2002:a25:37d6:: with SMTP id e205mr32999810yba.446.1599552948050; Tue, 08 Sep 2020 01:15:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599552948; cv=none; d=google.com; s=arc-20160816; b=SDKpnIK7Si7TJEvtXIgs9CCHJ1NUKW6I3C07s31KHLl1H6lqmLgH9h49CASZc7CBj9 CRAjBAPZ0HH+Pxv8OVW5iqaS8OmhkD+vbvzYFMEkVTbkcp6aQcne1xXtgkZBp/uCAMsz qvglvqrYSZirN8sgwY9xdHw46CWUmBpz7QBl3EWdZuquoSaPCOFNBxwU5s+VkBrZALSQ EUKQzX1+zpTGdxiHEmrQ/DyAU8dkXoQVOXHaoi556t8ZjF4vZ1DLkSdyp7xFIvIYz/3u 5tjtlWbKmTtA4gp35qoIAeVDzklZEP+GYEemxyp96QSELn2onhBhohtCJGNgCCIpXhmk BPUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=sSfBFaYDNM91Wy+aR//OSZgCQwJ7nAz+b7+r07t012o=; b=TZyv3LoRG1ewqzEXlqIB7uA4sUHowfPVOHvU8HS02UTzfs1kkNMdwTlanHF+VY9Yrc Rm9uJbolGfl8SkCI0LQvT3VVDUnNmKbCeHKqNjLS16VOobm4AMaKyo64KXV5sEPHjzZn jHcn9kz9yFQ6Hr60CTnCz8oJTN7Aw0Twtfc/3BeENSce6Ldo7pGJBoSsfFLg5BQSwZji xSOA9V7uUt4qKyY43pLE6DiM6wKJhqNeAvhU9e+3YCfL67bAU+323Db0wYGud4CMhuWS +eguWpwOBOGG0lykSBnPZEXGhp9VSX4VVtobKjwno9Y25qa23PZJK3S4P3psSEjiVFn5 rxPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=qbQZsJ6C; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Adds a spe=[on/off] option to enable/disable vSPE support in guest vCPU. Signed-off-by: Haibo Xu --- target/arm/cpu.c | 6 ++++++ target/arm/cpu.h | 13 ++++++++++++ target/arm/cpu64.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 71 insertions(+) -- 2.17.1 Reviewed-by: Andrew Jones diff --git a/target/arm/cpu.c b/target/arm/cpu.c index c179e0752d..f211958eaa 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1310,6 +1310,12 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp) error_propagate(errp, local_err); return; } + + arm_cpu_spe_finalize(cpu, &local_err); + if (local_err != NULL) { + error_propagate(errp, local_err); + return; + } } } diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a1c7d8ebae..baf2bbcee8 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -24,6 +24,7 @@ #include "hw/registerfields.h" #include "cpu-qom.h" #include "exec/cpu-defs.h" +#include "qapi/qapi-types-common.h" /* ARM processors have a weak memory model */ #define TCG_GUEST_DEFAULT_MO (0) @@ -196,9 +197,11 @@ typedef struct { #ifdef TARGET_AARCH64 # define ARM_MAX_VQ 16 void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp); +void arm_cpu_spe_finalize(ARMCPU *cpu, Error **errp); #else # define ARM_MAX_VQ 1 static inline void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) { } +static inline void arm_cpu_spe_finalize(ARMCPU *cpu, Error **errp) { } #endif typedef struct ARMVectorReg { @@ -829,6 +832,8 @@ struct ARMCPU { bool has_el3; /* CPU has PMU (Performance Monitor Unit) */ bool has_pmu; + /* CPU has SPE (Statistical Profiling Extension) */ + OnOffAuto has_spe; /* CPU has VFP */ bool has_vfp; /* CPU has Neon */ @@ -3869,6 +3874,14 @@ static inline bool isar_feature_aa64_pmu_8_4(const ARMISARegisters *id) FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) != 0xf; } +/* + * Currently we don't differentiate between the ARMv8.2-SPE and ARMv8.3-SPE. + */ +static inline bool isar_feature_aa64_spe(const ARMISARegisters *id) +{ + return FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMSVER) != 0; +} + static inline bool isar_feature_aa64_rcpc_8_3(const ARMISARegisters *id) { return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, LRCPC) != 0; diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 3c2b3d9599..4997c4a3c0 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -572,6 +572,55 @@ void aarch64_add_sve_properties(Object *obj) } } +void arm_cpu_spe_finalize(ARMCPU *cpu, Error **errp) +{ + uint64_t t; + uint32_t value = 0; + + if (cpu->has_spe == ON_OFF_AUTO_AUTO) { + if (kvm_enabled() && kvm_arm_spe_supported()) { + cpu->has_spe = ON_OFF_AUTO_ON; + } else { + cpu->has_spe = ON_OFF_AUTO_OFF; + } + } else if (cpu->has_spe == ON_OFF_AUTO_ON) { + if (!kvm_enabled() || !kvm_arm_spe_supported()) { + error_setg(errp, "'spe' cannot be enabled on this host"); + return; + } + } + + /* + * According to the ARM ARM, the ID_AA64DFR0[PMSVER] currently + * support 3 values: + * + * 0b0000: SPE not implemented + * 0b0001: ARMv8.2-SPE implemented + * 0b0010: ARMv8.3-SPE implemented + * + * But the kernel KVM API didn't expose all these 3 values, and + * we can only get whether the SPE feature is supported or not. + * So here we just set the PMSVER to 1 if this feature was supported. + */ + if (cpu->has_spe == ON_OFF_AUTO_ON) { + value = 1; + } + + t = cpu->isar.id_aa64dfr0; + t = FIELD_DP64(t, ID_AA64DFR0, PMSVER, value); + cpu->isar.id_aa64dfr0 = t; +} + +static bool arm_spe_get(Object *obj, Error **errp) +{ + return ARM_CPU(obj)->has_spe != ON_OFF_AUTO_OFF; +} + +static void arm_spe_set(Object *obj, bool value, Error **errp) +{ + ARM_CPU(obj)->has_spe = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; +} + /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host); * otherwise, a CPU with as many features enabled as our emulation supports. * The version of '-cpu max' for qemu-system-arm is defined in cpu.c; @@ -721,6 +770,9 @@ static void aarch64_max_initfn(Object *obj) aarch64_add_sve_properties(obj); object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq, cpu_max_set_sve_max_vq, NULL, NULL); + + cpu->has_spe = ON_OFF_AUTO_AUTO; + object_property_add_bool(obj, "spe", arm_spe_get, arm_spe_set); } static const ARMCPUInfo aarch64_cpus[] = { From patchwork Tue Sep 8 08:13:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 249296 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4339365ilg; Tue, 8 Sep 2020 01:19:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyg/sMm6OV6HAnjPtoxNtVCGWS3dXUe5owuZAoaAOSQvGCxW9S41MbAloZjakT4VaMtAe0k X-Received: by 2002:a25:e014:: with SMTP id x20mr13721549ybg.489.1599553163123; Tue, 08 Sep 2020 01:19:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599553163; cv=none; d=google.com; s=arc-20160816; b=B3Q2k/Q37VG625ygdNK27irZNplrOaBcWueY7VcvrGEdJomoU8rpgqjahFZ/W/+xrV pXVxc8Up5dmsT6VfQd8E5l+8mfp/NsXHDanIkMEEFvgl/xPq72j+00b6Oz6zg2MX2FA0 X1N/rBaU2iY88St4LLn9Ve1ZPB49Cjr9xechTAHQ3ncDl4m1YFstqe6zB0RdctWSeGW4 1LaQ6b92e2oWSWh+DPI/GmV3M/fuVvPzjfXBY7K6/jjaYL+CuqZ+65e2IVyZJnyy08PP 7pWLN/7ECKBPN/+65Q49yBX/jsZ7wXgbVPtZihyGWChBXeG/x8a72xWqPMsqr1Xluc6j rx/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=vE/7atJFFNMf4U1vrclSfvdzLU1YHOKY7LV5LqTlxi8=; b=gTxGBD+E8uiTffs//ZJkGARhe5rW0n3VsUd3da+frnIO+uUwglQ/wu01EIQLIWdJTA xk9CrElnjQF2QFfe/4OAUlejOzSA0sFZoil8qumz2OUnAxZJeb76qIOnhxrAmX/o1xaB kiLjMowjvOf2H3yTP5mdtEFVgaveRLcVygKsXyczsI6IAGLRzih13Cm9ujBc9CldRvO5 Ej6RomgNtFWIXht53sY6EQx6yd7OrBn0IKsLnGDgwQbaQKV8vi37QbAuJa7g6Cs4OR4+ SNn6ib9V2z7AQzihVmAlak6Dh/D+HDaCulDAOd17ceADEOCVylUnnc/boiYMegvIXBBK enFw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Vocityjn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Date: Tue, 8 Sep 2020 08:13:22 +0000 Message-Id: <7ed8b1ff7a61132c6520f87213c61784ab0c331b.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=haibo.xu@linaro.org; helo=mail-pf1-x42f.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Haibo Xu --- hw/arm/virt.c | 7 +++++++ include/hw/arm/virt.h | 1 + 2 files changed, 8 insertions(+) -- 2.17.1 Reviewed-by: Andrew Jones diff --git a/hw/arm/virt.c b/hw/arm/virt.c index acf9bfbece..3f6d26c531 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1830,6 +1830,10 @@ static void machvirt_init(MachineState *machine) object_property_set_bool(cpuobj, "pmu", false, NULL); } + if (vmc->no_spe && object_property_find(cpuobj, "spe", NULL)) { + object_property_set_bool(cpuobj, "spe", false, NULL); + } + if (object_property_find(cpuobj, "reset-cbar", NULL)) { object_property_set_int(cpuobj, "reset-cbar", vms->memmap[VIRT_CPUPERIPHS].base, @@ -2553,8 +2557,11 @@ DEFINE_VIRT_MACHINE_AS_LATEST(5, 2) static void virt_machine_5_1_options(MachineClass *mc) { + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); + virt_machine_5_2_options(mc); compat_props_add(mc->compat_props, hw_compat_5_1, hw_compat_5_1_len); + vmc->no_spe = true; } DEFINE_VIRT_MACHINE(5, 1) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index dff67e1bef..72c269aaa5 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -126,6 +126,7 @@ typedef struct { bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */ bool kvm_no_adjvtime; bool acpi_expose_flash; + bool no_spe; } VirtMachineClass; typedef struct { From patchwork Tue Sep 8 08:13:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 249286 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4336537ilg; Tue, 8 Sep 2020 01:14:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzetLv9OdfS8Q2yPJPtVUgfkIT+yNjD/R+tGeO4tlLis9Q+Zs0BDfFqvu4RECrEMKy/HXCJ X-Received: by 2002:a25:70c6:: with SMTP id l189mr33059819ybc.263.1599552874605; Tue, 08 Sep 2020 01:14:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599552874; cv=none; d=google.com; s=arc-20160816; b=ZvnOouo/mE4JhNwTJr27ydbSx6je15wo/+5ekd07Ecvs3O/681dQFQJU4LyCo75+nl XWoWhc2u0019Eib8uKagWdS39JPtbbQ08nOI0I6SNuR6sdIcE1jyXpIuXYD8v9MRFcZ5 pp/LZMAHMXkFG8XqBgCDM+X1MONraIBQSMplMg3w2FQyEk+C7Al5uYtAOTLpB6Ee4/5V wGe0xu8chPgIp2YmBzNSbLZvcsPJH4ijF61CvCQ07HKuQNccpFtBEi+r8XycCcTrKJmA Ywfe90alG9cIbbJhOLo5rAvqL3pME8EQI9EkXBvvVYMCJhd5NJ4kJ5pBpbiJLoPtxfl9 900g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=bjXqJB5fZDovb5keozBFqhrjyKCJ3LE/1kjYNOFtg8s=; b=w81at22kyIpr9NOwcMbYIeyVnA1p6z9b3hBClUwLKC852H0INj+EEJLOnrNyqVSRVZ sERNynj+swo9pOxLotlSDj35V266UaJAv/mBlyeY9dd+RbpvySjHwG8z0xeADSVqUwHd YgOYISPN24kSlbADghjGazamjahIwtWpQv6/h5m8wZeW/4yGpCDDLi4LRTQTvhrW7dqQ 5Abz5LzWnfTdmt4coKWFl6QYA45WqalX6SncBKCnFe3EFrN+8yoA4IalClcyUDN/Tbks atwTyIq0cOVNtcfT9AJWHzsivFrRlCq4X9QYW37i3TaoCQ1cuw11vp7Z2KVgoNR0SM3c WzHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=lsduiPeW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id l18si782154ybq.344.2020.09.08.01.14.34 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 08 Sep 2020 01:14:34 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=lsduiPeW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52010 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYlt-00068b-VY for patch@linaro.org; Tue, 08 Sep 2020 04:14:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58364) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlD-0005in-LG for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:51 -0400 Received: from mail-pg1-x543.google.com ([2607:f8b0:4864:20::543]:42765) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlB-0000Ri-OE for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:51 -0400 Received: by mail-pg1-x543.google.com with SMTP id m5so9504319pgj.9 for ; Tue, 08 Sep 2020 01:13:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bjXqJB5fZDovb5keozBFqhrjyKCJ3LE/1kjYNOFtg8s=; b=lsduiPeW2KAAqBLIvyI/8FZJf9DdqV11oODQYW+mHmktQWlrq8JKQhBNqHOYftlV8h kXnXOB4iC+DAgzeakNlWC4mNsxowb3AjsLhw7SoVQJLykH3p+XSU1EE7DnAEgZ2v2p1X ekkD+zYHj1MiH5pEojjHtb4uT+E64xMw7Ntu4A3PH9GBAkrFbIVm4tKz7m5UUO2PU5af P/1yJq0WITCZQ9wSs2lqC0gSjozPi7bDCHT49gJPophxYlo9LQdEcLLQDrA73F7HYFkH bxh7JFNVg+Xim7DSmlptXBxIEGjWo8q70Ds6gbW0/vxky7gsUI7f5Uzralry/LBmvac0 hyMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bjXqJB5fZDovb5keozBFqhrjyKCJ3LE/1kjYNOFtg8s=; b=O4KMVVhQbrYzhZLDzsDEpgWq7qp0dG8d2SJ4W6S/qLomjMuyWSOuB8sXm+LyLRkg1f gH0l+nOdQiPPx1KZO3/dxwzmSbmX9DfnCZ/tzcy/0JMpIqaoUsrFtR8IcMdFtvP4qmMU NPeCYqkaM3LCt/2C/aFWSGM1SZIxU2NPULTA6rbNFtDxOATujirnNWDjNSGeAWTt5yZq 5JdnQrb2EFbxNHO+DA6kP/CbXIIP4Ty01wUHBgV5kcTGtFsTWYtjABgFqnNHcxNQepIe 5N6R9IOBZ6x5BpfsE4VIS4jzdDBR1CdfKkDWRV4u9mJHxjzxad7sCNeDuoSgkJc4U0Wn MiAg== X-Gm-Message-State: AOAM530OO+DArrX5Y4rNzYYJ1YXM+Rs+pFGzyXEhJXHd7SigcB2Ij33Z ZvHi68X1hAXmm+tqYDkcQZWC X-Received: by 2002:a17:902:465:b029:d0:89f1:9e2a with SMTP id 92-20020a1709020465b02900d089f19e2amr21643144ple.6.1599552828430; Tue, 08 Sep 2020 01:13:48 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:48 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 05/12] target/arm/kvm: spe: Unify device attr operation helper Date: Tue, 8 Sep 2020 08:13:23 +0000 Message-Id: <45eecae26272efc7a09837573cd5278296b58dc5.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::543; envelope-from=haibo.xu@linaro.org; helo=mail-pg1-x543.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Andrew Jones Rename kvm_arm_pmu_set_attr() to kvm_arm_set_device_attr(), So both the vPMU and vSPE device can share the same API. Signed-off-by: Andrew Jones --- target/arm/kvm64.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index ef1e960285..8ffd31ffdf 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -397,19 +397,20 @@ static CPUWatchpoint *find_hw_watchpoint(CPUState *cpu, target_ulong addr) return NULL; } -static bool kvm_arm_pmu_set_attr(CPUState *cs, struct kvm_device_attr *attr) +static bool kvm_arm_set_device_attr(CPUState *cs, struct kvm_device_attr *attr, + const char *name) { int err; err = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, attr); if (err != 0) { - error_report("PMU: KVM_HAS_DEVICE_ATTR: %s", strerror(-err)); + error_report("%s: KVM_HAS_DEVICE_ATTR: %s", name, strerror(-err)); return false; } err = kvm_vcpu_ioctl(cs, KVM_SET_DEVICE_ATTR, attr); if (err != 0) { - error_report("PMU: KVM_SET_DEVICE_ATTR: %s", strerror(-err)); + error_report("%s: KVM_SET_DEVICE_ATTR: %s", name, strerror(-err)); return false; } @@ -426,7 +427,7 @@ void kvm_arm_pmu_init(CPUState *cs) if (!ARM_CPU(cs)->has_pmu) { return; } - if (!kvm_arm_pmu_set_attr(cs, &attr)) { + if (!kvm_arm_set_device_attr(cs, &attr, "PMU")) { error_report("failed to init PMU"); abort(); } @@ -443,7 +444,7 @@ void kvm_arm_pmu_set_irq(CPUState *cs, int irq) if (!ARM_CPU(cs)->has_pmu) { return; } - if (!kvm_arm_pmu_set_attr(cs, &attr)) { + if (!kvm_arm_set_device_attr(cs, &attr, "PMU")) { error_report("failed to set irq for PMU"); abort(); } From patchwork Tue Sep 8 08:13:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 249297 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4340138ilg; Tue, 8 Sep 2020 01:20:47 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxcG3ojJ3GggN5YRvy+m96Qmxj5KeZQhK/Za9/RCpuUxj56r/zJbeNarUXKWSPPZyoO1Oo1 X-Received: by 2002:a05:6902:6c1:: with SMTP id m1mr32137998ybt.252.1599553247074; Tue, 08 Sep 2020 01:20:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599553247; cv=none; d=google.com; s=arc-20160816; b=gC1qT9XWypWnq3gZjkXgVbzRU7k0B1nKDMZVHLGssD5ykBdiqeUGAyPRp+ldL0/mPj NHXd/dkgGZtzdNQbTRXZ1w/AiCJtDANEKlS0YzEqKmfTp6kJUzLyVfoGXA5cN7NJWOVW MmwymOsFFjTwmOuCX2hZnZlPl7xnNN0nWXM9X8DNXBELZYLckhTA8JFQjqV+gWmXszwq F7kUuRrgmuu7irU0wMBYC2zOlFjdLAa6g5UnofvruFMRbDzDXPftknhXEY1Val+r/RWH b3Q2+qp4nbMoZAGPj9OnIS1jIxe9oNahc5wZa2TT7xOXVXPlOe24vHzmyX0pA1Xgg6Gn umiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=98oDa/Uw9z4PZMJfsm+7ai4FPAo11Fc74PaW20mvgsM=; b=c3DVDivSAgvNKxuQEfepfv+LXgFhwqiJYdSgMj9K3aWqmPhKnGOhGlk5eGhcTTXm2f zNGLEnxsupeLEIdrKM5KWRd/vm64C36u+TPGtYT0qBSP6MVIZ3Cc/FNNnUSg0mNOgEKy iGsWs+BiZToo9Vn85Vc5byHE9E1kqZx06ZUbu3rGobbrJuHmG4BngKxIvsczzJJQx0o1 Lds+iveypTVuAOfxQolzeIyDAawC8QYPyhxdqFyFcWtl93fkfyX1K65nquv0VPwa2/6R CCfoa/lh6b/o+H6xXbfOlw+YP4m8SUkH7WkQtIDmxWsTfKDv9CnVwTXSti3Ta5niQtRr xXZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=REY5uAR9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Haibo Xu --- target/arm/kvm64.c | 33 +++++++++++++++++++++++++++++++++ target/arm/kvm_arm.h | 5 +++++ 2 files changed, 38 insertions(+) -- 2.17.1 Reviewed-by: Andrew Jones diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 8ffd31ffdf..5a2032fc9e 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -450,6 +450,39 @@ void kvm_arm_pmu_set_irq(CPUState *cs, int irq) } } +void kvm_arm_spe_init(CPUState *cs) +{ + struct kvm_device_attr attr = { + .group = KVM_ARM_VCPU_SPE_V1_CTRL, + .attr = KVM_ARM_VCPU_SPE_V1_INIT, + }; + + if (!ARM_CPU(cs)->has_spe) { + return; + } + if (!kvm_arm_set_device_attr(cs, &attr, "SPE")) { + error_report("failed to init SPE"); + abort(); + } +} + +void kvm_arm_spe_set_irq(CPUState *cs, int irq) +{ + struct kvm_device_attr attr = { + .group = KVM_ARM_VCPU_SPE_V1_CTRL, + .addr = (intptr_t)&irq, + .attr = KVM_ARM_VCPU_SPE_V1_IRQ, + }; + + if (!ARM_CPU(cs)->has_spe) { + return; + } + if (!kvm_arm_set_device_attr(cs, &attr, "SPE")) { + error_report("failed to set irq for SPE"); + abort(); + } +} + static int read_sys_reg32(int fd, uint32_t *pret, uint64_t id) { uint64_t ret; diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index f79655674e..bb155322eb 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -348,6 +348,8 @@ int kvm_arm_vgic_probe(void); void kvm_arm_pmu_set_irq(CPUState *cs, int irq); void kvm_arm_pmu_init(CPUState *cs); +void kvm_arm_spe_set_irq(CPUState *cs, int irq); +void kvm_arm_spe_init(CPUState *cs); int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level); #else @@ -397,6 +399,9 @@ static inline int kvm_arm_vgic_probe(void) static inline void kvm_arm_pmu_set_irq(CPUState *cs, int irq) {} static inline void kvm_arm_pmu_init(CPUState *cs) {} +static inline void kvm_arm_spe_set_irq(CPUState *cs, int irq) {} +static inline void kvm_arm_spe_init(CPUState *cs) {} + static inline void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map) {} static inline void kvm_arm_get_virtual_time(CPUState *cs) {} From patchwork Tue Sep 8 08:13:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 249287 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4336628ilg; Tue, 8 Sep 2020 01:14:44 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw8/GiyrsjRuGVjXKQ+t66l3xsrDVBqvwM7P/8A5wMdMwlJ+D7WgqU5JojpYcwXQ92kFWRf X-Received: by 2002:a05:6902:1021:: with SMTP id x1mr16042715ybt.280.1599552884410; Tue, 08 Sep 2020 01:14:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599552884; cv=none; d=google.com; s=arc-20160816; b=viiVcn0Xbum1z5f2AZuPN23DMK67kKe0gSlYwAyvo3E7Qu40oZMCUl+fG//A+3S6xc k83LntGI4NT5jYnFnBcDTFmTseF5yuPBr+XnwuVYtX1Y41pRCcQ3LyYse8qLc2e7kGXs v8ru+hyLb/AeSk+Rm+N5bv633av3IShgZcy/FgStDfpOtS2GrLy0EUXpYymQG+3Y3nDw SZ6iYdX9s6kq7gjmriXNCI1CBrxxd6Fl9EcZbJydXNEUQVjdckSbkyVHYUAMHb/9fqC1 NhnHPF9MJU+yAYUUJXouIDF5GU9Ymjrr0QQhV/Ys8ZxhuFc1imok2oINcJIBn2uvPeAQ oPUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=hvtYY966srnK5wG0YbtFj+vFvT8ZWyaFHw3B2vowdgs=; b=taYgrS8tx+4Vjtp0Sd/wR8IEimMXozslknwl3nBGh0mFKwMbadfLsdxNGjkNzK/5pb DRxnPM+0RAYkZrhmN2i4mog+9ItbRLEu8ebUVa7XPYmGm+ALXDVwtLnQD8wVVA7Goj6N PN8Pg3cDSU7HkqisK/QMuN4Wq23t+J+SAuGvnjnnKz7pp4ic5gSwrGFiNMeNB6/2er5K HDiujs5MRLNtSxGg5FSiFTiVIc5qddsUfwPbFU6tGhNbtNLiUuu5qTWsnCGfeyXy923c c8pixnN51p1HYPJGkgZth61FPMH+DNf3RTJmA3elzuflUlugOmraOKYqTxPZN0p7fj5g c09Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=UN562Vwk; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Andrew Jones We'll add more to this new function in coming patches so we also state the gic must be created and call it below create_gic(). No functional change intended. Signed-off-by: Andrew Jones --- hw/arm/virt.c | 38 ++++++++++++++++++++++---------------- 1 file changed, 22 insertions(+), 16 deletions(-) -- 2.17.1 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 3f6d26c531..2ffcb073af 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1672,6 +1672,26 @@ static void finalize_gic_version(VirtMachineState *vms) } } +static void virt_cpu_post_init(VirtMachineState *vms) +{ + bool aarch64; + + aarch64 = object_property_get_bool(OBJECT(first_cpu), "aarch64", NULL); + + if (!kvm_enabled()) { + if (aarch64 && vms->highmem) { + int requested_pa_size = 64 - clz64(vms->highest_gpa); + int pamax = arm_pamax(ARM_CPU(first_cpu)); + + if (pamax < requested_pa_size) { + error_report("VCPU supports less PA bits (%d) than requested " + "by the memory map (%d)", pamax, requested_pa_size); + exit(1); + } + } + } +} + static void machvirt_init(MachineState *machine) { VirtMachineState *vms = VIRT_MACHINE(machine); @@ -1890,22 +1910,6 @@ static void machvirt_init(MachineState *machine) fdt_add_timer_nodes(vms); fdt_add_cpu_nodes(vms); - if (!kvm_enabled()) { - ARMCPU *cpu = ARM_CPU(first_cpu); - bool aarch64 = object_property_get_bool(OBJECT(cpu), "aarch64", NULL); - - if (aarch64 && vms->highmem) { - int requested_pa_size, pamax = arm_pamax(cpu); - - requested_pa_size = 64 - clz64(vms->highest_gpa); - if (pamax < requested_pa_size) { - error_report("VCPU supports less PA bits (%d) than requested " - "by the memory map (%d)", pamax, requested_pa_size); - exit(1); - } - } - } - memory_region_add_subregion(sysmem, vms->memmap[VIRT_MEM].base, machine->ram); if (machine->device_memory) { @@ -1917,6 +1921,8 @@ static void machvirt_init(MachineState *machine) create_gic(vms); + virt_cpu_post_init(vms); + fdt_add_pmu_nodes(vms); create_uart(vms, VIRT_UART, sysmem, serial_hd(0)); From patchwork Tue Sep 8 08:13:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 249292 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4338193ilg; Tue, 8 Sep 2020 01:17:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyaZ062XyA9FqNW7RMAcBebRUD0BOX2HQZbkKNA7lJMpegZB4fVCkUxUJU4yrOuwCamvk/c X-Received: by 2002:a25:cc43:: with SMTP id l64mr30533811ybf.289.1599553035597; Tue, 08 Sep 2020 01:17:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599553035; cv=none; d=google.com; s=arc-20160816; b=G1KpuNrE438y79NmZ045sCMMHaM0xRSAm66KOooepxNiyhqDaw85tVIoKY4AGK7z7x /DJvPUuMVwaLHx5EvITGWWpfRhDqXTDX9w5o4ZvwIGpW1GEr4ewi3QEXNet4ULLfysgG Phe2LQ9+RqAoowM0hKHqxIE24x3s/cA3BXFW8Jn+LaWcXs/eu5MzVBG8/YJ5N5B8/IEW VCMlcrpLTh/H+aKnibv7MYE2yIpaz6UTzCcYn0BLFUbTwsCpTxQ4z2FdQ4N3FWplYTFq lLoaRKcVo9WFhZ+Rp8unzmhONEuU0slauosmZCXvMakq0/4xa+90qrPZgr50ZAGZMLJo 3kjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=VVgURpjuArAMDrEKjpU9KwbLTs4HVxWM7QaG/94weX8=; b=sYq6QcbXQlX0irUgdIv5cju1clnAsGx4mPbOtBxhSRkvt+1ay3P5/U4A+nwSDEPsKv X2H82PsXm0WMEHYzLzioqvPj7tvDb37QrrfpQcNUBhFAjoqB4NRV3lLpyvQa8hURBPjl HF/32ohFSi4mnHQ5Q2lKY1NcTfKtC7hZhwfm+KVxgEjm2FII94pBos90tYlncjtQkw0h m/ENUBakSirR6R+tl/Kb2BRFIu22DN5ubfv2eUh3LzsB29KukL32KmBBqS6OyuXtloE2 Ksb6bXcWA5d6Eqm/taTJ+ENDxJ/nK7dH7lFumKMEScY4Xpx/e7QhedLCtL8cK41GuRrE 4PdA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ap1msIb8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id g40si751096ybe.70.2020.09.08.01.17.15 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 08 Sep 2020 01:17:15 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ap1msIb8; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:39542 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYoV-00044v-2Z for patch@linaro.org; Tue, 08 Sep 2020 04:17:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58546) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlK-00060P-7G for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:58 -0400 Received: from mail-pj1-x1042.google.com ([2607:f8b0:4864:20::1042]:40726) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlF-0000Se-MB for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:57 -0400 Received: by mail-pj1-x1042.google.com with SMTP id gf14so7629647pjb.5 for ; Tue, 08 Sep 2020 01:13:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=VVgURpjuArAMDrEKjpU9KwbLTs4HVxWM7QaG/94weX8=; b=ap1msIb8TT2AJK0n67LMP9CkJ7Zh9jrn8OzxQoi5+AiPMPuPFTpEPp8vw0o+zZ6fOo c9pp2gy4B4HBO0o9+/rSFx0gqKjFFVPCKZZPQ9ElNy+p3xGtYAR82dVJV2N+GLPoiKAI sSio2R1rAAjQbaEtg0Rp5NNL9fs6DZin2UR9Jwe5Xo0jUmfmAnlDUoGoiHSI8aYGe5YX vHUOybrqLMCVCbTX1SkyY70YpWtyWdHogAtVUovjepeP4c6GTBLGLzZscs/FiaZuMisF E+2wFWR20cp2fZqt07vDp8q7D1ibeb+Hm0HA4Tg7wsF2Fmcw3hnKuQ5fxXfrej7NN35J Me6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=VVgURpjuArAMDrEKjpU9KwbLTs4HVxWM7QaG/94weX8=; b=rj++G4VWeiMBN14feIyjbvlQm1JWIH9HFROSX63nrLMA27flzSwd/AEPUTnIWmQ8p5 RhKjzzIgADCIeb3C9jJOS9X75hJSAQBsYgo4rUZ01cv1lbAKK0hYJwZQqnJ4ROmFclj/ j3ypcMrVcBMvpdtDKirKp+g9WHCEvfN12dwSvy8pEW/8dnVge0hClIPDKErEJqc/fcRg 4NlZkws+vGKLK4vla2kvghmrYdJmHdLwXowqfaIU6dOdZ0Ka0NL87WF7dZPwaivRsA/j b80Lspngd9O4Q4kTGONoLX0LRo1bkY7tGbkWEplqWZgn5+MQ/gn6k5ArajABSFsEX7oP 8z8Q== X-Gm-Message-State: AOAM531UrET9hELArRiJuFm7avY0sUB7zDV1cHMtWfaU7wc2q/PYoW3+ ueP1WC2pBBqtXSe9z7CP23dw X-Received: by 2002:a17:90a:634c:: with SMTP id v12mr2904904pjs.57.1599552832108; Tue, 08 Sep 2020 01:13:52 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:51 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 08/12] hw/arm/virt: Move kvm pmu setup to virt_cpu_post_init Date: Tue, 8 Sep 2020 08:13:26 +0000 Message-Id: <7982854bb6cdb90390ea3f3c39c2801ef84fd2e5.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1042; envelope-from=haibo.xu@linaro.org; helo=mail-pj1-x1042.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Andrew Jones Move the KVM PMU setup part of fdt_add_pmu_nodes() to virt_cpu_post_init(), which is a more appropriate location. Now fdt_add_pmu_nodes() is also named more appropriately, because it no longer does anything but fdt node creation. No functional change intended. Signed-off-by: Andrew Jones --- hw/arm/virt.c | 34 ++++++++++++++++++---------------- 1 file changed, 18 insertions(+), 16 deletions(-) -- 2.17.1 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 2ffcb073af..6bacfb668d 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -521,21 +521,12 @@ static void fdt_add_gic_node(VirtMachineState *vms) static void fdt_add_pmu_nodes(const VirtMachineState *vms) { - CPUState *cpu; - ARMCPU *armcpu; + ARMCPU *armcpu = ARM_CPU(first_cpu); uint32_t irqflags = GIC_FDT_IRQ_FLAGS_LEVEL_HI; - CPU_FOREACH(cpu) { - armcpu = ARM_CPU(cpu); - if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { - return; - } - if (kvm_enabled()) { - if (kvm_irqchip_in_kernel()) { - kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ)); - } - kvm_arm_pmu_init(cpu); - } + if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { + assert(!object_property_get_bool(OBJECT(armcpu), "pmu", NULL)); + return; } if (vms->gic_version == VIRT_GIC_VERSION_2) { @@ -544,7 +535,6 @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms) (1 << vms->smp_cpus) - 1); } - armcpu = ARM_CPU(qemu_get_cpu(0)); qemu_fdt_add_subnode(vms->fdt, "/pmu"); if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { const char compat[] = "arm,armv8-pmuv3"; @@ -1674,11 +1664,23 @@ static void finalize_gic_version(VirtMachineState *vms) static void virt_cpu_post_init(VirtMachineState *vms) { - bool aarch64; + bool aarch64, pmu; + CPUState *cpu; aarch64 = object_property_get_bool(OBJECT(first_cpu), "aarch64", NULL); + pmu = object_property_get_bool(OBJECT(first_cpu), "pmu", NULL); - if (!kvm_enabled()) { + if (kvm_enabled()) { + CPU_FOREACH(cpu) { + if (pmu) { + assert(arm_feature(&ARM_CPU(cpu)->env, ARM_FEATURE_PMU)); + if (kvm_irqchip_in_kernel()) { + kvm_arm_pmu_set_irq(cpu, PPI(VIRTUAL_PMU_IRQ)); + } + kvm_arm_pmu_init(cpu); + } + } + } else { if (aarch64 && vms->highmem) { int requested_pa_size = 64 - clz64(vms->highest_gpa); int pamax = arm_pamax(ARM_CPU(first_cpu)); From patchwork Tue Sep 8 08:13:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 249288 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4336698ilg; Tue, 8 Sep 2020 01:14:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy3+HDT4TYrkzPFRcOPKNnTY0OoszcE0i8qY9mnBlGD3GZnSR44x2Rb19N547Yf7RSC31m0 X-Received: by 2002:a25:81cb:: with SMTP id n11mr2390743ybm.341.1599552891517; Tue, 08 Sep 2020 01:14:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599552891; cv=none; d=google.com; s=arc-20160816; b=MrLldKEH1RIgrzV1/sKaY55WRF8tUBDP7OLrqQev0ZNBs+a/cnCqPWs9oL7KpBSb3B ZpdC0vRT4GziRL3M9zsJwyo3pUc8SIrvOv9C/WAXd12vJjAbzhUT4kMvC0Kc9VeHRoaC 8o5FelO98BUM7JEclw8A43fSm2unj3HrFj9ZcM5VBpmR0+BjdvDhHrKSjogjsz6iXdrb sxN/eE9aQG6iZ/9t5Hj8FipnGGwZ3VjfWtXhZUGOcaR3Q3eL8B74X0nx+AdNwf5uyR7y /x0YXycxkln8Km/x4b39QrK48Nd67w0fuihWtBC66qbOWDGkPOIX/cUrfGs43vsq9Ar4 piqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=BoRDf3bit7IL/G7WkzeTS4vBLLuVcOFhR6tLcvMtZHA=; b=JU/etY4HZLus5HF+BZXWkRatuSZv4Ynau0uxfF+322IqE6OPeF/qzU0nGDFK12Cb98 atO/K6P9EzRbswT/DDSphphYjE7SPECqBs8UiNW9KnLC/Dg+9rKF5P8PUL3eXnZiT1P9 pBNiWHcTpfUXMtEx8XiHiPMhDIzhCzbWX0sZlr560Q1h7hcYAKvXG82PcsMYRyruLASO 6kryEsq8YXFxuIKttA5c25dIGTgA/IrmaAuxNIN+hbAY6I/Jzx47hWMBIhHgSt6Z0PGG 3w/JN8v7wcPAizBJ/7un/4uZncQGyHPXvCtykBWalcHKNlvtFbSzWhwmNTrhfMk17mZU csUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=wjld9RWo; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Add a virtual SPE device for virt machine while using PPI 5 for SPE overflow interrupt number which has already selected in kvmtool. Signed-off-by: Haibo Xu --- hw/arm/virt-acpi-build.c | 3 +++ hw/arm/virt.c | 43 ++++++++++++++++++++++++++++++++++++- include/hw/acpi/acpi-defs.h | 3 +++ include/hw/arm/virt.h | 1 + target/arm/cpu.c | 2 ++ target/arm/cpu.h | 2 ++ 6 files changed, 53 insertions(+), 1 deletion(-) -- 2.17.1 Reviewed-by: Andrew Jones diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 9efd7a3881..3fd80fda53 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -665,6 +665,9 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) if (arm_feature(&armcpu->env, ARM_FEATURE_PMU)) { gicc->performance_interrupt = cpu_to_le32(PPI(VIRTUAL_PMU_IRQ)); } + if (cpu_isar_feature(aa64_spe, armcpu)) { + gicc->spe_interrupt = cpu_to_le32(PPI(VIRTUAL_SPE_IRQ)); + } if (vms->virt) { gicc->vgic_interrupt = cpu_to_le32(PPI(ARCH_GIC_MAINT_IRQ)); } diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 6bacfb668d..bdb1ce925c 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -545,6 +545,32 @@ static void fdt_add_pmu_nodes(const VirtMachineState *vms) } } +static void fdt_add_spe_nodes(const VirtMachineState *vms) +{ + ARMCPU *armcpu = ARM_CPU(first_cpu); + uint32_t irqflags = GIC_FDT_IRQ_FLAGS_LEVEL_HI; + + if (!cpu_isar_feature(aa64_spe, armcpu)) { + assert(!object_property_get_bool(OBJECT(armcpu), "spe", NULL)); + return; + } + + if (vms->gic_version == VIRT_GIC_VERSION_2) { + irqflags = deposit32(irqflags, GIC_FDT_IRQ_PPI_CPU_START, + GIC_FDT_IRQ_PPI_CPU_WIDTH, + (1 << vms->smp_cpus) - 1); + } + + qemu_fdt_add_subnode(vms->fdt, "/spe"); + if (arm_feature(&armcpu->env, ARM_FEATURE_V8)) { + const char compat[] = "arm,statistical-profiling-extension-v1"; + qemu_fdt_setprop(vms->fdt, "/spe", "compatible", + compat, sizeof(compat)); + qemu_fdt_setprop_cells(vms->fdt, "/spe", "interrupts", + GIC_FDT_IRQ_TYPE_PPI, VIRTUAL_SPE_IRQ, irqflags); + } +} + static inline DeviceState *create_acpi_ged(VirtMachineState *vms) { DeviceState *dev; @@ -717,6 +743,10 @@ static void create_gic(VirtMachineState *vms) qdev_get_gpio_in(vms->gic, ppibase + VIRTUAL_PMU_IRQ)); + qdev_connect_gpio_out_named(cpudev, "spe-interrupt", 0, + qdev_get_gpio_in(vms->gic, ppibase + + VIRTUAL_SPE_IRQ)); + sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ)); sysbus_connect_irq(gicbusdev, i + smp_cpus, qdev_get_gpio_in(cpudev, ARM_CPU_FIQ)); @@ -1664,11 +1694,12 @@ static void finalize_gic_version(VirtMachineState *vms) static void virt_cpu_post_init(VirtMachineState *vms) { - bool aarch64, pmu; + bool aarch64, pmu, spe; CPUState *cpu; aarch64 = object_property_get_bool(OBJECT(first_cpu), "aarch64", NULL); pmu = object_property_get_bool(OBJECT(first_cpu), "pmu", NULL); + spe = object_property_get_bool(OBJECT(first_cpu), "spe", NULL); if (kvm_enabled()) { CPU_FOREACH(cpu) { @@ -1679,6 +1710,14 @@ static void virt_cpu_post_init(VirtMachineState *vms) } kvm_arm_pmu_init(cpu); } + + if (spe) { + assert(ARM_CPU(cpu)->has_spe == ON_OFF_AUTO_ON); + if (kvm_irqchip_in_kernel()) { + kvm_arm_spe_set_irq(cpu, PPI(VIRTUAL_SPE_IRQ)); + } + kvm_arm_spe_init(cpu); + } } } else { if (aarch64 && vms->highmem) { @@ -1927,6 +1966,8 @@ static void machvirt_init(MachineState *machine) fdt_add_pmu_nodes(vms); + fdt_add_spe_nodes(vms); + create_uart(vms, VIRT_UART, sysmem, serial_hd(0)); if (vms->secure) { diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h index 38a42f409a..21e58f27c5 100644 --- a/include/hw/acpi/acpi-defs.h +++ b/include/hw/acpi/acpi-defs.h @@ -302,6 +302,9 @@ struct AcpiMadtGenericCpuInterface { uint32_t vgic_interrupt; uint64_t gicr_base_address; uint64_t arm_mpidr; + uint8_t efficiency_class; + uint8_t reserved2[1]; + uint16_t spe_interrupt; /* ACPI 6.3 */ } QEMU_PACKED; typedef struct AcpiMadtGenericCpuInterface AcpiMadtGenericCpuInterface; diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 72c269aaa5..6013b6d535 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -49,6 +49,7 @@ #define ARCH_TIMER_NS_EL1_IRQ 14 #define ARCH_TIMER_NS_EL2_IRQ 10 +#define VIRTUAL_SPE_IRQ 5 #define VIRTUAL_PMU_IRQ 7 #define PPI(irq) ((irq) + 16) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index f211958eaa..786cc6134c 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1041,6 +1041,8 @@ static void arm_cpu_initfn(Object *obj) "gicv3-maintenance-interrupt", 1); qdev_init_gpio_out_named(DEVICE(cpu), &cpu->pmu_interrupt, "pmu-interrupt", 1); + qdev_init_gpio_out_named(DEVICE(cpu), &cpu->spe_interrupt, + "spe-interrupt", 1); #endif /* DTB consumers generally don't in fact care what the 'compatible' diff --git a/target/arm/cpu.h b/target/arm/cpu.h index baf2bbcee8..395a1e5df8 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -800,6 +800,8 @@ struct ARMCPU { qemu_irq gicv3_maintenance_interrupt; /* GPIO output for the PMU interrupt */ qemu_irq pmu_interrupt; + /* GPIO output for the SPE interrupt */ + qemu_irq spe_interrupt; /* MemoryRegion to use for secure physical accesses */ MemoryRegion *secure_memory; From patchwork Tue Sep 8 08:13:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 249291 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4337669ilg; Tue, 8 Sep 2020 01:16:27 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxgq38kPFWoZO4zi6PS+5cp9O7v00D9pH3wSp/TM5empvhGLFRHvmy1q86S1J8OdlCB948X X-Received: by 2002:a25:d0c8:: with SMTP id h191mr31847172ybg.368.1599552987442; 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[209.51.188.17]) by mx.google.com with ESMTPS id l6si12527181ybj.55.2020.09.08.01.16.27 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 08 Sep 2020 01:16:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=tygBGNMB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:33984 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYni-0001s4-UQ for patch@linaro.org; Tue, 08 Sep 2020 04:16:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58536) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlJ-0005zd-T4 for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:57 -0400 Received: from mail-pj1-x1043.google.com ([2607:f8b0:4864:20::1043]:38543) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlH-0000US-W2 for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:13:57 -0400 Received: by mail-pj1-x1043.google.com with SMTP id u3so4406317pjr.3 for ; Tue, 08 Sep 2020 01:13:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=RpQ5D9PS9xG+hTVvcmsid1OIpZVPjd/FQJ67FPFmIxg=; b=tygBGNMByyJ4nCb/OLcN5vsYChUumDca0o1GOgCzknvCENCS2CHn/UCzjQJDYXME+p My4hkNbt+tgQJNzqclI3OmZqcHYHm1lGwfDR1ijhUd6NHm/lH2gHJ/gIqnzYrzbmo5xU L9gen8VsMmMmyDQ6PbBJwiComDmcLyfukkBzBdgbQ7jn+OJghm8PNksjiTzkDiYoNQeV dDLVNHW2p6UABTPPUc2JkFPbtAtTE9FMh4SNVZ4REbaY32xTIXM26sTtMIuy5eJ3ZdVS D3t8cnpmQQXMe2kmy/KkRZIisZ60J+WoNoJIkiH+ZHNSquj2nnd0iucrFCqc1GulvhBx deXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=RpQ5D9PS9xG+hTVvcmsid1OIpZVPjd/FQJ67FPFmIxg=; b=CFk+bSfSO7AumJrTFVuiyJSizY9MYaVTnGiU0SD0bchlBS9vNSracLBYIWLwSLE5lM eTAwYDpDoC8V6k7gtHstDbGdQfdBEbIp4M0VirIjB5n75OLsXYsdBB5FuZeuKOE7VjLW KelmQ7ZipCUEAmkvIhpFLBXNcs9cOv1OAnoRukjMxf1QIZOvC9+ExEePjB67rUAyh41g kzryphDPt17y/c5bLYhwo+9TkOBSxYIi+YImnOmXHkeBRLA39K7gP7IUjRVhb9NetNcu lJXbJy6XQ+f+AgqaaJTThStZaYFffmR5DF+ppD330mgeA0jl7OzCk8Z3B4tu+jPGa7ML TyxQ== X-Gm-Message-State: AOAM532RTBUt0uEeSbq5xQb4DGLwGqEvxKVFUuS5GQKH1yUul0YdOfet oqcGvhZbR+fPUW6YH6NZHfVX X-Received: by 2002:a17:90a:fb52:: with SMTP id iq18mr2977782pjb.162.1599552834732; Tue, 08 Sep 2020 01:13:54 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:54 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 10/12] target/arm/cpu: spe: Enable spe to work with host cpu Date: Tue, 8 Sep 2020 08:13:28 +0000 Message-Id: <26b4ace9ea3c5b43d14802d6fc5ceea90befbcc8.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1043; envelope-from=haibo.xu@linaro.org; helo=mail-pj1-x1043.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Turn on the spe cpu property by default if host cpu support it, i.e. we can now do '-cpu max|host' to add the vSPE, and '-cpu max|host,spe=off' to remove it. Signed-off-by: Haibo Xu --- target/arm/cpu.c | 3 +++ target/arm/cpu.h | 2 ++ target/arm/cpu64.c | 7 ++++++- target/arm/kvm64.c | 12 ++++++++++++ 4 files changed, 23 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 786cc6134c..58f12d6eb5 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2271,6 +2271,9 @@ static void arm_host_initfn(Object *obj) kvm_arm_set_cpu_features_from_host(cpu); if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { aarch64_add_sve_properties(obj); + + cpu->has_spe = ON_OFF_AUTO_AUTO; + aarch64_add_spe_properties(obj); } arm_cpu_post_init(obj); } diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 395a1e5df8..5a3ea876c8 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1040,6 +1040,7 @@ void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq); void aarch64_sve_change_el(CPUARMState *env, int old_el, int new_el, bool el0_a64); void aarch64_add_sve_properties(Object *obj); +void aarch64_add_spe_properties(Object *obj); /* * SVE registers are encoded in KVM's memory in an endianness-invariant format. @@ -1071,6 +1072,7 @@ static inline void aarch64_sve_change_el(CPUARMState *env, int o, int n, bool a) { } static inline void aarch64_add_sve_properties(Object *obj) { } +static inline void aarch64_add_spe_properties(Object *obj) { } #endif #if !defined(CONFIG_TCG) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 4997c4a3c0..d38c55e2ca 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -621,6 +621,11 @@ static void arm_spe_set(Object *obj, bool value, Error **errp) ARM_CPU(obj)->has_spe = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; } +void aarch64_add_spe_properties(Object *obj) +{ + object_property_add_bool(obj, "spe", arm_spe_get, arm_spe_set); +} + /* -cpu max: if KVM is enabled, like -cpu host (best possible with this host); * otherwise, a CPU with as many features enabled as our emulation supports. * The version of '-cpu max' for qemu-system-arm is defined in cpu.c; @@ -772,7 +777,7 @@ static void aarch64_max_initfn(Object *obj) cpu_max_set_sve_max_vq, NULL, NULL); cpu->has_spe = ON_OFF_AUTO_AUTO; - object_property_add_bool(obj, "spe", arm_spe_get, arm_spe_set); + aarch64_add_spe_properties(obj); } static const ARMCPUInfo aarch64_cpus[] = { diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 5a2032fc9e..3f0a09c05b 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -515,6 +515,7 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) */ int fdarray[3]; bool sve_supported; + bool spe_supported; uint64_t features = 0; uint64_t t; int err; @@ -655,6 +656,8 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) } sve_supported = ioctl(fdarray[0], KVM_CHECK_EXTENSION, KVM_CAP_ARM_SVE) > 0; + spe_supported = ioctl(fdarray[0], KVM_CHECK_EXTENSION, + KVM_CAP_ARM_SPE_V1) > 0; kvm_arm_destroy_scratch_host_vcpu(fdarray); @@ -668,6 +671,11 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf) t = FIELD_DP64(t, ID_AA64PFR0, SVE, 1); ahcf->isar.id_aa64pfr0 = t; } + if (!spe_supported) { + t = ahcf->isar.id_aa64dfr0; + t = FIELD_DP64(t, ID_AA64DFR0, PMSVER, 0); + ahcf->isar.id_aa64dfr0 = t; + } /* * We can assume any KVM supporting CPU is at least a v8 @@ -830,6 +838,10 @@ int kvm_arch_init_vcpu(CPUState *cs) assert(kvm_arm_sve_supported()); cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_SVE; } + if (cpu_isar_feature(aa64_spe, cpu)) { + assert(kvm_arm_spe_supported()); + cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_SPE_V1; + } /* Do KVM_ARM_VCPU_INIT ioctl */ ret = kvm_arm_vcpu_init(cs); From patchwork Tue Sep 8 08:13:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 249295 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4339157ilg; Tue, 8 Sep 2020 01:19:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxs+7yuVq+o72334IaQ7pcpnXrphmyFjKRquY5GJHHIhc4lHS2HVi6IYvlrbOKVuiP4ct55 X-Received: by 2002:a25:3b06:: with SMTP id i6mr33019697yba.270.1599553141023; Tue, 08 Sep 2020 01:19:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599553141; cv=none; d=google.com; s=arc-20160816; b=A78YCHloZU+Sj8T4+CRrzjyEViscUlO+dWWQRgCbWZtJ980fk4doD/GuIhQYfgwHIY pcLcd8uMCp/XH1PlK92AfTNllQwXuybYnb66XpILJELSkuRcSj40SnnADcNWxOAdJuxk OW1zItqh8Sr0iF8ne6963G+UjqSHr6VDw1TpuKwsOa0kTb/MWA1B/TXC+zlaA79LtzPi NwP01v2FOoWoV5MVUSbt7bPOksCEzRIGWBF7KsUgJADSjUPMlAdzD1Xdw1CTsCz094oN Cuhk4IXdm8ZCO5YH3bLZlXl2OAjW04ZIIcJsbBUbvQLfVKPCX2/odIaOYKfOolyVelMG YslA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=65uW6/eJtxdVQ3erFH0nAd+ZJZrP6B7JK355CS4Evd4=; b=E4aNWYFAArhDA0ZoDer1NUdcsz0LiYGbUgWN8dEjWDw1+gtBRcy0/i75qHhaj/qp20 Z1R2G9xjhU6VmmOPT+OQ0PgqwvjlUJOpYwBziHcEGiBXuGOJhmBq2JdS2c5/ub1lA6mw W/Pv4GwCJtqlfVQ/g/lzSE1e19C5H1c1PeDYjWflLZ9Aaa/qQgQPZvGMiwqNIWXDzAEW ZXiZdZLw6/Q8sRSCGTviBvHC0PTnR4eje7ibGtrX/O17y5fOiMLtxbZ7+NgQRokU4cHc 2d9J0n6w7B72yRvopfMQRvYAi0E006ztEXCxdUVVKxRs5xLnXGLTpdxYCnrTThSXYOB1 WsuA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=DtnWrrkp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Date: Tue, 8 Sep 2020 08:13:29 +0000 Message-Id: <6aaa406b824d0c427acbc3f3abfbbe841f3bb93c.1599549462.git.haibo.xu@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::441; envelope-from=haibo.xu@linaro.org; helo=mail-pf1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Since the current kernel patches haven't enabled the userspace irqchip support, this patch is not verified yet! Signed-off-by: Haibo Xu --- linux-headers/linux/kvm.h | 1 + target/arm/kvm.c | 5 +++++ 2 files changed, 6 insertions(+) -- 2.17.1 Reviewed-by: Andrew Jones diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index 8840cbb01c..35ef0ae842 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -1672,6 +1672,7 @@ struct kvm_assigned_msix_entry { #define KVM_ARM_DEV_EL1_VTIMER (1 << 0) #define KVM_ARM_DEV_EL1_PTIMER (1 << 1) #define KVM_ARM_DEV_PMU (1 << 2) +#define KVM_ARM_DEV_SPE (1 << 3) struct kvm_hyperv_eventfd { __u32 conn_id; diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 58f991e890..7950ff1d83 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -820,6 +820,11 @@ MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) switched_level &= ~KVM_ARM_DEV_PMU; } + if (switched_level & KVM_ARM_DEV_SPE) { + qemu_set_irq(cpu->spe_interrupt, + !!(run->s.regs.device_irq_level & KVM_ARM_DEV_SPE)); + switched_level &= ~KVM_ARM_DEV_SPE; + } if (switched_level) { qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n", __func__, switched_level); From patchwork Tue Sep 8 08:13:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haibo Xu X-Patchwork-Id: 249294 Delivered-To: patch@linaro.org Received: by 2002:a92:5b9c:0:0:0:0:0 with SMTP id c28csp4338606ilg; Tue, 8 Sep 2020 01:18:04 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwSQO3YcodU/Y9x6zohp/EvHCgomKgBahrnDph2DdBG/XSuAwVjAdeeRm7yk6GwAgrdoeA4 X-Received: by 2002:a25:743:: with SMTP id 64mr18191457ybh.134.1599553084073; Tue, 08 Sep 2020 01:18:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1599553084; cv=none; d=google.com; s=arc-20160816; b=T5FijR8H32ApGe93WjBICnqH6MurEGmMcumYaG7h0fsAWwpeB5MQJed/luh9/Q1EVb PNdxY4m07MoKMLqqfwDZN/rrS6SPycwAeK34nGIRZlD33g52yOFVm6hRk7iCJHVucMSX 1aH18FBusEZ09epZJsfrQLlZwgZ3BNjv2nQZtMWi4L29SOFYmbwvQXl1Gti7QUlYp7e3 7ksw5AwoK5ChoD0Rb85exqrGDM1k/b9SCtSQLQ73pa4p73kyFxWj5mLqV5FO4yDNrYxM cwmO6xVzfDkSGf29TpK2PSMYdmEJ42K+qHJFj3auS1ZkEIegejX6slcgG3o/kIWj/3XG Rs3Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=zq8jUh6rr55C3iWlgIX0sFstenVLmlXQeyrdeGeUxsU=; b=B5KpCmjouKAkj04M3DwplxJtY02SuX/QlvutzHqoqtY3RFdAfTXmdQ46PMYE5GCoo/ 0QSwBzfaCT6xoRFfuG0wTu3k+/AycsO2jglmpjGdCC4lu1E9mYKvS8vvvLMXz1BC59YX 75wIkY3vHeBvm0qFVWGCz4v5nCJkcEE6tCtRF2/awehrjaEy/zaLc/DqfbfoXqAyph4U ZhE57Jcptyj6mK04vRnDVJox+qFWXQWQkZmXSiNgL+Hd0mJpsuwmoCGZAhKuaR9einoZ Z4jI8RPYZVa/b/9YxM2on5QajZTytiwkizBatqzDNCFHRjEaeAC6VpdueNRoP/tqN+j3 z0Rw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=QfFfk0Hu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s18si10257403ybm.474.2020.09.08.01.18.03 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 08 Sep 2020 01:18:04 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=QfFfk0Hu; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41652 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kFYpH-0004wu-DU for patch@linaro.org; Tue, 08 Sep 2020 04:18:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58610) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kFYlO-0006Dy-L6 for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:14:02 -0400 Received: from mail-pj1-x1042.google.com ([2607:f8b0:4864:20::1042]:51783) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1kFYlL-0000VL-Uz for qemu-devel@nongnu.org; Tue, 08 Sep 2020 04:14:02 -0400 Received: by mail-pj1-x1042.google.com with SMTP id a9so4692026pjg.1 for ; Tue, 08 Sep 2020 01:13:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zq8jUh6rr55C3iWlgIX0sFstenVLmlXQeyrdeGeUxsU=; b=QfFfk0HucHpO/x5Jc0DCHPv1/TNxgbR0bKs0thQNWDve3EYX38Od2x6m0shvaVR3lm 9IPFIl3SxZp1ttV76d2ZXNjFdLiO58rjGbORvuCAE5b8JZncIo2sVSmId5z8POfV1aH9 mup4t48Yh6gCUidgmvJr7xt+opOUkEC8neR7IcPYhlSxfw1GOLIR7Gp6yRjKDAcniPay xPVMotf6YWG9sZvVyZXOEoAn8d2z5K75Fz7Y3iWfEOpVtYORH/cpPhYzETIDxnh7WFgj 1BJ4jDdOBjd04i05OZ6LPLc+Y4Bq4tgN+lMr5GatQcVaVRxbQooWukUPSyU8MGGUsmWB AS3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zq8jUh6rr55C3iWlgIX0sFstenVLmlXQeyrdeGeUxsU=; b=t8JU80heHZpxL5GpQomgSTOrZIWMm7m6vJTyTdTJkNNzsOiHyD2eets+tpL3+7gSeX HEgpfm4+z1wPYRsWQO/LODcCod//CE+LThuiNFeg3WmeIla7+ubOyf444T7UKuxeBDHE zcRwDkTC5kUkmloVYxtLfe0/yuZkH6xx0LCc9KYvMmxdp/zAUTYTCph3VakNdKMO3jMZ 50w1+saOYZJecZao8zQzUB4b7QywQUEfhIGKwxOKCdgI/gX/YER1u8h9Z/ttCuzvMQZE UnYB2Kg2nO2/Kp19l/Hz8oTY/uKFkkCPLDOwSwlg3He6+UK5Gfk03TRBpxmlrjzshPdy 6Www== X-Gm-Message-State: AOAM533ngwOhImqr7b/0EbnchuJHJY+tONvO+0QxTSMv3NkhNXju3fbO RCD7JC1ewWn1ua89lxnkKKrO X-Received: by 2002:a17:90b:1212:: with SMTP id gl18mr2103309pjb.138.1599552837216; Tue, 08 Sep 2020 01:13:57 -0700 (PDT) Received: from localhost.localdomain ([147.75.106.138]) by smtp.gmail.com with ESMTPSA id m190sm16934788pfm.184.2020.09.08.01.13.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2020 01:13:56 -0700 (PDT) From: Haibo Xu To: drjones@redhat.com, richard.henderson@linaro.org Subject: [PATCH v2 12/12] target/arm: spe: Add corresponding doc and test. Date: Tue, 8 Sep 2020 08:13:30 +0000 Message-Id: X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1042; envelope-from=haibo.xu@linaro.org; helo=mail-pj1-x1042.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, philmd@redhat.com, qemu-devel@nongnu.org, Haibo Xu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Haibo Xu --- docs/system/arm/cpu-features.rst | 20 ++++++++++++++++++++ target/arm/monitor.c | 2 +- tests/qtest/arm-cpu-features.c | 9 +++++++++ 3 files changed, 30 insertions(+), 1 deletion(-) -- 2.17.1 Reviewed-by: Andrew Jones diff --git a/docs/system/arm/cpu-features.rst b/docs/system/arm/cpu-features.rst index 2d5c06cd01..5b81b9a560 100644 --- a/docs/system/arm/cpu-features.rst +++ b/docs/system/arm/cpu-features.rst @@ -344,3 +344,23 @@ verbose command lines. However, the recommended way to select vector lengths is to explicitly enable each desired length. Therefore only example's (1), (4), and (6) exhibit recommended uses of the properties. +SPE CPU Property +================== + +The SPE CPU property `spe` is used to enable or disable the SPE feature, +just as the `pmu` CPU property completely enables or disables the PMU. + +Currently, this property is only available with KVM mode, and is enabled +by default if KVM support it. When KVM is enabled, if the host does not +support SPE, then an error is generated when attempting to enable it. + +Following are 2 examples to use this property: + + 1) Disable SPE:: + + $ qemu-system-aarch64 -M virt,accel=kvm -cpu max,spe=off + + 2) Implicitly enable it with the `host` CPU type if host cpu + support it:: + + $ qemu-system-aarch64 -M virt,accel=kvm -cpu host diff --git a/target/arm/monitor.c b/target/arm/monitor.c index ba6e01abd0..1b8f08988a 100644 --- a/target/arm/monitor.c +++ b/target/arm/monitor.c @@ -99,7 +99,7 @@ QEMU_BUILD_BUG_ON(ARM_MAX_VQ > 16); * then the order that considers those dependencies must be used. */ static const char *cpu_model_advertised_features[] = { - "aarch64", "pmu", "sve", + "aarch64", "pmu", "spe", "sve", "sve128", "sve256", "sve384", "sve512", "sve640", "sve768", "sve896", "sve1024", "sve1152", "sve1280", "sve1408", "sve1536", "sve1664", "sve1792", "sve1920", "sve2048", diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c index 77b5e30a9c..4d393fb2e2 100644 --- a/tests/qtest/arm-cpu-features.c +++ b/tests/qtest/arm-cpu-features.c @@ -494,6 +494,7 @@ static void test_query_cpu_model_expansion_kvm(const void *data) if (g_str_equal(qtest_get_arch(), "aarch64")) { bool kvm_supports_sve; + bool kvm_supports_spe; char max_name[8], name[8]; uint32_t max_vq, vq; uint64_t vls; @@ -512,8 +513,10 @@ static void test_query_cpu_model_expansion_kvm(const void *data) "with KVM on this host", NULL); assert_has_feature(qts, "host", "sve"); + assert_has_feature(qts, "host", "spe"); resp = do_query_no_props(qts, "host"); kvm_supports_sve = resp_get_feature(resp, "sve"); + kvm_supports_spe = resp_get_feature(resp, "spe"); vls = resp_get_sve_vls(resp); qobject_unref(resp); @@ -573,10 +576,16 @@ static void test_query_cpu_model_expansion_kvm(const void *data) } else { g_assert(vls == 0); } + + if (kvm_supports_spe) { + assert_set_feature(qts, "host", "spe", false); + assert_set_feature(qts, "host", "spe", true); + } } else { assert_has_not_feature(qts, "host", "aarch64"); assert_has_not_feature(qts, "host", "pmu"); assert_has_not_feature(qts, "host", "sve"); + assert_has_not_feature(qts, "host", "spe"); } qtest_quit(qts);