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[209.132.180.67]) by mx.google.com with ESMTP id c11si2472192pfh.312.2017.10.11.05.02.59; Wed, 11 Oct 2017 05:02:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=G//O9VLj; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757286AbdJKMC5 (ORCPT + 26 others); Wed, 11 Oct 2017 08:02:57 -0400 Received: from mail-wm0-f44.google.com ([74.125.82.44]:56306 "EHLO mail-wm0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751979AbdJKMCj (ORCPT ); Wed, 11 Oct 2017 08:02:39 -0400 Received: by mail-wm0-f44.google.com with SMTP id u138so4111104wmu.4 for ; Wed, 11 Oct 2017 05:02:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=E6fQc24beuYmraCAEXBK6IVUB4AnvA3w33vu2rfZVe4=; b=G//O9VLjqpoh7LdbwFsd84XWbEKEpdRHePviUO8mWDkjhG2XKgSNaVukG9I+bfS8bp hWLgYFS4Sd4xak753KEcHNwwsAPkXc12klBAktelrEaubtTnYIxSLuMUQAqkwB1qD3tu 9Ib3MtJVyM5EtXvHUS1ZW3R6jEiWVi8S52qwln4uAHR5pHtSLHK+5M2qctj4uDXuROXO 7N+4SgnSIZZ+kC06cP4Ezdd2dseUWoKOlljmJ8OdLKs7mlHe05AzKau+/UwkbiTHvAza 7dXFUqnS/MZS3ekEF9p16d4/b57FGmSTI75J2tRDY0UvhCtb+EyI7Ws8/H7toWUewHXC mCOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=E6fQc24beuYmraCAEXBK6IVUB4AnvA3w33vu2rfZVe4=; b=b7VRiyQSR3vIOZXzESB6NGNWMuReazhpaAL84lZwrxcU534hPUKV2n9LruvC4PPMEX prhilz0Axn27YFafEPlRslBfiVEPF5rQa9XmIRAlYssGCCGYCxDB6n/6G0bzDyVu87p3 uDgqFrpM1jFfGu8wNsGasBpYvBfMq9DrK9OtLA2tX+llnX3Kdr1EHu1kRnOVV0k7pd1z 71/xtMAZ41HxQwxWLf5ZBaVsEXmDwndkak7u4yeRRRqzqk9WnuYlhk61yZG6eFnXj0q6 8wfbRws9aJ+k6HPRqWCbHTImwBl8L9co2Vcgd4Va0loD+5nh3O3MIZLjJRJz864mfXn/ Az+A== X-Gm-Message-State: AMCzsaWVB0JWWaMXVqsEAAM8EzS4z9lPmM9kgwaXa0XaGknLgxUdhV96 CB7azLTnn6Tz9eQBeDAxYF5t+Q== X-Google-Smtp-Source: AOwi7QBz3U/zW8bRc42C/mYtIsAvhdnvG57OuAlN+htL13gkPT3yu/zZQDjVvH98RsAU5ASTC1ZGQQ== X-Received: by 10.28.147.208 with SMTP id v199mr12702418wmd.136.1507723357637; Wed, 11 Oct 2017 05:02:37 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id z192sm14080016wmz.28.2017.10.11.05.02.36 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 Oct 2017 05:02:37 -0700 (PDT) From: Jerome Brunet To: Linus Walleij , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-gpio@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] pinctrl: meson: separate soc drivers Date: Wed, 11 Oct 2017 14:02:29 +0200 Message-Id: <20171011120230.30483-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171011120230.30483-1-jbrunet@baylibre.com> References: <20171011120230.30483-1-jbrunet@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When meson pinctrl is enabled, all meson platforms pinctrl drivers are built in the kernel, with a significant amount of data. This leads to situation where pinctrl drivers targeting an architecture are also compiled and shipped on another one (ex: meson8 - ARM - compiled and shipped on ARM64 builds). This is a waste of memory we can easily avoid. This change makes 4 pinctrl drivers (1 per SoC) out the original single driver, allowing to compile and ship only the ones required. Reviewed-by: Neil Armstrong Signed-off-by: Jerome Brunet --- drivers/pinctrl/Kconfig | 11 +----- drivers/pinctrl/meson/Kconfig | 36 ++++++++++++++++++++ drivers/pinctrl/meson/Makefile | 8 +++-- drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 25 ++++++++++++-- drivers/pinctrl/meson/pinctrl-meson-gxl.c | 25 ++++++++++++-- drivers/pinctrl/meson/pinctrl-meson.c | 54 +++--------------------------- drivers/pinctrl/meson/pinctrl-meson.h | 11 ++---- drivers/pinctrl/meson/pinctrl-meson8.c | 25 ++++++++++++-- drivers/pinctrl/meson/pinctrl-meson8b.c | 25 ++++++++++++-- 9 files changed, 141 insertions(+), 79 deletions(-) create mode 100644 drivers/pinctrl/meson/Kconfig -- 2.13.6 diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 1778cf4f81c7..15b5b3b76ba9 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -167,16 +167,6 @@ config PINCTRL_MCP23S08 This provides a GPIO interface supporting inputs and outputs. The I2C versions of the chips can be used as interrupt-controller. -config PINCTRL_MESON - bool - depends on OF - select PINMUX - select PINCONF - select GENERIC_PINCONF - select GPIOLIB - select OF_GPIO - select REGMAP_MMIO - config PINCTRL_OXNAS bool depends on OF @@ -368,6 +358,7 @@ source "drivers/pinctrl/uniphier/Kconfig" source "drivers/pinctrl/vt8500/Kconfig" source "drivers/pinctrl/mediatek/Kconfig" source "drivers/pinctrl/zte/Kconfig" +source "drivers/pinctrl/meson/Kconfig" config PINCTRL_XWAY bool diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig new file mode 100644 index 000000000000..15655bfd39b6 --- /dev/null +++ b/drivers/pinctrl/meson/Kconfig @@ -0,0 +1,36 @@ +menuconfig PINCTRL_MESON + bool "Amlogic SoC pinctrl drivers" + depends on ARCH_MESON || COMPILE_TEST + depends on OF + select PINMUX + select PINCONF + select GENERIC_PINCONF + select GPIOLIB + select OF_GPIO + select REGMAP_MMIO + select PINMUX + select GENERIC_PINCONF + +if PINCTRL_MESON + +config PINCTRL_MESON8 + bool "Meson 8 SoC pinctrl driver" + depends on ARM + default y + +config PINCTRL_MESON8B + bool "Meson 8b SoC pinctrl driver" + depends on ARM + default y + +config PINCTRL_MESON_GXBB + bool "Meson gxbb SoC pinctrl driver" + depends on ARM64 + default y + +config PINCTRL_MESON_GXL + bool "Meson gxl SoC pinctrl driver" + depends on ARM64 + default y + +endif diff --git a/drivers/pinctrl/meson/Makefile b/drivers/pinctrl/meson/Makefile index 27c5b5126008..a6ef5ff4e9b1 100644 --- a/drivers/pinctrl/meson/Makefile +++ b/drivers/pinctrl/meson/Makefile @@ -1,3 +1,5 @@ -obj-y += pinctrl-meson8.o pinctrl-meson8b.o -obj-y += pinctrl-meson-gxbb.o pinctrl-meson-gxl.o -obj-y += pinctrl-meson.o +obj-y += pinctrl-meson.o +obj-$(CONFIG_PINCTRL_MESON8) += pinctrl-meson8.o +obj-$(CONFIG_PINCTRL_MESON8B) += pinctrl-meson8b.o +obj-$(CONFIG_PINCTRL_MESON_GXBB) += pinctrl-meson-gxbb.o +obj-$(CONFIG_PINCTRL_MESON_GXL) += pinctrl-meson-gxl.o diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index 1881d4a0eca2..a87bdb17414b 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -824,7 +824,7 @@ static struct meson_bank meson_gxbb_aobus_banks[] = { BANK("AO", GPIOAO_0, GPIOAO_13, 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), }; -struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = { +static struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = { .name = "periphs-banks", .pins = meson_gxbb_periphs_pins, .groups = meson_gxbb_periphs_groups, @@ -836,7 +836,7 @@ struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = { .num_banks = ARRAY_SIZE(meson_gxbb_periphs_banks), }; -struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = { +static struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = { .name = "aobus-banks", .pins = meson_gxbb_aobus_pins, .groups = meson_gxbb_aobus_groups, @@ -847,3 +847,24 @@ struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = { .num_funcs = ARRAY_SIZE(meson_gxbb_aobus_functions), .num_banks = ARRAY_SIZE(meson_gxbb_aobus_banks), }; + +static const struct of_device_id meson_gxbb_pinctrl_dt_match[] = { + { + .compatible = "amlogic,meson-gxbb-periphs-pinctrl", + .data = &meson_gxbb_periphs_pinctrl_data, + }, + { + .compatible = "amlogic,meson-gxbb-aobus-pinctrl", + .data = &meson_gxbb_aobus_pinctrl_data, + }, + { }, +}; + +static struct platform_driver meson_gxbb_pinctrl_driver = { + .probe = meson_pinctrl_probe, + .driver = { + .name = "meson-gxbb-pinctrl", + .of_match_table = meson_gxbb_pinctrl_dt_match, + }, +}; +builtin_platform_driver(meson_gxbb_pinctrl_driver); diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c index 3a14ecae9f31..088ac94f76b0 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c @@ -809,7 +809,7 @@ static struct meson_bank meson_gxl_aobus_banks[] = { BANK("AO", GPIOAO_0, GPIOAO_9, 0, 9, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), }; -struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = { +static struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = { .name = "periphs-banks", .pins = meson_gxl_periphs_pins, .groups = meson_gxl_periphs_groups, @@ -821,7 +821,7 @@ struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = { .num_banks = ARRAY_SIZE(meson_gxl_periphs_banks), }; -struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { +static struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { .name = "aobus-banks", .pins = meson_gxl_aobus_pins, .groups = meson_gxl_aobus_groups, @@ -832,3 +832,24 @@ struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { .num_funcs = ARRAY_SIZE(meson_gxl_aobus_functions), .num_banks = ARRAY_SIZE(meson_gxl_aobus_banks), }; + +static const struct of_device_id meson_gxl_pinctrl_dt_match[] = { + { + .compatible = "amlogic,meson-gxl-periphs-pinctrl", + .data = &meson_gxl_periphs_pinctrl_data, + }, + { + .compatible = "amlogic,meson-gxl-aobus-pinctrl", + .data = &meson_gxl_aobus_pinctrl_data, + }, + { }, +}; + +static struct platform_driver meson_gxl_pinctrl_driver = { + .probe = meson_pinctrl_probe, + .driver = { + .name = "meson-gxl-pinctrl", + .of_match_table = meson_gxl_pinctrl_dt_match, + }, +}; +builtin_platform_driver(meson_gxl_pinctrl_driver); diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index 71bccb7acbf8..525e8b17d471 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -50,6 +50,7 @@ #include #include #include +#include #include #include #include @@ -481,42 +482,6 @@ static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio) return !!(val & BIT(bit)); } -static const struct of_device_id meson_pinctrl_dt_match[] = { - { - .compatible = "amlogic,meson8-cbus-pinctrl", - .data = &meson8_cbus_pinctrl_data, - }, - { - .compatible = "amlogic,meson8b-cbus-pinctrl", - .data = &meson8b_cbus_pinctrl_data, - }, - { - .compatible = "amlogic,meson8-aobus-pinctrl", - .data = &meson8_aobus_pinctrl_data, - }, - { - .compatible = "amlogic,meson8b-aobus-pinctrl", - .data = &meson8b_aobus_pinctrl_data, - }, - { - .compatible = "amlogic,meson-gxbb-periphs-pinctrl", - .data = &meson_gxbb_periphs_pinctrl_data, - }, - { - .compatible = "amlogic,meson-gxbb-aobus-pinctrl", - .data = &meson_gxbb_aobus_pinctrl_data, - }, - { - .compatible = "amlogic,meson-gxl-periphs-pinctrl", - .data = &meson_gxl_periphs_pinctrl_data, - }, - { - .compatible = "amlogic,meson-gxl-aobus-pinctrl", - .data = &meson_gxl_aobus_pinctrl_data, - }, - { }, -}; - static int meson_gpiolib_register(struct meson_pinctrl *pc) { int ret; @@ -624,9 +589,8 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc, return 0; } -static int meson_pinctrl_probe(struct platform_device *pdev) +int meson_pinctrl_probe(struct platform_device *pdev) { - const struct of_device_id *match; struct device *dev = &pdev->dev; struct meson_pinctrl *pc; int ret; @@ -636,10 +600,9 @@ static int meson_pinctrl_probe(struct platform_device *pdev) return -ENOMEM; pc->dev = dev; - match = of_match_node(meson_pinctrl_dt_match, pdev->dev.of_node); - pc->data = (struct meson_pinctrl_data *) match->data; + pc->data = (struct meson_pinctrl_data *) of_device_get_match_data(dev); - ret = meson_pinctrl_parse_dt(pc, pdev->dev.of_node); + ret = meson_pinctrl_parse_dt(pc, dev->of_node); if (ret) return ret; @@ -659,12 +622,3 @@ static int meson_pinctrl_probe(struct platform_device *pdev) return meson_gpiolib_register(pc); } - -static struct platform_driver meson_pinctrl_driver = { - .probe = meson_pinctrl_probe, - .driver = { - .name = "meson-pinctrl", - .of_match_table = meson_pinctrl_dt_match, - }, -}; -builtin_platform_driver(meson_pinctrl_driver); diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h index 7ed0a80fd9dc..284157d43612 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -13,6 +13,7 @@ #include #include +#include #include #include @@ -165,11 +166,5 @@ struct meson_pinctrl { #define MESON_PIN(x) PINCTRL_PIN(x, #x) -extern struct meson_pinctrl_data meson8_cbus_pinctrl_data; -extern struct meson_pinctrl_data meson8_aobus_pinctrl_data; -extern struct meson_pinctrl_data meson8b_cbus_pinctrl_data; -extern struct meson_pinctrl_data meson8b_aobus_pinctrl_data; -extern struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data; -extern struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data; -extern struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data; -extern struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data; +/* Common probe function */ +int meson_pinctrl_probe(struct platform_device *pdev); diff --git a/drivers/pinctrl/meson/pinctrl-meson8.c b/drivers/pinctrl/meson/pinctrl-meson8.c index fbf8ecd1c2b6..68b345fc105a 100644 --- a/drivers/pinctrl/meson/pinctrl-meson8.c +++ b/drivers/pinctrl/meson/pinctrl-meson8.c @@ -1044,7 +1044,7 @@ static struct meson_bank meson8_aobus_banks[] = { BANK("AO", GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), }; -struct meson_pinctrl_data meson8_cbus_pinctrl_data = { +static struct meson_pinctrl_data meson8_cbus_pinctrl_data = { .name = "cbus-banks", .pins = meson8_cbus_pins, .groups = meson8_cbus_groups, @@ -1056,7 +1056,7 @@ struct meson_pinctrl_data meson8_cbus_pinctrl_data = { .num_banks = ARRAY_SIZE(meson8_cbus_banks), }; -struct meson_pinctrl_data meson8_aobus_pinctrl_data = { +static struct meson_pinctrl_data meson8_aobus_pinctrl_data = { .name = "ao-bank", .pins = meson8_aobus_pins, .groups = meson8_aobus_groups, @@ -1067,3 +1067,24 @@ struct meson_pinctrl_data meson8_aobus_pinctrl_data = { .num_funcs = ARRAY_SIZE(meson8_aobus_functions), .num_banks = ARRAY_SIZE(meson8_aobus_banks), }; + +static const struct of_device_id meson8_pinctrl_dt_match[] = { + { + .compatible = "amlogic,meson8-cbus-pinctrl", + .data = &meson8_cbus_pinctrl_data, + }, + { + .compatible = "amlogic,meson8-aobus-pinctrl", + .data = &meson8_aobus_pinctrl_data, + }, + { }, +}; + +static struct platform_driver meson8_pinctrl_driver = { + .probe = meson_pinctrl_probe, + .driver = { + .name = "meson8-pinctrl", + .of_match_table = meson8_pinctrl_dt_match, + }, +}; +builtin_platform_driver(meson8_pinctrl_driver); diff --git a/drivers/pinctrl/meson/pinctrl-meson8b.c b/drivers/pinctrl/meson/pinctrl-meson8b.c index 7af296db48c8..4d61df09bc3f 100644 --- a/drivers/pinctrl/meson/pinctrl-meson8b.c +++ b/drivers/pinctrl/meson/pinctrl-meson8b.c @@ -904,7 +904,7 @@ static struct meson_bank meson8b_aobus_banks[] = { BANK("AO", GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 0, 0, 16, 0, 0, 0, 16, 1, 0), }; -struct meson_pinctrl_data meson8b_cbus_pinctrl_data = { +static struct meson_pinctrl_data meson8b_cbus_pinctrl_data = { .name = "cbus-banks", .pins = meson8b_cbus_pins, .groups = meson8b_cbus_groups, @@ -916,7 +916,7 @@ struct meson_pinctrl_data meson8b_cbus_pinctrl_data = { .num_banks = ARRAY_SIZE(meson8b_cbus_banks), }; -struct meson_pinctrl_data meson8b_aobus_pinctrl_data = { +static struct meson_pinctrl_data meson8b_aobus_pinctrl_data = { .name = "aobus-banks", .pins = meson8b_aobus_pins, .groups = meson8b_aobus_groups, @@ -927,3 +927,24 @@ struct meson_pinctrl_data meson8b_aobus_pinctrl_data = { .num_funcs = ARRAY_SIZE(meson8b_aobus_functions), .num_banks = ARRAY_SIZE(meson8b_aobus_banks), }; + +static const struct of_device_id meson8b_pinctrl_dt_match[] = { + { + .compatible = "amlogic,meson8b-cbus-pinctrl", + .data = &meson8b_cbus_pinctrl_data, + }, + { + .compatible = "amlogic,meson8b-aobus-pinctrl", + .data = &meson8b_aobus_pinctrl_data, + }, + { }, +}; + +static struct platform_driver meson8b_pinctrl_driver = { + .probe = meson_pinctrl_probe, + .driver = { + .name = "meson8b-pinctrl", + .of_match_table = meson8b_pinctrl_dt_match, + }, +}; +builtin_platform_driver(meson8b_pinctrl_driver); From patchwork Wed Oct 11 12:02:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 115547 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp668229qgn; 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This new SoC will share the same gpio/pinconf registers but the pinmux part will be different. While the format of the data associated with each pinmux group will change, the way to handle pinmuxing will be similar. To deal with this new situation, the meson_pmx_struture is kept but the data associated to it is now generic. This allows to reuse the basic functions which would otherwise be copy/pasted in each pinmux driver (such as getting the name a count of groups and functions) Only the functions actually using this specific data is taken out of the common code and is handling the SoC pinmuxing Reviewed-by: Neil Armstrong Signed-off-by: Jerome Brunet --- drivers/pinctrl/meson/Kconfig | 7 ++ drivers/pinctrl/meson/Makefile | 1 + drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 3 + drivers/pinctrl/meson/pinctrl-meson-gxl.c | 3 + drivers/pinctrl/meson/pinctrl-meson.c | 96 ++----------------------- drivers/pinctrl/meson/pinctrl-meson.h | 31 +++------ drivers/pinctrl/meson/pinctrl-meson8-pmx.c | 108 +++++++++++++++++++++++++++++ drivers/pinctrl/meson/pinctrl-meson8-pmx.h | 48 +++++++++++++ drivers/pinctrl/meson/pinctrl-meson8.c | 3 + drivers/pinctrl/meson/pinctrl-meson8b.c | 3 + 10 files changed, 194 insertions(+), 109 deletions(-) create mode 100644 drivers/pinctrl/meson/pinctrl-meson8-pmx.c create mode 100644 drivers/pinctrl/meson/pinctrl-meson8-pmx.h -- 2.13.6 diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig index 15655bfd39b6..2fbb593c3a45 100644 --- a/drivers/pinctrl/meson/Kconfig +++ b/drivers/pinctrl/meson/Kconfig @@ -16,21 +16,28 @@ if PINCTRL_MESON config PINCTRL_MESON8 bool "Meson 8 SoC pinctrl driver" depends on ARM + select PINCTRL_MESON8_PMX default y config PINCTRL_MESON8B bool "Meson 8b SoC pinctrl driver" depends on ARM + select PINCTRL_MESON8_PMX default y config PINCTRL_MESON_GXBB bool "Meson gxbb SoC pinctrl driver" depends on ARM64 + select PINCTRL_MESON8_PMX default y config PINCTRL_MESON_GXL bool "Meson gxl SoC pinctrl driver" depends on ARM64 + select PINCTRL_MESON8_PMX default y +config PINCTRL_MESON8_PMX + bool + endif diff --git a/drivers/pinctrl/meson/Makefile b/drivers/pinctrl/meson/Makefile index a6ef5ff4e9b1..40a6b797b259 100644 --- a/drivers/pinctrl/meson/Makefile +++ b/drivers/pinctrl/meson/Makefile @@ -1,4 +1,5 @@ obj-y += pinctrl-meson.o +obj-$(CONFIG_PINCTRL_MESON8_PMX) += pinctrl-meson8-pmx.o obj-$(CONFIG_PINCTRL_MESON8) += pinctrl-meson8.o obj-$(CONFIG_PINCTRL_MESON8B) += pinctrl-meson8b.o obj-$(CONFIG_PINCTRL_MESON_GXBB) += pinctrl-meson-gxbb.o diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index a87bdb17414b..9079020259c5 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -14,6 +14,7 @@ #include #include "pinctrl-meson.h" +#include "pinctrl-meson8-pmx.h" static const struct pinctrl_pin_desc meson_gxbb_periphs_pins[] = { MESON_PIN(GPIOZ_0), @@ -834,6 +835,7 @@ static struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = { .num_groups = ARRAY_SIZE(meson_gxbb_periphs_groups), .num_funcs = ARRAY_SIZE(meson_gxbb_periphs_functions), .num_banks = ARRAY_SIZE(meson_gxbb_periphs_banks), + .pmx_ops = &meson8_pmx_ops, }; static struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = { @@ -846,6 +848,7 @@ static struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = { .num_groups = ARRAY_SIZE(meson_gxbb_aobus_groups), .num_funcs = ARRAY_SIZE(meson_gxbb_aobus_functions), .num_banks = ARRAY_SIZE(meson_gxbb_aobus_banks), + .pmx_ops = &meson8_pmx_ops, }; static const struct of_device_id meson_gxbb_pinctrl_dt_match[] = { diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c index 088ac94f76b0..b3786cde963d 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c @@ -14,6 +14,7 @@ #include #include "pinctrl-meson.h" +#include "pinctrl-meson8-pmx.h" static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = { MESON_PIN(GPIOZ_0), @@ -819,6 +820,7 @@ static struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = { .num_groups = ARRAY_SIZE(meson_gxl_periphs_groups), .num_funcs = ARRAY_SIZE(meson_gxl_periphs_functions), .num_banks = ARRAY_SIZE(meson_gxl_periphs_banks), + .pmx_ops = &meson8_pmx_ops, }; static struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { @@ -831,6 +833,7 @@ static struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = { .num_groups = ARRAY_SIZE(meson_gxl_aobus_groups), .num_funcs = ARRAY_SIZE(meson_gxl_aobus_functions), .num_banks = ARRAY_SIZE(meson_gxl_aobus_banks), + .pmx_ops = &meson8_pmx_ops, }; static const struct of_device_id meson_gxl_pinctrl_dt_match[] = { diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c index 525e8b17d471..29a458da78db 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -31,10 +31,6 @@ * In some cases the register ranges for pull enable and pull * direction are the same and thus there are only 3 register ranges. * - * Every pinmux group can be enabled by a specific bit in the first - * register range; when all groups for a given pin are disabled the - * pin acts as a GPIO. - * * For the pull and GPIO configuration every bank uses a contiguous * set of bits in the register sets described above; the same register * can be shared by more banks with different offsets. @@ -148,94 +144,24 @@ static const struct pinctrl_ops meson_pctrl_ops = { .pin_dbg_show = meson_pin_dbg_show, }; -/** - * meson_pmx_disable_other_groups() - disable other groups using a given pin - * - * @pc: meson pin controller device - * @pin: number of the pin - * @sel_group: index of the selected group, or -1 if none - * - * The function disables all pinmux groups using a pin except the - * selected one. If @sel_group is -1 all groups are disabled, leaving - * the pin in GPIO mode. - */ -static void meson_pmx_disable_other_groups(struct meson_pinctrl *pc, - unsigned int pin, int sel_group) -{ - struct meson_pmx_group *group; - int i, j; - - for (i = 0; i < pc->data->num_groups; i++) { - group = &pc->data->groups[i]; - if (group->is_gpio || i == sel_group) - continue; - - for (j = 0; j < group->num_pins; j++) { - if (group->pins[j] == pin) { - /* We have found a group using the pin */ - regmap_update_bits(pc->reg_mux, - group->reg * 4, - BIT(group->bit), 0); - } - } - } -} - -static int meson_pmx_set_mux(struct pinctrl_dev *pcdev, unsigned func_num, - unsigned group_num) -{ - struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); - struct meson_pmx_func *func = &pc->data->funcs[func_num]; - struct meson_pmx_group *group = &pc->data->groups[group_num]; - int i, ret = 0; - - dev_dbg(pc->dev, "enable function %s, group %s\n", func->name, - group->name); - - /* - * Disable groups using the same pin. - * The selected group is not disabled to avoid glitches. - */ - for (i = 0; i < group->num_pins; i++) - meson_pmx_disable_other_groups(pc, group->pins[i], group_num); - - /* Function 0 (GPIO) doesn't need any additional setting */ - if (func_num) - ret = regmap_update_bits(pc->reg_mux, group->reg * 4, - BIT(group->bit), BIT(group->bit)); - - return ret; -} - -static int meson_pmx_request_gpio(struct pinctrl_dev *pcdev, - struct pinctrl_gpio_range *range, - unsigned offset) -{ - struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); - - meson_pmx_disable_other_groups(pc, offset, -1); - - return 0; -} - -static int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev) +int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev) { struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); return pc->data->num_funcs; } -static const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev, - unsigned selector) +const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev, + unsigned selector) { struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); return pc->data->funcs[selector].name; } -static int meson_pmx_get_groups(struct pinctrl_dev *pcdev, unsigned selector, - const char * const **groups, - unsigned * const num_groups) +int meson_pmx_get_groups(struct pinctrl_dev *pcdev, unsigned selector, + const char * const **groups, + unsigned * const num_groups) { struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); @@ -245,14 +171,6 @@ static int meson_pmx_get_groups(struct pinctrl_dev *pcdev, unsigned selector, return 0; } -static const struct pinmux_ops meson_pmx_ops = { - .set_mux = meson_pmx_set_mux, - .get_functions_count = meson_pmx_get_funcs_count, - .get_function_name = meson_pmx_get_func_name, - .get_function_groups = meson_pmx_get_groups, - .gpio_request_enable = meson_pmx_request_gpio, -}; - static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin, unsigned long *configs, unsigned num_configs) { @@ -609,7 +527,7 @@ int meson_pinctrl_probe(struct platform_device *pdev) pc->desc.name = "pinctrl-meson"; pc->desc.owner = THIS_MODULE; pc->desc.pctlops = &meson_pctrl_ops; - pc->desc.pmxops = &meson_pmx_ops; + pc->desc.pmxops = pc->data->pmx_ops; pc->desc.confops = &meson_pinconf_ops; pc->desc.pins = pc->data->pins; pc->desc.npins = pc->data->num_pins; diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h index 284157d43612..183b6e471635 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -32,9 +32,7 @@ struct meson_pmx_group { const char *name; const unsigned int *pins; unsigned int num_pins; - bool is_gpio; - unsigned int reg; - unsigned int bit; + const void *data; }; /** @@ -109,6 +107,7 @@ struct meson_pinctrl_data { unsigned int num_funcs; struct meson_bank *banks; unsigned int num_banks; + const struct pinmux_ops *pmx_ops; }; struct meson_pinctrl { @@ -124,23 +123,6 @@ struct meson_pinctrl { struct device_node *of_node; }; -#define GROUP(grp, r, b) \ - { \ - .name = #grp, \ - .pins = grp ## _pins, \ - .num_pins = ARRAY_SIZE(grp ## _pins), \ - .reg = r, \ - .bit = b, \ - } - -#define GPIO_GROUP(gpio) \ - { \ - .name = #gpio, \ - .pins = (const unsigned int[]){ gpio }, \ - .num_pins = 1, \ - .is_gpio = true, \ - } - #define FUNCTION(fn) \ { \ .name = #fn, \ @@ -166,5 +148,14 @@ struct meson_pinctrl { #define MESON_PIN(x) PINCTRL_PIN(x, #x) +/* Common pmx functions */ +int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev); +const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev, + unsigned selector); +int meson_pmx_get_groups(struct pinctrl_dev *pcdev, + unsigned selector, + const char * const **groups, + unsigned * const num_groups); + /* Common probe function */ int meson_pinctrl_probe(struct platform_device *pdev); diff --git a/drivers/pinctrl/meson/pinctrl-meson8-pmx.c b/drivers/pinctrl/meson/pinctrl-meson8-pmx.c new file mode 100644 index 000000000000..b93b058c8a07 --- /dev/null +++ b/drivers/pinctrl/meson/pinctrl-meson8-pmx.c @@ -0,0 +1,108 @@ +/* + * First generation of pinmux driver for Amlogic Meson SoCs + * + * Copyright (C) 2014 Beniamino Galvani + * Copyright (C) 2017 Jerome Brunet + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +/* For this first generation of pinctrl driver every pinmux group can be + * enabled by a specific bit in the first register range. When all groups for + * a given pin are disabled the pin acts as a GPIO. + */ +#include +#include +#include +#include + +#include "pinctrl-meson.h" +#include "pinctrl-meson8-pmx.h" + +/** + * meson8_pmx_disable_other_groups() - disable other groups using a given pin + * + * @pc: meson pin controller device + * @pin: number of the pin + * @sel_group: index of the selected group, or -1 if none + * + * The function disables all pinmux groups using a pin except the + * selected one. If @sel_group is -1 all groups are disabled, leaving + * the pin in GPIO mode. + */ +static void meson8_pmx_disable_other_groups(struct meson_pinctrl *pc, + unsigned int pin, int sel_group) +{ + struct meson_pmx_group *group; + struct meson8_pmx_data *pmx_data; + int i, j; + + for (i = 0; i < pc->data->num_groups; i++) { + group = &pc->data->groups[i]; + pmx_data = (struct meson8_pmx_data *)group->data; + if (pmx_data->is_gpio || i == sel_group) + continue; + + for (j = 0; j < group->num_pins; j++) { + if (group->pins[j] == pin) { + /* We have found a group using the pin */ + regmap_update_bits(pc->reg_mux, + pmx_data->reg * 4, + BIT(pmx_data->bit), 0); + } + } + } +} + +static int meson8_pmx_set_mux(struct pinctrl_dev *pcdev, unsigned func_num, + unsigned group_num) +{ + struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); + struct meson_pmx_func *func = &pc->data->funcs[func_num]; + struct meson_pmx_group *group = &pc->data->groups[group_num]; + struct meson8_pmx_data *pmx_data = + (struct meson8_pmx_data *)group->data; + int i, ret = 0; + + dev_dbg(pc->dev, "enable function %s, group %s\n", func->name, + group->name); + + /* + * Disable groups using the same pin. + * The selected group is not disabled to avoid glitches. + */ + for (i = 0; i < group->num_pins; i++) + meson8_pmx_disable_other_groups(pc, group->pins[i], group_num); + + /* Function 0 (GPIO) doesn't need any additional setting */ + if (func_num) + ret = regmap_update_bits(pc->reg_mux, pmx_data->reg * 4, + BIT(pmx_data->bit), + BIT(pmx_data->bit)); + + return ret; +} + +static int meson8_pmx_request_gpio(struct pinctrl_dev *pcdev, + struct pinctrl_gpio_range *range, + unsigned offset) +{ + struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev); + + meson8_pmx_disable_other_groups(pc, offset, -1); + + return 0; +} + +const struct pinmux_ops meson8_pmx_ops = { + .set_mux = meson8_pmx_set_mux, + .get_functions_count = meson_pmx_get_funcs_count, + .get_function_name = meson_pmx_get_func_name, + .get_function_groups = meson_pmx_get_groups, + .gpio_request_enable = meson8_pmx_request_gpio, +}; diff --git a/drivers/pinctrl/meson/pinctrl-meson8-pmx.h b/drivers/pinctrl/meson/pinctrl-meson8-pmx.h new file mode 100644 index 000000000000..47293c28f913 --- /dev/null +++ b/drivers/pinctrl/meson/pinctrl-meson8-pmx.h @@ -0,0 +1,48 @@ +/* + * First generation of pinmux driver for Amlogic Meson SoCs + * + * Copyright (C) 2014 Beniamino Galvani + * Copyright (C) 2017 Jerome Brunet + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +struct meson8_pmx_data { + bool is_gpio; + unsigned int reg; + unsigned int bit; +}; + +#define PMX_DATA(r, b, g) \ + { \ + .reg = r, \ + .bit = b, \ + .is_gpio = g, \ + } + +#define GROUP(grp, r, b) \ + { \ + .name = #grp, \ + .pins = grp ## _pins, \ + .num_pins = ARRAY_SIZE(grp ## _pins), \ + .data = (const struct meson8_pmx_data[]){ \ + PMX_DATA(r, b, false), \ + }, \ + } + +#define GPIO_GROUP(gpio) \ + { \ + .name = #gpio, \ + .pins = (const unsigned int[]){ gpio }, \ + .num_pins = 1, \ + .data = (const struct meson8_pmx_data[]){ \ + PMX_DATA(0, 0, true), \ + }, \ + } + +extern const struct pinmux_ops meson8_pmx_ops; diff --git a/drivers/pinctrl/meson/pinctrl-meson8.c b/drivers/pinctrl/meson/pinctrl-meson8.c index 68b345fc105a..49c7ce03547b 100644 --- a/drivers/pinctrl/meson/pinctrl-meson8.c +++ b/drivers/pinctrl/meson/pinctrl-meson8.c @@ -13,6 +13,7 @@ #include #include "pinctrl-meson.h" +#include "pinctrl-meson8-pmx.h" static const struct pinctrl_pin_desc meson8_cbus_pins[] = { MESON_PIN(GPIOX_0), @@ -1054,6 +1055,7 @@ static struct meson_pinctrl_data meson8_cbus_pinctrl_data = { .num_groups = ARRAY_SIZE(meson8_cbus_groups), .num_funcs = ARRAY_SIZE(meson8_cbus_functions), .num_banks = ARRAY_SIZE(meson8_cbus_banks), + .pmx_ops = &meson8_pmx_ops, }; static struct meson_pinctrl_data meson8_aobus_pinctrl_data = { @@ -1066,6 +1068,7 @@ static struct meson_pinctrl_data meson8_aobus_pinctrl_data = { .num_groups = ARRAY_SIZE(meson8_aobus_groups), .num_funcs = ARRAY_SIZE(meson8_aobus_functions), .num_banks = ARRAY_SIZE(meson8_aobus_banks), + .pmx_ops = &meson8_pmx_ops, }; static const struct of_device_id meson8_pinctrl_dt_match[] = { diff --git a/drivers/pinctrl/meson/pinctrl-meson8b.c b/drivers/pinctrl/meson/pinctrl-meson8b.c index 4d61df09bc3f..5bd808dc81e1 100644 --- a/drivers/pinctrl/meson/pinctrl-meson8b.c +++ b/drivers/pinctrl/meson/pinctrl-meson8b.c @@ -14,6 +14,7 @@ #include #include "pinctrl-meson.h" +#include "pinctrl-meson8-pmx.h" static const struct pinctrl_pin_desc meson8b_cbus_pins[] = { MESON_PIN(GPIOX_0), @@ -914,6 +915,7 @@ static struct meson_pinctrl_data meson8b_cbus_pinctrl_data = { .num_groups = ARRAY_SIZE(meson8b_cbus_groups), .num_funcs = ARRAY_SIZE(meson8b_cbus_functions), .num_banks = ARRAY_SIZE(meson8b_cbus_banks), + .pmx_ops = &meson8_pmx_ops, }; static struct meson_pinctrl_data meson8b_aobus_pinctrl_data = { @@ -926,6 +928,7 @@ static struct meson_pinctrl_data meson8b_aobus_pinctrl_data = { .num_groups = ARRAY_SIZE(meson8b_aobus_groups), .num_funcs = ARRAY_SIZE(meson8b_aobus_functions), .num_banks = ARRAY_SIZE(meson8b_aobus_banks), + .pmx_ops = &meson8_pmx_ops, }; static const struct of_device_id meson8b_pinctrl_dt_match[] = {