From patchwork Tue Oct 17 09:06:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116043 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4637522qgn; Tue, 17 Oct 2017 02:07:50 -0700 (PDT) X-Google-Smtp-Source: AOwi7QCYvrqO7Q9j7dszeTZhIKNSV/ihmeDFpMX8A4vR1KZkTAtqCLruO50oCBx4P0+HRz6tsZIZ X-Received: by 10.84.209.135 with SMTP id y7mr11394331plh.439.1508231270006; Tue, 17 Oct 2017 02:07:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231270; cv=none; d=google.com; s=arc-20160816; b=Wl2KnsNQficBCbRgDBT7fWNEZ3zKOiva8w++H7XxPe8Klif0feuTp0rqTWYNzxz+7c Cm44ypsTwEH6HZ0YnmNMeFsz8qb6c6N6fzFfWAnq+1mLhyupvmsSiUH6j+mqNgnc/9zb sgoEVwAXG/vqMwS+JiOz/fFZ9adgoOw5eOdyQERfH2z2KAqdlEIeCBJQGbedZrI9UA2/ Gxu1shBlR6klwMXD4qr343s3adKrLBYmH+Ku+fm6RrOV2MWrXfjPw/kDbkx+pEMvaJrC e/V2Pyb/9hrKUS8GC2BH2yDNBd6QQJTD4r3p61Wg+iGa9Tpd5JWLprkMwrV/WAPHvnA7 QJbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=z8Om+fUYN0hDH5mOSAcipx2IHUAOlN4Vfw/TvBt4S4E=; b=sJ0xGYJqGLSjlPIw9KDsdI16GgxbdQa3uCN7XhfNoDfui220vdQGZbGjjJ4hYVG1YD mdgemvEU3rq2RqcGLP3YrbZko9U6BmxJTjTKBhoL9eIMtupF29V99cCCjqd3SQowHxUb 3AMM4FuoB7o30lJvcQSmY0dzmbaigTpQu5EHqEnHOSJgh0ny74m5DHN5MYqa7i4OwqjF GbJMg+RHXVoqHHnVKpgzTeIV/4tInbHhh3NEIiwzBk6abZFyE0BN29D7DBzqvuWFFdGa SNuIqFTuOjPV1txQ0sNnLzu7ko/abDH7RKdIwKX6b5RLNBDz8HM8WuFpF2BFisSNwX8K SqJg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o186si3241732pga.260.2017.10.17.02.07.49; Tue, 17 Oct 2017 02:07:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759990AbdJQJHI (ORCPT + 27 others); Tue, 17 Oct 2017 05:07:08 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:55395 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759900AbdJQJGt (ORCPT ); Tue, 17 Oct 2017 05:06:49 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id 4D7C9208C4; Tue, 17 Oct 2017 11:06:47 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 2496D208BF; Tue, 17 Oct 2017 11:06:47 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Mark Rutland , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, plaes@plaes.org, icenowy@aosc.io, Thomas Petazzoni , Quentin Schulz , Mylene Josserand Subject: [PATCH 14/23] drm/sun4i: Create minimal multipliers and dividers Date: Tue, 17 Oct 2017 11:06:21 +0200 Message-Id: <1234a449a08131a74a3f4851f45458fa9b84ab5e.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The various outputs the TCON can provide have different constraints on the dotclock divider. Let's make them configurable by the various mode_set functions. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_dotclock.c | 10 +++++++--- drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 ++ drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++ 3 files changed, 11 insertions(+), 3 deletions(-) -- git-series 0.9.1 diff --git a/drivers/gpu/drm/sun4i/sun4i_dotclock.c b/drivers/gpu/drm/sun4i/sun4i_dotclock.c index d401156490f3..023f39bda633 100644 --- a/drivers/gpu/drm/sun4i/sun4i_dotclock.c +++ b/drivers/gpu/drm/sun4i/sun4i_dotclock.c @@ -17,8 +17,9 @@ #include "sun4i_dotclock.h" struct sun4i_dclk { - struct clk_hw hw; - struct regmap *regmap; + struct clk_hw hw; + struct regmap *regmap; + struct sun4i_tcon *tcon; }; static inline struct sun4i_dclk *hw_to_dclk(struct clk_hw *hw) @@ -73,11 +74,13 @@ static unsigned long sun4i_dclk_recalc_rate(struct clk_hw *hw, static long sun4i_dclk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { + struct sun4i_dclk *dclk = hw_to_dclk(hw); + struct sun4i_tcon *tcon = dclk->tcon; unsigned long best_parent = 0; u8 best_div = 1; int i; - for (i = 6; i <= 127; i++) { + for (i = tcon->dclk_min_div; i <= tcon->dclk_max_div; i++) { unsigned long ideal = rate * i; unsigned long rounded; @@ -167,6 +170,7 @@ int sun4i_dclk_create(struct device *dev, struct sun4i_tcon *tcon) dclk = devm_kzalloc(dev, sizeof(*dclk), GFP_KERNEL); if (!dclk) return -ENOMEM; + dclk->tcon = tcon; init.name = clk_name; init.ops = &sun4i_dclk_ops; diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index f69bcdf11cb8..3efa1ab045cd 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -177,6 +177,8 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, u8 clk_delay; u32 val = 0; + tcon->dclk_min_div = 6; + tcon->dclk_max_div = 127; sun4i_tcon0_mode_set_common(tcon, mode); /* Adjust clock delay */ diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index f61bf6d83b4a..4141fbd97ddf 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -169,6 +169,8 @@ struct sun4i_tcon { /* Pixel clock */ struct clk *dclk; + u8 dclk_max_div; + u8 dclk_min_div; /* Reset control */ struct reset_control *lcd_rst; From patchwork Tue Oct 17 09:06:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 116038 Delivered-To: patch@linaro.org Received: by 10.140.22.163 with SMTP id 32csp4636936qgn; Tue, 17 Oct 2017 02:07:13 -0700 (PDT) X-Google-Smtp-Source: AOwi7QAmys+kKklr1sJ6EQWGOepG2SAkIgE9+TiN2sBsDS/xABRC0jlT3rbY1qvNeZ3Nb9Z8ybex X-Received: by 10.98.62.142 with SMTP id y14mr11086981pfj.83.1508231233019; Tue, 17 Oct 2017 02:07:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508231233; cv=none; d=google.com; s=arc-20160816; b=rSyLOVQ/7pMV1bWF0EpxqijgC4tmTm/b9F0hz4J5P9HAeO/BJ+2abmazsRq7pC5uWS c2HI2gi0bKQg07/y4+jJdwZvUqD+fYTnNBWYNV/Ue4wA8Chkb/Ep/XdSjbKiO36FsGgN jZ96iTW+lZ//ObDC/HjLodrZbPGCgWalpwGGvoX15KaO7fxlc2XLNdK5KHM0T+YbeMgX gJpV2TBYGUpZYbM/ZPg+IHaWPdTLEuTPM5qDDVRn63lB7N1mMNOqlUJDoOxaMFLvAR2b kbt0DpcngKMpf6ydAllr4F0lKKVqZq8N2CU2g/8I22QGZwEGworPliXOr3HK/I0GDf+3 vI8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=3S4oXP2xSVEhWplJGOIUh0yRdqMTm6ILWmC5eLlOJe8=; b=RhSS1ijhe963HIH1+XXuJf5x9C+qhTpDrchaJ7Ygklr+ZsYyhX1ksfDbH8wdt7jmVP tkNIhta2Ht16ithh8X3n5x/Um2k03haZlmSThrg61ouBBQZ+KNN1eBUXhGxM/krgxNLZ jqjElJ1NKD+bNhXrWlMsLnvwearkSNyYmDSwgE0u2cVuK/w9osa8NQoXSTwMU453cXXi y/7ZX0aP05l5Q83iTEsQWY4X3/hGHn5JowxVbKaHp9Eor9gztuB+R+styTyZHQhj5+xH CDK/xRweBw+oO58MefClPZV41k9pcA0cH/DhtGX9mCEa4LxxbymS8+h9O2P4sgBzveth 4JKA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 198si5241859pgd.292.2017.10.17.02.07.12; Tue, 17 Oct 2017 02:07:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760005AbdJQJHJ (ORCPT + 27 others); Tue, 17 Oct 2017 05:07:09 -0400 Received: from mail.free-electrons.com ([62.4.15.54]:55336 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759958AbdJQJGt (ORCPT ); Tue, 17 Oct 2017 05:06:49 -0400 Received: by mail.free-electrons.com (Postfix, from userid 110) id DF0AB208C2; Tue, 17 Oct 2017 11:06:46 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id B7162208BD; Tue, 17 Oct 2017 11:06:46 +0200 (CEST) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Mark Rutland , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, plaes@plaes.org, icenowy@aosc.io, Thomas Petazzoni , Quentin Schulz , Mylene Josserand Subject: [PATCH 23/23] arm: dts: sun8i: a711: Enable the LCD Date: Tue, 17 Oct 2017 11:06:30 +0200 Message-Id: <148ef066f9390f25fc7d4da4b4ea89862dfef06c.1508231063.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The A711 has 1024x600 LVDS panel, with a PWM-based backlight. Add it to our DT. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 62 ++++++++++++++++++++++++- 1 file changed, 62 insertions(+) -- git-series 0.9.1 diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts index e4d08bff3158..5abcb3c9f4b3 100644 --- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts +++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts @@ -45,6 +45,7 @@ #include "sun8i-a83t.dtsi" #include +#include / { model = "TBS A711 Tablet"; @@ -59,6 +60,44 @@ stdout-path = "serial0:115200n8"; }; + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + enable-gpios = <&pio 3 29 GPIO_ACTIVE_HIGH>; + + brightness-levels = <0 1 2 4 8 16 32 64 128 255>; + default-brightness-level = <9>; + }; + + panel { + compatible = "tbs,a711-panel", "panel-lvds"; + backlight = <&backlight>; + power-supply = <®_sw>; + + width-mm = <153>; + height-mm = <90>; + data-mapping = "vesa-24"; + + panel-timing { + /* 1024x600 @60Hz */ + clock-frequency = <52000000>; + hactive = <1024>; + vactive = <600>; + hsync-len = <20>; + hfront-porch = <180>; + hback-porch = <160>; + vfront-porch = <12>; + vback-porch = <23>; + vsync-len = <5>; + }; + + port { + panel_input: endpoint { + remote-endpoint = <&tcon0_out_lcd>; + }; + }; + }; + reg_vbat: reg-vbat { compatible = "regulator-fixed"; regulator-name = "vbat"; @@ -89,6 +128,10 @@ }; }; +&de { + status = "okay"; +}; + /* * An USB-2 hub is connected here, which also means we don't need to * enable the OHCI controller. @@ -144,6 +187,12 @@ status = "okay"; }; +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pin>; + status = "okay"; +}; + &r_rsb { status = "okay"; @@ -324,6 +373,19 @@ regulator-name = "vcc-lcd"; }; +&tcon0 { + pinctrl-names = "default"; + pinctrl-0 = <&lcd_lvds_pins>; + status = "okay"; +}; + +&tcon0_out { + tcon0_out_lcd: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_input>; + }; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>;