From patchwork Sat Aug 29 11:17:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 254881 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED99EC433E6 for ; Sat, 29 Aug 2020 11:48:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AFA21207DF for ; Sat, 29 Aug 2020 11:48:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598701703; bh=jTjsLAriGTsac5PZWo3rZlx2ocUPijGc78uBb8WH4Js=; h=From:To:Subject:Date:List-ID:From; b=Dg1VQ8Oxl1k+aE+9IUykOAvXqJiLFCdCQhbu538ZuAXx2YLpDhkhzCjIt7kchoGGf 1RE38pabcfMzRC6rx8FEv72KthJGRGt6ViLuMflOtaCXCMYLKTs+hnPCYjmrPCQHlJ GfgL4/mZ8pdIy7M3+2/4TlsjGjKrvmMcnirbUYXg= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727940AbgH2LsU (ORCPT ); Sat, 29 Aug 2020 07:48:20 -0400 Received: from mail.kernel.org ([198.145.29.99]:48090 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727997AbgH2Lay (ORCPT ); Sat, 29 Aug 2020 07:30:54 -0400 Received: from localhost.localdomain (unknown [194.230.155.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 411B62076D; Sat, 29 Aug 2020 11:18:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598699888; bh=jTjsLAriGTsac5PZWo3rZlx2ocUPijGc78uBb8WH4Js=; h=From:To:Subject:Date:From; b=Y3udy7ZKxQMGczRMLliEYAQ/FeoWt4shYEJIb+tClmajZzNbd/gKsX83rhQkl7BUb OEaD6AfEZBLLhfTprA5rwJ6d6LHEX+7e/Kd7FDOIEKJ/siS0c/IVlj0Tap/cl4pBAZ hwVQk0M+mnmvvqtB45uL/uA2aHjQ0waiOpFoASBQ= From: Krzysztof Kozlowski To: Michael Turquette , Stephen Boyd , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Krzysztof Kozlowski , Anson Huang , Wolfram Sang , Dong Aisheng , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 1/7] dt-bindings: clock: imx8m: Integrate duplicated i.MX 8M schemas Date: Sat, 29 Aug 2020 13:17:54 +0200 Message-Id: <20200829111800.2786-1-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org The clock controller schemas for i.MX 8M Mini, 8M Nano, 8M Plus and 8M Quad are basically the same. The only minor difference appears on 8M Quad which needs one more clock. There is no point to have four schemas for almost the same binding. Any fixes or changes would have to be duplicated four times. Signed-off-by: Krzysztof Kozlowski --- .../bindings/clock/imx8m-clock.yaml | 125 ++++++++++++++++++ .../bindings/clock/imx8mm-clock.yaml | 68 ---------- .../bindings/clock/imx8mn-clock.yaml | 70 ---------- .../bindings/clock/imx8mp-clock.yaml | 70 ---------- .../bindings/clock/imx8mq-clock.yaml | 72 ---------- 5 files changed, 125 insertions(+), 280 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/imx8m-clock.yaml delete mode 100644 Documentation/devicetree/bindings/clock/imx8mm-clock.yaml delete mode 100644 Documentation/devicetree/bindings/clock/imx8mn-clock.yaml delete mode 100644 Documentation/devicetree/bindings/clock/imx8mp-clock.yaml delete mode 100644 Documentation/devicetree/bindings/clock/imx8mq-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml new file mode 100644 index 000000000000..31e7cc9693c3 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml @@ -0,0 +1,125 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/imx8m-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8M Family Clock Control Module Binding + +maintainers: + - Anson Huang + +description: | + NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock + controller, which generates and supplies to all modules. + +properties: + compatible: + enum: + - fsl,imx8mm-ccm + - fsl,imx8mn-ccm + - fsl,imx8mp-ccm + - fsl,imx8mq-ccm + + reg: + maxItems: 1 + + clocks: + minItems: 6 + maxItems: 7 + + clock-names: + minItems: 6 + maxItems: 7 + + '#clock-cells': + const: 1 + description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h + for the full list of i.MX8M clock IDs. + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +allOf: + - if: + properties: + compatible: + contains: + const: fsl,imx8mq-ccm + then: + properties: + clocks: + minItems: 7 + maxItems: 7 + items: + - description: 32k osc + - description: 25m osc + - description: 27m osc + - description: ext1 clock input + - description: ext2 clock input + - description: ext3 clock input + - description: ext4 clock input + clock-names: + minItems: 7 + maxItems: 7 + items: + - const: ckil + - const: osc_25m + - const: osc_27m + - const: clk_ext1 + - const: clk_ext2 + - const: clk_ext3 + - const: clk_ext4 + else: + properties: + clocks: + items: + - description: 32k osc + - description: 24m osc + - description: ext1 clock input + - description: ext2 clock input + - description: ext3 clock input + - description: ext4 clock input + + clock-names: + items: + - const: osc_32k + - const: osc_24m + - const: clk_ext1 + - const: clk_ext2 + - const: clk_ext3 + - const: clk_ext4 + +unevaluatedProperties: false + +examples: + # Clock Control Module node: + - | + clock-controller@30380000 { + compatible = "fsl,imx8mm-ccm"; + reg = <0x30380000 0x10000>; + #clock-cells = <1>; + clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, + <&clk_ext3>, <&clk_ext4>; + clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", + "clk_ext3", "clk_ext4"; + }; + + - | + clock-controller@30390000 { + compatible = "fsl,imx8mq-ccm"; + reg = <0x30380000 0x10000>; + #clock-cells = <1>; + clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>, + <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; + clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1", + "clk_ext2", "clk_ext3", "clk_ext4"; + }; + +... diff --git a/Documentation/devicetree/bindings/clock/imx8mm-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mm-clock.yaml deleted file mode 100644 index ec830db1367b..000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mm-clock.yaml +++ /dev/null @@ -1,68 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/imx8mm-clock.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP i.MX8M Mini Clock Control Module Binding - -maintainers: - - Anson Huang - -description: | - NXP i.MX8M Mini clock control module is an integrated clock controller, which - generates and supplies to all modules. - -properties: - compatible: - const: fsl,imx8mm-ccm - - reg: - maxItems: 1 - - clocks: - items: - - description: 32k osc - - description: 24m osc - - description: ext1 clock input - - description: ext2 clock input - - description: ext3 clock input - - description: ext4 clock input - - clock-names: - items: - - const: osc_32k - - const: osc_24m - - const: clk_ext1 - - const: clk_ext2 - - const: clk_ext3 - - const: clk_ext4 - - '#clock-cells': - const: 1 - description: - The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mm-clock.h - for the full list of i.MX8M Mini clock IDs. - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - -examples: - # Clock Control Module node: - - | - clk: clock-controller@30380000 { - compatible = "fsl,imx8mm-ccm"; - reg = <0x30380000 0x10000>; - #clock-cells = <1>; - clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, - <&clk_ext3>, <&clk_ext4>; - clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", - "clk_ext3", "clk_ext4"; - }; - -... diff --git a/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml deleted file mode 100644 index bdaa29616ab1..000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml +++ /dev/null @@ -1,70 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/imx8mn-clock.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP i.MX8M Nano Clock Control Module Binding - -maintainers: - - Anson Huang - -description: | - NXP i.MX8M Nano clock control module is an integrated clock controller, which - generates and supplies to all modules. - -properties: - compatible: - const: fsl,imx8mn-ccm - - reg: - maxItems: 1 - - clocks: - items: - - description: 32k osc - - description: 24m osc - - description: ext1 clock input - - description: ext2 clock input - - description: ext3 clock input - - description: ext4 clock input - - clock-names: - items: - - const: osc_32k - - const: osc_24m - - const: clk_ext1 - - const: clk_ext2 - - const: clk_ext3 - - const: clk_ext4 - - '#clock-cells': - const: 1 - description: - The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mn-clock.h - for the full list of i.MX8M Nano clock IDs. - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - -additionalProperties: false - -examples: - # Clock Control Module node: - - | - clk: clock-controller@30380000 { - compatible = "fsl,imx8mn-ccm"; - reg = <0x30380000 0x10000>; - #clock-cells = <1>; - clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, - <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; - clock-names = "osc_32k", "osc_24m", "clk_ext1", - "clk_ext2", "clk_ext3", "clk_ext4"; - }; - -... diff --git a/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml deleted file mode 100644 index 4351a1dbb4f7..000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml +++ /dev/null @@ -1,70 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/imx8mp-clock.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP i.MX8M Plus Clock Control Module Binding - -maintainers: - - Anson Huang - -description: - NXP i.MX8M Plus clock control module is an integrated clock controller, which - generates and supplies to all modules. - -properties: - compatible: - const: fsl,imx8mp-ccm - - reg: - maxItems: 1 - - clocks: - items: - - description: 32k osc - - description: 24m osc - - description: ext1 clock input - - description: ext2 clock input - - description: ext3 clock input - - description: ext4 clock input - - clock-names: - items: - - const: osc_32k - - const: osc_24m - - const: clk_ext1 - - const: clk_ext2 - - const: clk_ext3 - - const: clk_ext4 - - '#clock-cells': - const: 1 - description: - The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mp-clock.h - for the full list of i.MX8M Plus clock IDs. - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - -additionalProperties: false - -examples: - # Clock Control Module node: - - | - clk: clock-controller@30380000 { - compatible = "fsl,imx8mp-ccm"; - reg = <0x30380000 0x10000>; - #clock-cells = <1>; - clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, - <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; - clock-names = "osc_32k", "osc_24m", "clk_ext1", - "clk_ext2", "clk_ext3", "clk_ext4"; - }; - -... diff --git a/Documentation/devicetree/bindings/clock/imx8mq-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mq-clock.yaml deleted file mode 100644 index 05d7d1471e0c..000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mq-clock.yaml +++ /dev/null @@ -1,72 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/imx8mq-clock.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP i.MX8M Quad Clock Control Module Binding - -maintainers: - - Anson Huang - -description: | - NXP i.MX8M Quad clock control module is an integrated clock controller, which - generates and supplies to all modules. - -properties: - compatible: - const: fsl,imx8mq-ccm - - reg: - maxItems: 1 - - clocks: - items: - - description: 32k osc - - description: 25m osc - - description: 27m osc - - description: ext1 clock input - - description: ext2 clock input - - description: ext3 clock input - - description: ext4 clock input - - clock-names: - items: - - const: ckil - - const: osc_25m - - const: osc_27m - - const: clk_ext1 - - const: clk_ext2 - - const: clk_ext3 - - const: clk_ext4 - - '#clock-cells': - const: 1 - description: - The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mq-clock.h - for the full list of i.MX8M Quad clock IDs. - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - -examples: - # Clock Control Module node: - - | - clk: clock-controller@30380000 { - compatible = "fsl,imx8mq-ccm"; - reg = <0x30380000 0x10000>; - #clock-cells = <1>; - clocks = <&ckil>, <&osc_25m>, <&osc_27m>, - <&clk_ext1>, <&clk_ext2>, - <&clk_ext3>, <&clk_ext4>; - clock-names = "ckil", "osc_25m", "osc_27m", - "clk_ext1", "clk_ext2", - "clk_ext3", "clk_ext4"; - }; - -... From patchwork Sat Aug 29 11:17:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 254882 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 992D2C433E2 for ; Sat, 29 Aug 2020 11:48:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 73CEF207BB for ; Sat, 29 Aug 2020 11:48:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598701685; bh=XbS00cGM7FWW3OaLpUHfAbAx2qWn7eq/QxFzyvyD3oE=; h=From:To:Subject:Date:In-Reply-To:References:List-ID:From; b=rK63sXzp4xluYjq1gAlWzod+332vWWxNLPqimp/R3MiBSAAIzfU43FInO6nZ32r0B e+te6yvwg2GYLLf+9lBZA8uPmfO3TDW1lvLPOvd2cVGiD1Yvdtb41vUm5/RIFpA2df vjI9QKGteXB/NyRSn9JM4zZwk9JbZnE193ogEhYI= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728067AbgH2LbD (ORCPT ); Sat, 29 Aug 2020 07:31:03 -0400 Received: from mail.kernel.org ([198.145.29.99]:47908 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728089AbgH2La1 (ORCPT ); Sat, 29 Aug 2020 07:30:27 -0400 Received: from localhost.localdomain (unknown [194.230.155.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id AF91F20E65; Sat, 29 Aug 2020 11:18:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598699892; bh=XbS00cGM7FWW3OaLpUHfAbAx2qWn7eq/QxFzyvyD3oE=; h=From:To:Subject:Date:In-Reply-To:References:From; b=YKqbY9CKJYBZRazouF05mCPzF5D4bmOANdigV1PvouyabuS3dxZy4VR1NbBLxjunf wpUJg42+kEh1NO8bPevSRlsZRnLvyZLDPZKpwx/KseQ+nqaq1LoIbnMuIlRyuKHG+d EqALPxHH/2IRs6nV6Y1dth7WwF3OWmr3/p6ygSjc= From: Krzysztof Kozlowski To: Michael Turquette , Stephen Boyd , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Krzysztof Kozlowski , Anson Huang , Wolfram Sang , Dong Aisheng , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 2/7] dt-bindings: mailbox: fsl, mu: Fix i.MX 8QXP compatible matching Date: Sat, 29 Aug 2020 13:17:55 +0200 Message-Id: <20200829111800.2786-2-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200829111800.2786-1-krzk@kernel.org> References: <20200829111800.2786-1-krzk@kernel.org> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org The Mailbox on i.MX 8QXP (fsl,imx8qxp-mu) can also be compatible with fsl,imx8-mu-scu (for fast IPC) so adjust the compatibles to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml: mailbox@5d1f0000: compatible: ['fsl,imx8-mu-scu', 'fsl,imx8qxp-mu', 'fsl,imx6sx-mu'] is not valid under any of the given schemas (Possible causes of the failure): arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml: mailbox@5d1f0000: compatible: ['fsl,imx8-mu-scu', 'fsl,imx8qxp-mu', 'fsl,imx6sx-mu'] is too long Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/mailbox/fsl,mu.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml index 8a3470b64d06..7ed096360be2 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml @@ -38,8 +38,9 @@ properties: - const: fsl,imx6sx-mu - description: To communicate with i.MX8 SCU with fast IPC items: - - const: fsl,imx8qxp-mu - const: fsl,imx8-mu-scu + - const: fsl,imx8qxp-mu + - const: fsl,imx6sx-mu reg: maxItems: 1 From patchwork Sat Aug 29 11:17:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 254883 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBA70C433E6 for ; Sat, 29 Aug 2020 11:32:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9B36A2074A for ; Sat, 29 Aug 2020 11:32:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598700748; bh=rDXBcV3XN5qq1pJVMo/u6Jp3rVX4suUWfxh/aiZVSVc=; h=From:To:Subject:Date:In-Reply-To:References:List-ID:From; b=0tAdSkrJK/5iUFaw3RN8duhT60DOsCG2oHIots6WRTVKaW5YKKVWdXfmdzVzUvfth xnk0rvkrHdXamSTwTc+Ije2CV0kclwwKWpoDhxDVRPBlP7ItZjpiVQTFu1vxe7K/9h pbMbiFhScwp5Zq3c30K+0hOODNBokfv8JCkARMDo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727932AbgH2Lb6 (ORCPT ); Sat, 29 Aug 2020 07:31:58 -0400 Received: from mail.kernel.org ([198.145.29.99]:47906 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728087AbgH2La1 (ORCPT ); Sat, 29 Aug 2020 07:30:27 -0400 Received: from localhost.localdomain (unknown [194.230.155.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D519E212CC; Sat, 29 Aug 2020 11:18:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598699904; bh=rDXBcV3XN5qq1pJVMo/u6Jp3rVX4suUWfxh/aiZVSVc=; h=From:To:Subject:Date:In-Reply-To:References:From; b=EgI+NKrxdWQD93vyhOdGOCT6BeKcx7yOgSRZkezVVndRl4x41g1yV6TMPGTFBYkvy vG9VHEtgFU+u66NNxDxQrwiUh1IgAhXVdDHcr8DhAubc7QoqAvo7pzS2SzOezjFv2U dUmDMHNbbsgNiAfU5hIdGxGzXkZSF9hJh5Bb4GIE= From: Krzysztof Kozlowski To: Michael Turquette , Stephen Boyd , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Krzysztof Kozlowski , Anson Huang , Wolfram Sang , Dong Aisheng , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 5/7] dt-bindings: i2c: imx-lpi2c: Fix i.MX 8QXP compatible matching Date: Sat, 29 Aug 2020 13:17:58 +0200 Message-Id: <20200829111800.2786-5-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200829111800.2786-1-krzk@kernel.org> References: <20200829111800.2786-1-krzk@kernel.org> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org The i.MX 8QXP DTSes use two compatibles so update the binding to fix dtbs_check warnings like: arch/arm64/boot/dts/freescale/imx8qxp-mek.dt.yaml: i2c@5a820000: compatible: ['fsl,imx8qxp-lpi2c', 'fsl,imx7ulp-lpi2c'] is too long Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/i2c/i2c-imx-lpi2c.yaml | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml index 594e174e2cde..319147b780cb 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml @@ -11,10 +11,13 @@ maintainers: properties: compatible: - enum: - - fsl,imx7ulp-lpi2c - - fsl,imx8qxp-lpi2c - - fsl,imx8qm-lpi2c + oneOf: + - enum: + - fsl,imx7ulp-lpi2c + - fsl,imx8qm-lpi2c + - items: + - const: fsl,imx8qxp-lpi2c + - const: fsl,imx7ulp-lpi2c reg: maxItems: 1 From patchwork Sat Aug 29 11:18:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 254884 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 873E9C433E2 for ; Sat, 29 Aug 2020 11:26:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5A6092151B for ; Sat, 29 Aug 2020 11:26:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598700390; bh=jpPjWh6NvjNnA8Jn0CmFtKO+pYti8+XJbh59IY3ALEE=; h=From:To:Subject:Date:In-Reply-To:References:List-ID:From; b=odD9Fc45XkJ15iaIkUYMEJMeDkTMeyjz3AHLzb/vRAul0KLj6zSzJe8N+FAdVdFts dmaAru9ShKxy4mJ8LArhlZFnzugQ/+dUYQ/XwD1K99pwYuwjUXfUbuXrAWiiZfb0Oq kfixlD4Gmq9EBeJ9EYxRF4l7KdhPeGK1bT7X1yJg= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726952AbgH2L0Y (ORCPT ); Sat, 29 Aug 2020 07:26:24 -0400 Received: from mail.kernel.org ([198.145.29.99]:44802 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727930AbgH2LXo (ORCPT ); Sat, 29 Aug 2020 07:23:44 -0400 Received: from localhost.localdomain (unknown [194.230.155.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 27C2F20CC7; Sat, 29 Aug 2020 11:18:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1598699912; bh=jpPjWh6NvjNnA8Jn0CmFtKO+pYti8+XJbh59IY3ALEE=; h=From:To:Subject:Date:In-Reply-To:References:From; b=u/iBHlfCQMbcoJGw+hNYUjYe6HpcATuliCE+mdP/1pjDbyBePKFiRRo6CbPrUBtrG +z7UavNPTgyiA3XEyQCp8pCz7X18g1hcII+N02RC0YoMllqVy/2/Ec0zsQ6yCxnOIo 0bfFBtVJvgRxV5wESQAL+466Plxc02TsTTqWM6fg= From: Krzysztof Kozlowski To: Michael Turquette , Stephen Boyd , Rob Herring , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Krzysztof Kozlowski , Anson Huang , Wolfram Sang , Dong Aisheng , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org Subject: [PATCH 7/7] dt-bindings: i2c: imx: Fix i.MX 7 compatible matching Date: Sat, 29 Aug 2020 13:18:00 +0200 Message-Id: <20200829111800.2786-7-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200829111800.2786-1-krzk@kernel.org> References: <20200829111800.2786-1-krzk@kernel.org> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org The i.MX 7 DTSes use two compatibles so update the binding to fix dtbs_check warnings like: arch/arm/boot/dts/imx7d-cl-som-imx7.dt.yaml: i2c@30a20000: compatible: ['fsl,imx7d-i2c', 'fsl,imx21-i2c'] is not valid under any of the given schemas (Possible causes of the failure): arch/arm/boot/dts/imx7d-cl-som-imx7.dt.yaml: i2c@30a20000: compatible: ['fsl,imx7d-i2c', 'fsl,imx21-i2c'] is too long Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml index 73b4e628802c..2d555d5bacc5 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml @@ -18,6 +18,9 @@ properties: - items: - const: fsl,imx35-i2c - const: fsl,imx1-i2c + - items: + - const: fsl,imx7d-i2c + - const: fsl,imx21-i2c - items: - enum: - fsl,imx25-i2c