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Iglesias" , Francisco Iglesias Subject: [PATCH v4 2/7] usb/hcd-xhci: Move qemu-xhci device to hcd-xhci-pci.c Date: Sat, 29 Aug 2020 00:49:35 +0530 Message-Id: <1598642380-27817-3-git-send-email-sai.pavan.boddu@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1598642380-27817-1-git-send-email-sai.pavan.boddu@xilinx.com> References: <1598642380-27817-1-git-send-email-sai.pavan.boddu@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 52aebbb5-13dc-4e90-e7ee-08d84b86b1c9 X-MS-TrafficTypeDiagnostic: DM6PR02MB5033: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:5516; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: FuKE7QGIBo7QeUVNccl0YgnZOhazd0AOQThom/o95yXXrlXo/z67+uKzcXlWB+GBjViLjpgg/JdlErmSmc6qi8lz15WJXRQKC18JhdrgNXygVy6RI+2keeygLMQGwEGgrUHHzVhkoiqPpalEc4BHGdmVNeMYBMacVxUcMZrZUrDSOUvPJgp8PUpZIS8lpZM49xZNkeRnB2DIRwn5h+sStFLPtvzMhcL/QDN3t+a+KFJDio458rQ2/U3X8fc0pEwgro6NIoiyXfjSUOxdStmG84jdyNPwp6vom849OHm5oE/zKXcHIRiLWvBVExffqwOhWQHEr7zlo16IyUVBj9tz2bAP9wT5IsFVSlq/yPyfhNNfZi5p6MX5qLuwJN6QO3YT6Rib/ivB5sattShxZHPTPe+aUq6EtQBvjcUGA3naPqmqe9PxTZo4n9D46qz5nrgYVqI2OrFNA2CzKSWD7aa+3Oi9EUsVf6e2beB/gJtkFGrpbskbpUtlfwAlzw2ij2Aa X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFS:(136003)(346002)(376002)(39860400002)(396003)(46966005)(42186006)(186003)(83380400001)(316002)(4326008)(54906003)(36756003)(478600001)(2616005)(426003)(5660300002)(336012)(26005)(6636002)(82310400002)(356005)(8936002)(82740400003)(6266002)(70586007)(70206006)(81166007)(8676002)(6666004)(47076004)(7416002)(110136005)(2906002)(2004002); DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Aug 2020 19:15:15.3245 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 52aebbb5-13dc-4e90-e7ee-08d84b86b1c9 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: BL2NAM02FT014.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR02MB5033 Received-SPF: pass client-ip=40.107.76.70; envelope-from=saipava@xilinx.com; helo=NAM02-CY1-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/28 15:30:18 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Vikram Garhwal , sai.pavan.boddu@xilinx.com, qemu-devel@nongnu.org, Paul Zimmerman , Alistair Francis , Ying Fang , =?utf-8?q?=27Philippe_Mathieu-Daud?= =?utf-8?b?w6kn?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Move pci specific devices to new file. This set the environment to move all pci specific hooks in hcd-xhci.c to hcd-xhci-pci.c. Signed-off-by: Sai Pavan Boddu --- hw/usb/Kconfig | 6 +++++ hw/usb/Makefile.objs | 1 + hw/usb/hcd-xhci-pci.c | 66 +++++++++++++++++++++++++++++++++++++++++++++++++++ hw/usb/hcd-xhci.c | 41 ++------------------------------ hw/usb/hcd-xhci.h | 3 +++ 5 files changed, 78 insertions(+), 39 deletions(-) create mode 100644 hw/usb/hcd-xhci-pci.c diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig index d4d8c37..d9965c1 100644 --- a/hw/usb/Kconfig +++ b/hw/usb/Kconfig @@ -36,6 +36,12 @@ config USB_XHCI depends on PCI select USB +config USB_XHCI_PCI + bool + default y if PCI_DEVICES + depends on PCI + select USB_XHCI + config USB_XHCI_NEC bool default y if PCI_DEVICES diff --git a/hw/usb/Makefile.objs b/hw/usb/Makefile.objs index e342ff5..029b040 100644 --- a/hw/usb/Makefile.objs +++ b/hw/usb/Makefile.objs @@ -11,6 +11,7 @@ common-obj-$(CONFIG_USB_EHCI_PCI) += hcd-ehci-pci.o common-obj-$(CONFIG_USB_EHCI_SYSBUS) += hcd-ehci-sysbus.o common-obj-$(CONFIG_USB_XHCI) += hcd-xhci.o common-obj-$(CONFIG_USB_XHCI_NEC) += hcd-xhci-nec.o +common-obj-$(CONFIG_USB_XHCI_PCI) += hcd-xhci-pci.o common-obj-$(CONFIG_USB_MUSB) += hcd-musb.o common-obj-$(CONFIG_USB_DWC2) += hcd-dwc2.o diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c new file mode 100644 index 0000000..1562757 --- /dev/null +++ b/hw/usb/hcd-xhci-pci.c @@ -0,0 +1,66 @@ +/* + * USB xHCI controller with PCI bus emulation + * + * SPDX-FileCopyrightText: 2011 Securiforest + * SPDX-FileContributor: Hector Martin + * SPDX-sourceInfo: Based on usb-ohci.c, emulates Renesas NEC USB 3.0 + * SPDX-FileCopyrightText: 2020 Xilinx + * SPDX-FileContributor: Sai Pavan Boddu + * SPDX-sourceInfo: Moved the pci specific content for hcd-xhci.c to + * hcd-xhci-pci.c + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#include "qemu/osdep.h" +#include "hw/pci/pci.h" +#include "hw/qdev-properties.h" +#include "hw/pci/msi.h" +#include "hw/pci/msix.h" +#include "hcd-xhci.h" +#include "trace.h" +#include "qapi/error.h" + +static void qemu_xhci_class_init(ObjectClass *klass, void *data) +{ + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); + + k->vendor_id = PCI_VENDOR_ID_REDHAT; + k->device_id = PCI_DEVICE_ID_REDHAT_XHCI; + k->revision = 0x01; +} + +static void qemu_xhci_instance_init(Object *obj) +{ + XHCIState *xhci = XHCI(obj); + + xhci->msi = ON_OFF_AUTO_OFF; + xhci->msix = ON_OFF_AUTO_AUTO; + xhci->numintrs = MAXINTRS; + xhci->numslots = MAXSLOTS; + xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST); +} + +static const TypeInfo qemu_xhci_info = { + .name = TYPE_QEMU_XHCI, + .parent = TYPE_XHCI, + .class_init = qemu_xhci_class_init, + .instance_init = qemu_xhci_instance_init, +}; + +static void xhci_register_types(void) +{ + type_register_static(&qemu_xhci_info); +} + +type_init(xhci_register_types) diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index 2590f7a..b15c53b 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -23,7 +23,6 @@ #include "qemu/timer.h" #include "qemu/module.h" #include "qemu/queue.h" -#include "hw/usb.h" #include "migration/vmstate.h" #include "hw/pci/pci.h" #include "hw/qdev-properties.h" @@ -429,12 +428,12 @@ static const char *ep_state_name(uint32_t state) ARRAY_SIZE(ep_state_names)); } -static bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit) +bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit) { return xhci->flags & (1 << bit); } -static void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit) +void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit) { xhci->flags |= (1 << bit); } @@ -3692,13 +3691,6 @@ static Property xhci_properties[] = { DEFINE_PROP_END_OF_LIST(), }; -static void xhci_instance_init(Object *obj) -{ - /* QEMU_PCI_CAP_EXPRESS initialization does not depend on QEMU command - * line, therefore, no need to wait to realize like other devices */ - PCI_DEVICE(obj)->cap_present |= QEMU_PCI_CAP_EXPRESS; -} - static void xhci_class_init(ObjectClass *klass, void *data) { PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); @@ -3718,7 +3710,6 @@ static const TypeInfo xhci_info = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(XHCIState), .class_init = xhci_class_init, - .instance_init = xhci_instance_init, .abstract = true, .interfaces = (InterfaceInfo[]) { { INTERFACE_PCIE_DEVICE }, @@ -3727,37 +3718,9 @@ static const TypeInfo xhci_info = { }, }; -static void qemu_xhci_class_init(ObjectClass *klass, void *data) -{ - PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); - - k->vendor_id = PCI_VENDOR_ID_REDHAT; - k->device_id = PCI_DEVICE_ID_REDHAT_XHCI; - k->revision = 0x01; -} - -static void qemu_xhci_instance_init(Object *obj) -{ - XHCIState *xhci = XHCI(obj); - - xhci->msi = ON_OFF_AUTO_OFF; - xhci->msix = ON_OFF_AUTO_AUTO; - xhci->numintrs = MAXINTRS; - xhci->numslots = MAXSLOTS; - xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST); -} - -static const TypeInfo qemu_xhci_info = { - .name = TYPE_QEMU_XHCI, - .parent = TYPE_XHCI, - .class_init = qemu_xhci_class_init, - .instance_init = qemu_xhci_instance_init, -}; - static void xhci_register_types(void) { type_register_static(&xhci_info); - type_register_static(&qemu_xhci_info); } type_init(xhci_register_types) diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index edbd926..dd5fcd4 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -23,6 +23,7 @@ #define HW_USB_HCD_XHCI_H #include "sysemu/dma.h" +#include "hw/usb.h" #define TYPE_XHCI "base-xhci" #define TYPE_NEC_XHCI "nec-usb-xhci" @@ -232,4 +233,6 @@ struct XHCIState { bool nec_quirks; }; +bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit); +void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit); #endif From patchwork Fri Aug 28 19:19:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sai Pavan Boddu X-Patchwork-Id: 275189 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD2CDC433E7 for ; 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Iglesias" , Francisco Iglesias Subject: [PATCH v4 4/7] usb: hcd-xhci-sysbus: Attach xhci to sysbus device Date: Sat, 29 Aug 2020 00:49:37 +0530 Message-Id: <1598642380-27817-5-git-send-email-sai.pavan.boddu@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1598642380-27817-1-git-send-email-sai.pavan.boddu@xilinx.com> References: <1598642380-27817-1-git-send-email-sai.pavan.boddu@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: bd98a9c6-c88d-46c9-792c-08d84b86b1d8 X-MS-TrafficTypeDiagnostic: CH2PR02MB6229: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:130; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: /DX1dDA7ll7yfWz1SveOLJ2FGXxXVInZdwESlLC4UDXpMB7ya4gHBRaLXJIp/gauHO4g+LilVimfn9LQk06XGC48ZgaC0CEqAkPCS2Etg56uC4Enw5CEoNtfv2HGkjsW2xpfbPR5umxq3iYl2G9Yb6GhT4YI6x/pNZQbHBgf/A0jFhBYa/D2jwxsYIlRKt+O++ihgAoVNaCr+HuZ5KdRZ490HyFW7zmzg2j5LA9oaMtUe/K5JgPJoMajaeAEWDZfjBdTTePs1SdmFVFbDwFx0XhG83PikXW7cLvczmdeYvIGBaz6llZEZZK5Jcc7209Vc0m9dqm0AJQYaYpgQ9mxPePWBY4So7zZOmHULpwJ5x6VISfZpwuD4ZzSDUxQWv1fU14q3G2jmo2U6xWUnNdhwA== X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFS:(376002)(346002)(136003)(39860400002)(396003)(46966005)(6636002)(5660300002)(7416002)(70586007)(54906003)(82740400003)(70206006)(8936002)(316002)(110136005)(26005)(47076004)(42186006)(83380400001)(8676002)(4326008)(356005)(36756003)(2906002)(186003)(426003)(81166007)(82310400002)(6666004)(2616005)(6266002)(336012)(478600001); DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Aug 2020 19:15:15.4230 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bd98a9c6-c88d-46c9-792c-08d84b86b1d8 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: BL2NAM02FT030.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR02MB6229 Received-SPF: pass client-ip=40.107.76.70; envelope-from=saipava@xilinx.com; helo=NAM02-CY1-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/28 15:30:18 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Vikram Garhwal , sai.pavan.boddu@xilinx.com, qemu-devel@nongnu.org, Paul Zimmerman , Alistair Francis , Ying Fang , =?utf-8?q?=27Philippe_Mathieu-Daud?= =?utf-8?b?w6kn?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Use XHCI as sysbus device, add memory region property to get the address space instance for dma read/write. Signed-off-by: Sai Pavan Boddu --- hw/usb/Kconfig | 5 +++ hw/usb/Makefile.objs | 1 + hw/usb/hcd-xhci-sysbus.c | 99 ++++++++++++++++++++++++++++++++++++++++++++++++ hw/usb/hcd-xhci-sysbus.h | 32 ++++++++++++++++ hw/usb/hcd-xhci.h | 1 + 5 files changed, 138 insertions(+) create mode 100644 hw/usb/hcd-xhci-sysbus.c create mode 100644 hw/usb/hcd-xhci-sysbus.h diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig index d9965c1..a251501 100644 --- a/hw/usb/Kconfig +++ b/hw/usb/Kconfig @@ -48,6 +48,11 @@ config USB_XHCI_NEC depends on PCI select USB_XHCI +config USB_XHCI_SYSBUS + bool + default y if USB_XHCI + select USB + config USB_MUSB bool select USB diff --git a/hw/usb/Makefile.objs b/hw/usb/Makefile.objs index 029b040..f16a3c3 100644 --- a/hw/usb/Makefile.objs +++ b/hw/usb/Makefile.objs @@ -12,6 +12,7 @@ common-obj-$(CONFIG_USB_EHCI_SYSBUS) += hcd-ehci-sysbus.o common-obj-$(CONFIG_USB_XHCI) += hcd-xhci.o common-obj-$(CONFIG_USB_XHCI_NEC) += hcd-xhci-nec.o common-obj-$(CONFIG_USB_XHCI_PCI) += hcd-xhci-pci.o +common-obj-$(CONFIG_USB_XHCI_SYSBUS) += hcd-xhci-sysbus.o common-obj-$(CONFIG_USB_MUSB) += hcd-musb.o common-obj-$(CONFIG_USB_DWC2) += hcd-dwc2.o diff --git a/hw/usb/hcd-xhci-sysbus.c b/hw/usb/hcd-xhci-sysbus.c new file mode 100644 index 0000000..d5b4656 --- /dev/null +++ b/hw/usb/hcd-xhci-sysbus.c @@ -0,0 +1,99 @@ +/* + * USB xHCI controller for system-bus interface + * Based on hcd-echi-sysbus.c + + * SPDX-FileCopyrightText: 2020 Xilinx + * SPDX-FileContributor: Author: Sai Pavan Boddu + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "qemu/osdep.h" +#include "hw/qdev-properties.h" +#include "migration/vmstate.h" +#include "trace.h" +#include "qapi/error.h" +#include "hcd-xhci-sysbus.h" +#include "hw/irq.h" + +static void xhci_sysbus_intr_raise(XHCIState *xhci, int n, bool level) +{ + XHCISysbusState *s = container_of(xhci, XHCISysbusState, xhci); + + qemu_set_irq(s->irq[n], level); +} + +void xhci_sysbus_reset(DeviceState *dev) +{ + XHCISysbusState *s = XHCI_SYSBUS(dev); + + device_legacy_reset(DEVICE(&s->xhci)); +} + +static void xhci_sysbus_realize(DeviceState *dev, Error **errp) +{ + XHCISysbusState *s = XHCI_SYSBUS(dev); + Error *err = NULL; + + object_property_set_link(OBJECT(&s->xhci), "host", OBJECT(s), NULL); + object_property_set_bool(OBJECT(&s->xhci), "realized", true, &err); + if (err) { + error_propagate(errp, err); + return; + } + s->irq = g_new0(qemu_irq, s->xhci.numintrs); + qdev_init_gpio_out_named(dev, s->irq, SYSBUS_DEVICE_GPIO_IRQ, + s->xhci.numintrs); + if (s->xhci.dma_mr) { + s->xhci.as = g_malloc0(sizeof(AddressSpace)); + address_space_init(s->xhci.as, s->xhci.dma_mr, NULL); + } else { + s->xhci.as = &address_space_memory; + } + + sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->xhci.mem); +} + +static void xhci_sysbus_instance_init(Object *obj) +{ + XHCISysbusState *s = XHCI_SYSBUS(obj); + + object_initialize_child(obj, "xhci-core", &s->xhci, TYPE_XHCI); + qdev_alias_all_properties(DEVICE(&s->xhci), obj); + + object_property_add_link(obj, "dma", TYPE_MEMORY_REGION, + (Object **)&s->xhci.dma_mr, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_STRONG); + s->xhci.intr_update = NULL; + s->xhci.intr_raise = xhci_sysbus_intr_raise; +} + +static Property xhci_sysbus_props[] = { + DEFINE_PROP_UINT32("intrs", XHCISysbusState, xhci.numintrs, MAXINTRS), + DEFINE_PROP_UINT32("slots", XHCISysbusState, xhci.numslots, MAXSLOTS), + DEFINE_PROP_END_OF_LIST(), +}; + +static void xhci_sysbus_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->reset = xhci_sysbus_reset; + dc->realize = xhci_sysbus_realize; + device_class_set_props(dc, xhci_sysbus_props); +} + +static const TypeInfo xhci_sysbus_info = { + .name = TYPE_XHCI_SYSBUS, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(XHCISysbusState), + .class_init = xhci_sysbus_class_init, + .instance_init = xhci_sysbus_instance_init +}; + +static void xhci_sysbus_register_types(void) +{ + type_register_static(&xhci_sysbus_info); +} + +type_init(xhci_sysbus_register_types); diff --git a/hw/usb/hcd-xhci-sysbus.h b/hw/usb/hcd-xhci-sysbus.h new file mode 100644 index 0000000..a308753 --- /dev/null +++ b/hw/usb/hcd-xhci-sysbus.h @@ -0,0 +1,32 @@ +/* + * USB xHCI controller for system-bus interface + * + * SPDX-FileCopyrightText: 2020 Xilinx + * SPDX-FileContributor: Author: Sai Pavan Boddu + * SPDX-sourceInfo: Based on hcd-echi-sysbus + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef HW_USB_HCD_XHCI_SYSBUS_H +#define HW_USB_HCD_XHCI_SYSBUS_H + +#include "hw/usb.h" +#include "hcd-xhci.h" +#include "hw/sysbus.h" + +#define TYPE_XHCI_SYSBUS "sysbus-xhci" +#define XHCI_SYSBUS(obj) \ + OBJECT_CHECK(XHCISysbusState, (obj), TYPE_XHCI_SYSBUS) + + +typedef struct XHCISysbusState { + /*< private >*/ + SysBusDevice parent_obj; + /*< public >*/ + XHCIState xhci; + qemu_irq *irq; +} XHCISysbusState; + +void xhci_sysbus_reset(DeviceState *dev); +#endif diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index fea1761..b951df4 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -190,6 +190,7 @@ typedef struct XHCIState { USBBus bus; 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Iglesias" , Francisco Iglesias Subject: [PATCH v4 5/7] misc: Add versal-usb2-regs module Date: Sat, 29 Aug 2020 00:49:38 +0530 Message-Id: <1598642380-27817-6-git-send-email-sai.pavan.boddu@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1598642380-27817-1-git-send-email-sai.pavan.boddu@xilinx.com> References: <1598642380-27817-1-git-send-email-sai.pavan.boddu@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: f2e78232-cda4-4d52-b5b1-08d84b86b252 X-MS-TrafficTypeDiagnostic: BN8PR02MB5841: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:231; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: gWypIJuKcALVUZ1EdzfSs1Gh9FsLD6N9GRBIm5sQfRl1+hUg8CorVa1sEffoQSZezRaMFxSjJGBtYjEXNfb7GG+DuWDyrEFVHpeeHMYkvZTkUWo5cKf2XWAHNxlO0kOBaczwiKf2tdKdD5GWlbS+iSpdn+u5kFdFyUu0wR3BO57Wt86WDLmtPCE9c+k7/UB3gxdhJ4A4Qg912oPzFTto2IcYrkjL4XmPM/RF4Uru3MZ2+UZqzzJE/gmiCGkXH83PaBOmXMGaS2ALgm3+R0XVP4U8z5UsnyGR9pMslUszd83qOtzf70z3rNFGRdC6QIPU0XUvXDYe03KnvVXDyo67KmdAdS2qZISn61scjNtueU6Fk9mTKvi8250gCPnatbk6JuuTqrw9Q5T1wJSgdc842Q== X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFS:(396003)(136003)(346002)(39860400002)(376002)(46966005)(4326008)(26005)(8936002)(6266002)(8676002)(186003)(36756003)(70586007)(70206006)(5660300002)(2616005)(82310400002)(426003)(6666004)(336012)(83380400001)(54906003)(7416002)(110136005)(47076004)(356005)(81166007)(82740400003)(6636002)(478600001)(316002)(2906002)(42186006); DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Aug 2020 19:15:16.2121 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f2e78232-cda4-4d52-b5b1-08d84b86b252 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT053.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR02MB5841 Received-SPF: pass client-ip=40.107.223.56; envelope-from=saipava@xilinx.com; helo=NAM11-DM6-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/28 15:15:18 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Vikram Garhwal , sai.pavan.boddu@xilinx.com, qemu-devel@nongnu.org, Paul Zimmerman , Alistair Francis , Ying Fang , =?utf-8?q?=27Philippe_Mathieu-Daud?= =?utf-8?b?w6kn?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This is a dummy module to emulate control registers of versal usb2 controller. Signed-off-by: Sai Pavan Boddu Signed-off-by: Vikram Garhwal --- hw/misc/Makefile.objs | 1 + hw/misc/xlnx-versal-usb2-regs.c | 224 ++++++++++++++++++++++++++++++++ include/hw/misc/xlnx-versal-usb2-regs.h | 43 ++++++ 3 files changed, 268 insertions(+) create mode 100644 hw/misc/xlnx-versal-usb2-regs.c create mode 100644 include/hw/misc/xlnx-versal-usb2-regs.h diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 6be3d25..6d12ca7 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -64,6 +64,7 @@ common-obj-$(CONFIG_RASPI) += bcm2835_thermal.o common-obj-$(CONFIG_SLAVIO) += slavio_misc.o common-obj-$(CONFIG_ZYNQ) += zynq_slcr.o common-obj-$(CONFIG_ZYNQ) += zynq-xadc.o +common-obj-$(CONFIG_XLNX_VERSAL) += xlnx-versal-usb2-regs.o common-obj-$(CONFIG_STM32F2XX_SYSCFG) += stm32f2xx_syscfg.o common-obj-$(CONFIG_STM32F4XX_SYSCFG) += stm32f4xx_syscfg.o common-obj-$(CONFIG_STM32F4XX_EXTI) += stm32f4xx_exti.o diff --git a/hw/misc/xlnx-versal-usb2-regs.c b/hw/misc/xlnx-versal-usb2-regs.c new file mode 100644 index 0000000..244cda2 --- /dev/null +++ b/hw/misc/xlnx-versal-usb2-regs.c @@ -0,0 +1,224 @@ +/* + * QEMU model of the XlnxUsb2Regs Register control block/Status for USB2.0 IP + * + * Copyright (c) 2020 Xilinx Inc. + * + * Autogenerated by xregqemu.py 2020-04-08. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "hw/sysbus.h" +#include "hw/irq.h" +#include "hw/register.h" +#include "qemu/bitops.h" +#include "qemu/log.h" +#include "qom/object.h" +#include "migration/vmstate.h" +#include "hw/misc/xlnx-versal-usb2-regs.h" + +#ifndef XILINX_USB2_REGS_ERR_DEBUG +#define XILINX_USB2_REGS_ERR_DEBUG 0 +#endif + +#define TYPE_XILINX_USB2_REGS "xlnx.usb2_regs" + +#define XILINX_USB2_REGS(obj) \ + OBJECT_CHECK(XlnxUsb2Regs, (obj), TYPE_XILINX_USB2_REGS) + +REG32(BUS_FILTER, 0x30) + FIELD(BUS_FILTER, BYPASS, 0, 4) +REG32(PORT, 0x34) + FIELD(PORT, HOST_SMI_BAR_WR, 4, 1) + FIELD(PORT, HOST_SMI_PCI_CMD_REG_WR, 3, 1) + FIELD(PORT, HOST_MSI_ENABLE, 2, 1) + FIELD(PORT, PWR_CTRL_PRSNT, 1, 1) + FIELD(PORT, HUB_PERM_ATTACH, 0, 1) +REG32(JITTER_ADJUST, 0x38) + FIELD(JITTER_ADJUST, FLADJ, 0, 6) +REG32(BIGENDIAN, 0x40) + FIELD(BIGENDIAN, ENDIAN_GS, 0, 1) +REG32(COHERENCY, 0x44) + FIELD(COHERENCY, USB_COHERENCY, 0, 1) +REG32(XHC_BME, 0x48) + FIELD(XHC_BME, XHC_BME, 0, 1) +REG32(REG_CTRL, 0x60) + FIELD(REG_CTRL, SLVERR_ENABLE, 0, 1) +REG32(IR_STATUS, 0x64) + FIELD(IR_STATUS, HOST_SYS_ERR, 1, 1) + FIELD(IR_STATUS, ADDR_DEC_ERR, 0, 1) +REG32(IR_MASK, 0x68) + FIELD(IR_MASK, HOST_SYS_ERR, 1, 1) + FIELD(IR_MASK, ADDR_DEC_ERR, 0, 1) +REG32(IR_ENABLE, 0x6c) + FIELD(IR_ENABLE, HOST_SYS_ERR, 1, 1) + FIELD(IR_ENABLE, ADDR_DEC_ERR, 0, 1) +REG32(IR_DISABLE, 0x70) + FIELD(IR_DISABLE, HOST_SYS_ERR, 1, 1) + FIELD(IR_DISABLE, ADDR_DEC_ERR, 0, 1) +REG32(USB3, 0x78) + +static void ir_update_irq(XlnxUsb2Regs *s) +{ + bool pending = s->regs[R_IR_STATUS] & ~s->regs[R_IR_MASK]; + qemu_set_irq(s->irq_ir, pending); +} + +static void ir_status_postw(RegisterInfo *reg, uint64_t val64) +{ + XlnxUsb2Regs *s = XILINX_USB2_REGS(reg->opaque); + /* + * TODO: This should also clear USBSTS.HSE field in USB XHCI register. + * May be combine both the modules. + */ + ir_update_irq(s); +} + +static uint64_t ir_enable_prew(RegisterInfo *reg, uint64_t val64) +{ + XlnxUsb2Regs *s = XILINX_USB2_REGS(reg->opaque); + uint32_t val = val64; + + s->regs[R_IR_MASK] &= ~val; + ir_update_irq(s); + return 0; +} + +static uint64_t ir_disable_prew(RegisterInfo *reg, uint64_t val64) +{ + XlnxUsb2Regs *s = XILINX_USB2_REGS(reg->opaque); + uint32_t val = val64; + + s->regs[R_IR_MASK] |= val; + ir_update_irq(s); + return 0; +} + +static const RegisterAccessInfo usb2_regs_regs_info[] = { + { .name = "BUS_FILTER", .addr = A_BUS_FILTER, + .rsvd = 0xfffffff0, + },{ .name = "PORT", .addr = A_PORT, + .rsvd = 0xffffffe0, + },{ .name = "JITTER_ADJUST", .addr = A_JITTER_ADJUST, + .reset = 0x20, + .rsvd = 0xffffffc0, + },{ .name = "BIGENDIAN", .addr = A_BIGENDIAN, + .rsvd = 0xfffffffe, + },{ .name = "COHERENCY", .addr = A_COHERENCY, + .rsvd = 0xfffffffe, + },{ .name = "XHC_BME", .addr = A_XHC_BME, + .reset = 0x1, + .rsvd = 0xfffffffe, + },{ .name = "REG_CTRL", .addr = A_REG_CTRL, + .rsvd = 0xfffffffe, + },{ .name = "IR_STATUS", .addr = A_IR_STATUS, + .rsvd = 0xfffffffc, + .w1c = 0x3, + .post_write = ir_status_postw, + },{ .name = "IR_MASK", .addr = A_IR_MASK, + .reset = 0x3, + .rsvd = 0xfffffffc, + .ro = 0x3, + },{ .name = "IR_ENABLE", .addr = A_IR_ENABLE, + .rsvd = 0xfffffffc, + .pre_write = ir_enable_prew, + },{ .name = "IR_DISABLE", .addr = A_IR_DISABLE, + .rsvd = 0xfffffffc, + .pre_write = ir_disable_prew, + },{ .name = "USB3", .addr = A_USB3, + } +}; + +static void usb2_regs_reset(DeviceState *dev) +{ + XlnxUsb2Regs *s = XILINX_USB2_REGS(dev); + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(s->regs_info); ++i) { + register_reset(&s->regs_info[i]); + } + + ir_update_irq(s); +} + +static const MemoryRegionOps usb2_regs_ops = { + .read = register_read_memory, + .write = register_write_memory, + .endianness = DEVICE_LITTLE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, +}; + +static void usb2_regs_init(Object *obj) +{ + XlnxUsb2Regs *s = XILINX_USB2_REGS(obj); + SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + RegisterInfoArray *reg_array; + + memory_region_init(&s->iomem, obj, TYPE_XILINX_USB2_REGS, + USB2_REGS_R_MAX * 4); + reg_array = + register_init_block32(DEVICE(obj), usb2_regs_regs_info, + ARRAY_SIZE(usb2_regs_regs_info), + s->regs_info, s->regs, + &usb2_regs_ops, + XILINX_USB2_REGS_ERR_DEBUG, + USB2_REGS_R_MAX * 4); + memory_region_add_subregion(&s->iomem, + 0x0, + ®_array->mem); + sysbus_init_mmio(sbd, &s->iomem); + sysbus_init_irq(sbd, &s->irq_ir); +} + +static const VMStateDescription vmstate_usb2_regs = { + .name = TYPE_XILINX_USB2_REGS, + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_UINT32_ARRAY(regs, XlnxUsb2Regs, USB2_REGS_R_MAX), + VMSTATE_END_OF_LIST(), + } +}; + +static void usb2_regs_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->reset = usb2_regs_reset; + dc->vmsd = &vmstate_usb2_regs; +} + +static const TypeInfo usb2_regs_info = { + .name = TYPE_XILINX_USB2_REGS, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(XlnxUsb2Regs), + .class_init = usb2_regs_class_init, + .instance_init = usb2_regs_init, +}; + +static void usb2_regs_register_types(void) +{ + type_register_static(&usb2_regs_info); +} + +type_init(usb2_regs_register_types) diff --git a/include/hw/misc/xlnx-versal-usb2-regs.h b/include/hw/misc/xlnx-versal-usb2-regs.h new file mode 100644 index 0000000..4c5dc02 --- /dev/null +++ b/include/hw/misc/xlnx-versal-usb2-regs.h @@ -0,0 +1,43 @@ +/* + * QEMU model of the XlnxUsb2Regs Register control block/Status for USB2.0 IP + * + * Copyright (c) 2020 Xilinx Inc. + * + * Autogenerated by xregqemu.py 2020-04-08. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef _XLNX_USB2_REGS_H_ +#define _XLNX_USB2_REGS_H_ + +#define USB2_REGS_R_MAX ((0x78 / 4) + 1) + +typedef struct XlnxUsb2Regs { + SysBusDevice parent_obj; + MemoryRegion iomem; + qemu_irq irq_ir; + + uint32_t regs[USB2_REGS_R_MAX]; + RegisterInfo regs_info[USB2_REGS_R_MAX]; +} XlnxUsb2Regs; + +#endif + + From patchwork Fri Aug 28 19:19:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sai Pavan Boddu X-Patchwork-Id: 275190 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C218C433E2 for ; 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Iglesias" , Francisco Iglesias Subject: [PATCH v4 7/7] Versal: Connect DWC3 controller with virt-versal Date: Sat, 29 Aug 2020 00:49:40 +0530 Message-Id: <1598642380-27817-8-git-send-email-sai.pavan.boddu@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1598642380-27817-1-git-send-email-sai.pavan.boddu@xilinx.com> References: <1598642380-27817-1-git-send-email-sai.pavan.boddu@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: d13649e8-2d19-418f-9de4-08d84b86b26b X-MS-TrafficTypeDiagnostic: CH2PR02MB6024: X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Oob-TLC-OOBClassifiers: OLM:119; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: OUy05BFJq8KMzkmmc3S6q44M0R2wo9++T8QVCmeQA6eY6FRI1TYsPXfW2d3cxXKtRrhFHuITYzceBYe5EN3KN4RnjVqS9ezYaqgQ7j4YvgG9tfesqnljdVj4b92JvRT35h7Qjnfn1XtD7wyyQK84VP2MtXXhLxdf1lI5qOmwEkABOKuszEpUhPaufRfhML2X9IDhVog8Z/E7Ww6Spzxx1OCwHCk6EBacnOAkuMyyA1rGcD6h0PNJtFvowlk81Oi32BYUsca3DtqVx5OVd089Kf7eh6SSeYyRx7iVOJbX43FrywYTfEl5qWiXeJZmI+myR/0dItmVfsEkeKelhObI8W3ewXxy3OVHzZsw6YwGC7oQTz82jrv1ScVw7aKCCU3hzfBCuZVNJMICm7tKBKwbZQ== X-Forefront-Antispam-Report: CIP:149.199.60.83; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:xsj-pvapsmtpgw01; PTR:unknown-60-83.xilinx.com; CAT:NONE; SFS:(39860400002)(396003)(376002)(346002)(136003)(46966005)(83380400001)(356005)(26005)(47076004)(6666004)(6636002)(2906002)(70206006)(81166007)(70586007)(426003)(2616005)(82310400002)(186003)(82740400003)(336012)(54906003)(7416002)(6266002)(8676002)(4326008)(8936002)(5660300002)(316002)(110136005)(36756003)(478600001)(42186006); DIR:OUT; SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Aug 2020 19:15:16.3883 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d13649e8-2d19-418f-9de4-08d84b86b26b X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.83]; Helo=[xsj-pvapsmtpgw01] X-MS-Exchange-CrossTenant-AuthSource: BL2NAM02FT039.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR02MB6024 Received-SPF: pass client-ip=40.107.220.74; envelope-from=saipava@xilinx.com; helo=NAM11-CO1-obe.outbound.protection.outlook.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/28 15:15:18 X-ACL-Warn: Detected OS = Windows NT kernel [generic] [fuzzy] X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Vikram Garhwal , sai.pavan.boddu@xilinx.com, qemu-devel@nongnu.org, Paul Zimmerman , Alistair Francis , Ying Fang , =?utf-8?q?=27Philippe_Mathieu-Daud?= =?utf-8?b?w6kn?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Vikram Garhwal Connect dwc3 controller and usb2-reg module to virt-versal. Configure it as dual port host controller. Signed-off-by: Vikram Garhwal Signed-off-by: Sai Pavan Boddu --- hw/arm/xlnx-versal-virt.c | 59 ++++++++++++++++++++++++++++++++++++++++++++ hw/arm/xlnx-versal.c | 38 ++++++++++++++++++++++++++++ include/hw/arm/xlnx-versal.h | 14 +++++++++++ 3 files changed, 111 insertions(+) diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 4b3152e..398693d 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -39,6 +39,8 @@ typedef struct VersalVirt { uint32_t ethernet_phy[2]; uint32_t clk_125Mhz; uint32_t clk_25Mhz; + uint32_t usb; + uint32_t dwc; } phandle; struct arm_boot_info binfo; @@ -66,6 +68,8 @@ static void fdt_create(VersalVirt *s) s->phandle.clk_25Mhz = qemu_fdt_alloc_phandle(s->fdt); s->phandle.clk_125Mhz = qemu_fdt_alloc_phandle(s->fdt); + s->phandle.usb = qemu_fdt_alloc_phandle(s->fdt); + s->phandle.dwc = qemu_fdt_alloc_phandle(s->fdt); /* Create /chosen node for load_dtb. */ qemu_fdt_add_subnode(s->fdt, "/chosen"); @@ -148,6 +152,60 @@ static void fdt_add_timer_nodes(VersalVirt *s) compat, sizeof(compat)); } +static void fdt_add_usb_xhci_nodes(VersalVirt *s) +{ + const char clocknames[] = "bus_clk\0ref_clk"; + char *usb2name = g_strdup_printf("/usb@ff9d0000"); + const char dwcCompat[] = "xlnx,versal-dwc3"; + qemu_fdt_add_subnode(s->fdt, usb2name); + qemu_fdt_setprop(s->fdt, usb2name, "compatible", + dwcCompat, sizeof(dwcCompat)); + qemu_fdt_setprop_sized_cells(s->fdt, usb2name, "reg", + 2, MM_USB2_REGS, 2, 0x100); + qemu_fdt_setprop(s->fdt, usb2name, "clock-names", + clocknames, sizeof(clocknames)); + qemu_fdt_setprop_cells(s->fdt, usb2name, "clocks", + s->phandle.clk_25Mhz, s->phandle.clk_125Mhz); + qemu_fdt_setprop(s->fdt, usb2name, "ranges", NULL, 0); + qemu_fdt_setprop_cell(s->fdt, usb2name, "#address-cells", 2); + qemu_fdt_setprop_cell(s->fdt, usb2name, "#size-cells", 2); + qemu_fdt_setprop_cell(s->fdt, usb2name, "phandle", s->phandle.usb); + g_free(usb2name); + + { + uint64_t addr = MM_USB_XHCI_0; + unsigned int irq = VERSAL_USB0_IRQ_0; + const char compat[] = "snps,dwc3"; + const char intName[] = "dwc_usb3"; + uint32_t frameLen = 0x20; + + char *name = g_strdup_printf("/usb@ff9d0000/dwc3@%" PRIx64, addr); + qemu_fdt_add_subnode(s->fdt, name); + qemu_fdt_setprop(s->fdt, name, "compatible", + compat, sizeof(compat)); + qemu_fdt_setprop_sized_cells(s->fdt, name, "reg", + 2, addr, 2, MM_USB_XHCI_SIZE_0); + qemu_fdt_setprop(s->fdt, name, "interrupt-names", + intName, sizeof(intName)); + qemu_fdt_setprop_cells(s->fdt, name, "interrupts", + GIC_FDT_IRQ_TYPE_SPI, irq, + GIC_FDT_IRQ_FLAGS_LEVEL_HI); + qemu_fdt_setprop_cell(s->fdt, name, + "snps,quirk-frame-length-adjustment", + frameLen); + qemu_fdt_setprop_cells(s->fdt, name, "#stream-id-cells", 1); + qemu_fdt_setprop_string(s->fdt, name, "dr_mode", "host"); + qemu_fdt_setprop_string(s->fdt, name, "phy-names", "usb3-phy"); + qemu_fdt_setprop(s->fdt, name, "snps,dis_u2_susphy_quirk", NULL, 0); + qemu_fdt_setprop(s->fdt, name, "snps,dis_u3_susphy_quirk", NULL, 0); + qemu_fdt_setprop(s->fdt, name, "snps,refclk_fladj", NULL, 0); + qemu_fdt_setprop(s->fdt, name, "snps,mask_phy_reset", NULL, 0); + qemu_fdt_setprop(s->fdt, name, "snps,usb3_lpm_capable", NULL, 0); + qemu_fdt_setprop_cell(s->fdt, name, "phandle", s->phandle.dwc); + qemu_fdt_setprop_string(s->fdt, name, "maximum-speed", "high-speed"); + g_free(name); + } +} static void fdt_add_uart_nodes(VersalVirt *s) { uint64_t addrs[] = { MM_UART1, MM_UART0 }; @@ -515,6 +573,7 @@ static void versal_virt_init(MachineState *machine) fdt_add_gic_nodes(s); fdt_add_timer_nodes(s); fdt_add_zdma_nodes(s); + fdt_add_usb_xhci_nodes(s); fdt_add_sd_nodes(s); fdt_add_rtc_node(s); fdt_add_cpu_nodes(s, psci_conduit); diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index e3aa4bd..5cb03a1 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -145,6 +145,43 @@ static void versal_create_uarts(Versal *s, qemu_irq *pic) } } +static void versal_create_usbs(Versal *s, qemu_irq *pic) +{ + char *name = g_strdup_printf("dwc3-0"); + DeviceState *dev, *xhci_dev; + MemoryRegion *mr; + + object_initialize_child(OBJECT(s), name, &s->fpd.iou.dwc3, + TYPE_USB_DWC3); + dev = DEVICE(&s->fpd.iou.dwc3); + xhci_dev = DEVICE(&s->fpd.iou.dwc3.sysbus_xhci); + + object_property_set_link(OBJECT(xhci_dev), "dma", OBJECT(&s->mr_ps), + &error_abort); + qdev_prop_set_uint32(xhci_dev, "intrs", 4); + qdev_prop_set_uint32(xhci_dev, "slots", 2); + + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); + + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); + memory_region_add_subregion(&s->mr_ps, MM_USB_XHCI_0 + 0xC100 , mr); + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(xhci_dev), 0); + memory_region_add_subregion(&s->mr_ps, MM_USB_XHCI_0, mr); + + sysbus_connect_irq(SYS_BUS_DEVICE(xhci_dev), 0, pic[VERSAL_USB0_IRQ_0]); + g_free(name); + + name = g_strdup_printf("usb2reg-0"); + object_initialize_child(OBJECT(s), name, &s->fpd.iou.Usb2Regs, + "xlnx.usb2_regs"); + dev = DEVICE(&s->fpd.iou.Usb2Regs); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); + + mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0); + memory_region_add_subregion(&s->mr_ps, MM_USB2_REGS, mr); + g_free(name); +} + static void versal_create_gems(Versal *s, qemu_irq *pic) { int i; @@ -332,6 +369,7 @@ static void versal_realize(DeviceState *dev, Error **errp) versal_create_apu_cpus(s); versal_create_apu_gic(s, pic); versal_create_uarts(s, pic); + versal_create_usbs(s, pic); versal_create_gems(s, pic); versal_create_admas(s, pic); versal_create_sds(s, pic); diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 9c9f47b..e19cfd5 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -20,6 +20,8 @@ #include "hw/dma/xlnx-zdma.h" #include "hw/net/cadence_gem.h" #include "hw/rtc/xlnx-zynqmp-rtc.h" +#include "hw/usb/hcd-dwc3.h" +#include "hw/misc/xlnx-versal-usb2-regs.h" #define TYPE_XLNX_VERSAL "xlnx-versal" #define XLNX_VERSAL(obj) OBJECT_CHECK(Versal, (obj), TYPE_XLNX_VERSAL) @@ -42,6 +44,11 @@ typedef struct Versal { ARMCPU cpu[XLNX_VERSAL_NR_ACPUS]; GICv3State gic; } apu; + + struct { + USBDWC3 dwc3; + XlnxUsb2Regs Usb2Regs; + } iou; } fpd; MemoryRegion mr_ps; @@ -87,6 +94,7 @@ typedef struct Versal { #define VERSAL_UART0_IRQ_0 18 #define VERSAL_UART1_IRQ_0 19 +#define VERSAL_USB0_IRQ_0 22 #define VERSAL_GEM0_IRQ_0 56 #define VERSAL_GEM0_WAKE_IRQ_0 57 #define VERSAL_GEM1_IRQ_0 58 @@ -124,6 +132,12 @@ typedef struct Versal { #define MM_OCM 0xfffc0000U #define MM_OCM_SIZE 0x40000 +#define MM_USB2_REGS 0xFF9D0000 +#define MM_USB2_SIZE 0x10000 + +#define MM_USB_XHCI_0 0xFE200000 +#define MM_USB_XHCI_SIZE_0 0x10000 + #define MM_TOP_DDR 0x0 #define MM_TOP_DDR_SIZE 0x80000000U #define MM_TOP_DDR_2 0x800000000ULL