From patchwork Thu Aug 27 09:21:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiangyifei X-Patchwork-Id: 275444 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D654C433E1 for ; Thu, 27 Aug 2020 09:23:47 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4523D2177B for ; Thu, 27 Aug 2020 09:23:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4523D2177B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:55116 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kBE8I-0004NR-GI for qemu-devel@archiver.kernel.org; Thu, 27 Aug 2020 05:23:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56930) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBE7K-0002el-LD; Thu, 27 Aug 2020 05:22:46 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:4273 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBE7I-0003FD-9N; Thu, 27 Aug 2020 05:22:46 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id DD3CB5AA9F2509329753; Thu, 27 Aug 2020 17:22:34 +0800 (CST) Received: from huawei.com (10.174.187.31) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Thu, 27 Aug 2020 17:22:26 +0800 From: Yifei Jiang To: , Subject: [PATCH RFC v3 01/14] linux-header: Update linux/kvm.h Date: Thu, 27 Aug 2020 17:21:24 +0800 Message-ID: <20200827092137.479-2-jiangyifei@huawei.com> X-Mailer: git-send-email 2.26.2.windows.1 In-Reply-To: <20200827092137.479-1-jiangyifei@huawei.com> References: <20200827092137.479-1-jiangyifei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.31] X-CFilter-Loop: Reflected Received-SPF: pass client-ip=45.249.212.191; envelope-from=jiangyifei@huawei.com; helo=huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/27 02:09:23 X-ACL-Warn: Detected OS = Linux 3.11 and newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: victor.zhangxiaofeng@huawei.com, sagark@eecs.berkeley.edu, kvm@vger.kernel.org, libvir-list@redhat.com, kbastian@mail.uni-paderborn.de, anup.patel@wdc.com, yinyipeng1@huawei.com, Alistair.Francis@wdc.com, Yifei Jiang , kvm-riscv@lists.infradead.org, palmer@dabbelt.com, dengkai1@huawei.com, wu.wubin@huawei.com, zhang.zhanghailiang@huawei.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Update linux-headers/linux/kvm.h from https://github.com/kvm-riscv/linux. Only use this header file, so here do not update all linux headers by update-linux-headers.sh until above KVM series is accepted. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- linux-headers/linux/kvm.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index a28c366737..b2d3721798 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -248,6 +248,7 @@ struct kvm_hyperv_exit { #define KVM_EXIT_IOAPIC_EOI 26 #define KVM_EXIT_HYPERV 27 #define KVM_EXIT_ARM_NISV 28 +#define KVM_EXIT_RISCV_SBI 28 /* For KVM_EXIT_INTERNAL_ERROR */ /* Emulate instruction failed. */ @@ -412,6 +413,13 @@ struct kvm_run { __u64 esr_iss; __u64 fault_ipa; } arm_nisv; + /* KVM_EXIT_RISCV_SBI */ + struct { + unsigned long extension_id; + unsigned long function_id; + unsigned long args[6]; + unsigned long ret[2]; + } riscv_sbi; /* Fix the size of the union. */ char padding[256]; }; From patchwork Thu Aug 27 09:21:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiangyifei X-Patchwork-Id: 275438 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B27DC433E1 for ; Thu, 27 Aug 2020 09:29:22 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 64D4122B47 for ; Thu, 27 Aug 2020 09:29:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 64D4122B47 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:53232 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kBEDh-0006Zi-Nb for qemu-devel@archiver.kernel.org; Thu, 27 Aug 2020 05:29:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57074) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBE7Q-0002pk-1i; Thu, 27 Aug 2020 05:22:52 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:56370 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBE7J-0003Fd-76; Thu, 27 Aug 2020 05:22:51 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id C2B8CADD0F0E1E22CFC6; Thu, 27 Aug 2020 17:22:40 +0800 (CST) Received: from huawei.com (10.174.187.31) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Thu, 27 Aug 2020 17:22:27 +0800 From: Yifei Jiang To: , Subject: [PATCH RFC v3 02/14] target/riscv: Add target/riscv/kvm.c to place the public kvm interface Date: Thu, 27 Aug 2020 17:21:25 +0800 Message-ID: <20200827092137.479-3-jiangyifei@huawei.com> X-Mailer: git-send-email 2.26.2.windows.1 In-Reply-To: <20200827092137.479-1-jiangyifei@huawei.com> References: <20200827092137.479-1-jiangyifei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.31] X-CFilter-Loop: Reflected Received-SPF: pass client-ip=45.249.212.35; envelope-from=jiangyifei@huawei.com; helo=huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/27 05:22:41 X-ACL-Warn: Detected OS = Linux 3.11 and newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: victor.zhangxiaofeng@huawei.com, sagark@eecs.berkeley.edu, kvm@vger.kernel.org, libvir-list@redhat.com, kbastian@mail.uni-paderborn.de, anup.patel@wdc.com, yinyipeng1@huawei.com, Alistair Francis , Yifei Jiang , kvm-riscv@lists.infradead.org, palmer@dabbelt.com, dengkai1@huawei.com, wu.wubin@huawei.com, zhang.zhanghailiang@huawei.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add target/riscv/kvm.c to place kvm_arch_* function needed by kvm/kvm-all.c. Meanwhile, add kvm support in configure file. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin Reviewed-by: Alistair Francis --- configure | 1 + target/riscv/kvm.c | 128 +++++++++++++++++++++++++++++++++++++++ target/riscv/meson.build | 1 + 3 files changed, 130 insertions(+) create mode 100644 target/riscv/kvm.c diff --git a/configure b/configure index b8f5b81a67..f1fe4021d4 100755 --- a/configure +++ b/configure @@ -269,6 +269,7 @@ supported_kvm_target() { x86_64:i386 | x86_64:x86_64 | x86_64:x32 | \ mips:mips | mipsel:mips | mips64:mips | mips64el:mips | \ ppc:ppc | ppc64:ppc | ppc:ppc64 | ppc64:ppc64 | ppc64:ppc64le | \ + riscv32:riscv32 | riscv64:riscv64 | \ s390x:s390x) return 0 ;; diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c new file mode 100644 index 0000000000..8c386d9acf --- /dev/null +++ b/target/riscv/kvm.c @@ -0,0 +1,128 @@ +/* + * RISC-V implementation of KVM hooks + * + * Copyright (c) 2020 Huawei Technologies Co., Ltd + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ + +#include "qemu/osdep.h" +#include + +#include + +#include "qemu-common.h" +#include "qemu/timer.h" +#include "qemu/error-report.h" +#include "qemu/main-loop.h" +#include "sysemu/sysemu.h" +#include "sysemu/kvm.h" +#include "sysemu/kvm_int.h" +#include "cpu.h" +#include "trace.h" +#include "hw/pci/pci.h" +#include "exec/memattrs.h" +#include "exec/address-spaces.h" +#include "hw/boards.h" +#include "hw/irq.h" +#include "qemu/log.h" +#include "hw/loader.h" + +const KVMCapabilityInfo kvm_arch_required_capabilities[] = { + KVM_CAP_LAST_INFO +}; + +int kvm_arch_get_registers(CPUState *cs) +{ + return 0; +} + +int kvm_arch_put_registers(CPUState *cs, int level) +{ + return 0; +} + +int kvm_arch_release_virq_post(int virq) +{ + return 0; +} + +int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, + uint64_t address, uint32_t data, PCIDevice *dev) +{ + return 0; +} + +int kvm_arch_destroy_vcpu(CPUState *cs) +{ + return 0; +} + +unsigned long kvm_arch_vcpu_id(CPUState *cpu) +{ + return cpu->cpu_index; +} + +void kvm_arch_init_irq_routing(KVMState *s) +{ +} + +int kvm_arch_init_vcpu(CPUState *cs) +{ + return 0; +} + +int kvm_arch_msi_data_to_gsi(uint32_t data) +{ + abort(); +} + +int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, + int vector, PCIDevice *dev) +{ + return 0; +} + +int kvm_arch_init(MachineState *ms, KVMState *s) +{ + return 0; +} + +int kvm_arch_irqchip_create(KVMState *s) +{ + return 0; +} + +int kvm_arch_process_async_events(CPUState *cs) +{ + return 0; +} + +void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) +{ +} + +MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) +{ + return MEMTXATTRS_UNSPECIFIED; +} + +bool kvm_arch_stop_on_emulation_error(CPUState *cs) +{ + return true; +} + +int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) +{ + return 0; +} diff --git a/target/riscv/meson.build b/target/riscv/meson.build index abd647fea1..66d0dfd0c9 100644 --- a/target/riscv/meson.build +++ b/target/riscv/meson.build @@ -23,6 +23,7 @@ riscv_ss.add(files( 'vector_helper.c', 'translate.c', )) +riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c')) riscv_softmmu_ss = ss.source_set() riscv_softmmu_ss.add(files( From patchwork Thu Aug 27 09:21:28 2020 Content-Type: text/plain; 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Thu, 27 Aug 2020 17:22:29 +0800 From: Yifei Jiang To: , Subject: [PATCH RFC v3 05/14] arget/riscv: Implement kvm_arch_put_registers Date: Thu, 27 Aug 2020 17:21:28 +0800 Message-ID: <20200827092137.479-6-jiangyifei@huawei.com> X-Mailer: git-send-email 2.26.2.windows.1 In-Reply-To: <20200827092137.479-1-jiangyifei@huawei.com> References: <20200827092137.479-1-jiangyifei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.31] X-CFilter-Loop: Reflected Received-SPF: pass client-ip=45.249.212.35; envelope-from=jiangyifei@huawei.com; helo=huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/27 05:22:41 X-ACL-Warn: Detected OS = Linux 3.11 and newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: victor.zhangxiaofeng@huawei.com, sagark@eecs.berkeley.edu, kvm@vger.kernel.org, libvir-list@redhat.com, kbastian@mail.uni-paderborn.de, anup.patel@wdc.com, yinyipeng1@huawei.com, Alistair.Francis@wdc.com, Yifei Jiang , kvm-riscv@lists.infradead.org, palmer@dabbelt.com, dengkai1@huawei.com, wu.wubin@huawei.com, zhang.zhanghailiang@huawei.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Put GPR CSR and FP registers to kvm by KVM_SET_ONE_REG ioctl Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- target/riscv/kvm.c | 142 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 141 insertions(+), 1 deletion(-) diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index e91f505607..7afb4263e9 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -85,6 +85,31 @@ static int kvm_riscv_get_regs_core(CPUState *cs) return ret; } +static int kvm_riscv_put_regs_core(CPUState *cs) +{ + int ret = 0; + int i; + target_ulong reg; + CPURISCVState *env = &RISCV_CPU(cs)->env; + + reg = env->pc; + ret = kvm_set_one_reg(cs, RISCV_CORE_REG(regs.pc), ®); + if (ret) { + return ret; + } + + for (i = 1; i < 32; i++) { + __u64 id = kvm_riscv_reg_id(KVM_REG_RISCV_CORE, i); + reg = env->gpr[i]; + ret = kvm_set_one_reg(cs, id, ®); + if (ret) { + return ret; + } + } + + return ret; +} + static int kvm_riscv_get_regs_csr(CPUState *cs) { int ret = 0; @@ -148,6 +173,70 @@ static int kvm_riscv_get_regs_csr(CPUState *cs) return ret; } +static int kvm_riscv_put_regs_csr(CPUState *cs) +{ + int ret = 0; + target_ulong reg; + CPURISCVState *env = &RISCV_CPU(cs)->env; + + reg = env->mstatus; + ret = kvm_set_one_reg(cs, RISCV_CSR_REG(sstatus), ®); + if (ret) { + return ret; + } + + reg = env->mie; + ret = kvm_set_one_reg(cs, RISCV_CSR_REG(sie), ®); + if (ret) { + return ret; + } + + reg = env->stvec; + ret = kvm_set_one_reg(cs, RISCV_CSR_REG(stvec), ®); + if (ret) { + return ret; + } + + reg = env->sscratch; + ret = kvm_set_one_reg(cs, RISCV_CSR_REG(sscratch), ®); + if (ret) { + return ret; + } + + reg = env->sepc; + ret = kvm_set_one_reg(cs, RISCV_CSR_REG(sepc), ®); + if (ret) { + return ret; + } + + reg = env->scause; + ret = kvm_set_one_reg(cs, RISCV_CSR_REG(scause), ®); + if (ret) { + return ret; + } + + reg = env->sbadaddr; + ret = kvm_set_one_reg(cs, RISCV_CSR_REG(stval), ®); + if (ret) { + return ret; + } + + reg = env->mip; + ret = kvm_set_one_reg(cs, RISCV_CSR_REG(sip), ®); + if (ret) { + return ret; + } + + reg = env->satp; + ret = kvm_set_one_reg(cs, RISCV_CSR_REG(satp), ®); + if (ret) { + return ret; + } + + return ret; +} + + static int kvm_riscv_get_regs_fp(CPUState *cs) { int ret = 0; @@ -181,6 +270,40 @@ static int kvm_riscv_get_regs_fp(CPUState *cs) return ret; } +static int kvm_riscv_put_regs_fp(CPUState *cs) +{ + int ret = 0; + int i; + CPURISCVState *env = &RISCV_CPU(cs)->env; + + if (riscv_has_ext(env, RVD)) { + uint64_t reg; + for (i = 0; i < 32; i++) { + reg = env->fpr[i]; + ret = kvm_set_one_reg(cs, RISCV_FP_D_REG(i), ®); + if (ret) { + return ret; + } + } + return ret; + } + + if (riscv_has_ext(env, RVF)) { + uint32_t reg; + for (i = 0; i < 32; i++) { + reg = env->fpr[i]; + ret = kvm_set_one_reg(cs, RISCV_FP_F_REG(i), ®); + if (ret) { + return ret; + } + } + return ret; + } + + return ret; +} + + const KVMCapabilityInfo kvm_arch_required_capabilities[] = { KVM_CAP_LAST_INFO }; @@ -209,7 +332,24 @@ int kvm_arch_get_registers(CPUState *cs) int kvm_arch_put_registers(CPUState *cs, int level) { - return 0; + int ret = 0; + + ret = kvm_riscv_put_regs_core(cs); + if (ret) { + return ret; + } + + ret = kvm_riscv_put_regs_csr(cs); + if (ret) { + return ret; + } + + ret = kvm_riscv_put_regs_fp(cs); + if (ret) { + return ret; + } + + return ret; } int kvm_arch_release_virq_post(int virq) From patchwork Thu Aug 27 09:21:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiangyifei X-Patchwork-Id: 275437 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7FE4C433DF for ; Thu, 27 Aug 2020 09:30:28 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9D7EE20738 for ; Thu, 27 Aug 2020 09:30:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9D7EE20738 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:58412 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kBEEl-0000El-Ov for qemu-devel@archiver.kernel.org; Thu, 27 Aug 2020 05:30:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57066) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBE7P-0002nW-79; Thu, 27 Aug 2020 05:22:51 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:34552 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBE7L-0003GB-LB; Thu, 27 Aug 2020 05:22:50 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 0A16A5BD47C6198FEF0F; Thu, 27 Aug 2020 17:22:43 +0800 (CST) Received: from huawei.com (10.174.187.31) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Thu, 27 Aug 2020 17:22:32 +0800 From: Yifei Jiang To: , Subject: [PATCH RFC v3 08/14] target/riscv: Handler KVM_EXIT_RISCV_SBI exit Date: Thu, 27 Aug 2020 17:21:31 +0800 Message-ID: <20200827092137.479-9-jiangyifei@huawei.com> X-Mailer: git-send-email 2.26.2.windows.1 In-Reply-To: <20200827092137.479-1-jiangyifei@huawei.com> References: <20200827092137.479-1-jiangyifei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.31] X-CFilter-Loop: Reflected Received-SPF: pass client-ip=45.249.212.32; envelope-from=jiangyifei@huawei.com; helo=huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/27 02:28:14 X-ACL-Warn: Detected OS = Linux 3.11 and newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: victor.zhangxiaofeng@huawei.com, sagark@eecs.berkeley.edu, kvm@vger.kernel.org, libvir-list@redhat.com, kbastian@mail.uni-paderborn.de, anup.patel@wdc.com, yinyipeng1@huawei.com, Alistair.Francis@wdc.com, Yifei Jiang , kvm-riscv@lists.infradead.org, palmer@dabbelt.com, dengkai1@huawei.com, wu.wubin@huawei.com, zhang.zhanghailiang@huawei.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Use char-fe handler console sbi call, which implement early console io while apply 'earlycon=sbi' into kernel parameters. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- target/riscv/kvm.c | 42 ++++++++++++++++- target/riscv/sbi_ecall_interface.h | 72 ++++++++++++++++++++++++++++++ 2 files changed, 113 insertions(+), 1 deletion(-) create mode 100644 target/riscv/sbi_ecall_interface.h diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index d510d23da1..b49df6dd9c 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -38,6 +38,8 @@ #include "qemu/log.h" #include "hw/loader.h" #include "kvm_riscv.h" +#include "sbi_ecall_interface.h" +#include "chardev/char-fe.h" static __u64 kvm_riscv_reg_id(__u64 type, __u64 idx) { @@ -435,9 +437,47 @@ bool kvm_arch_stop_on_emulation_error(CPUState *cs) return true; } +static int kvm_riscv_handle_sbi(struct kvm_run *run) +{ + int ret = 0; + unsigned char ch; + switch (run->riscv_sbi.extension_id) { + case SBI_EXT_0_1_CONSOLE_PUTCHAR: + ch = run->riscv_sbi.args[0]; + qemu_chr_fe_write(serial_hd(0)->be, &ch, sizeof(ch)); + break; + case SBI_EXT_0_1_CONSOLE_GETCHAR: + ret = qemu_chr_fe_read_all(serial_hd(0)->be, &ch, sizeof(ch)); + if (ret == sizeof(ch)) { + run->riscv_sbi.args[0] = ch; + } else { + run->riscv_sbi.args[0] = -1; + } + break; + default: + qemu_log_mask(LOG_UNIMP, + "%s: un-handled SBI EXIT, specific reasons is %lu\n", + __func__, run->riscv_sbi.extension_id); + ret = -1; + break; + } + return ret; +} + int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) { - return 0; + int ret = 0; + switch (run->exit_reason) { + case KVM_EXIT_RISCV_SBI: + ret = kvm_riscv_handle_sbi(run); + break; + default: + qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n", + __func__, run->exit_reason); + ret = -1; + break; + } + return ret; } void kvm_riscv_reset_vcpu(RISCVCPU *cpu) diff --git a/target/riscv/sbi_ecall_interface.h b/target/riscv/sbi_ecall_interface.h new file mode 100644 index 0000000000..fb1a3fa8f2 --- /dev/null +++ b/target/riscv/sbi_ecall_interface.h @@ -0,0 +1,72 @@ +/* + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2019 Western Digital Corporation or its affiliates. + * + * Authors: + * Anup Patel + */ + +#ifndef __SBI_ECALL_INTERFACE_H__ +#define __SBI_ECALL_INTERFACE_H__ + +/* clang-format off */ + +/* SBI Extension IDs */ +#define SBI_EXT_0_1_SET_TIMER 0x0 +#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 +#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2 +#define SBI_EXT_0_1_CLEAR_IPI 0x3 +#define SBI_EXT_0_1_SEND_IPI 0x4 +#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5 +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6 +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7 +#define SBI_EXT_0_1_SHUTDOWN 0x8 +#define SBI_EXT_BASE 0x10 +#define SBI_EXT_TIME 0x54494D45 +#define SBI_EXT_IPI 0x735049 +#define SBI_EXT_RFENCE 0x52464E43 +#define SBI_EXT_HSM 0x48534D + +/* SBI function IDs for BASE extension*/ +#define SBI_EXT_BASE_GET_SPEC_VERSION 0x0 +#define SBI_EXT_BASE_GET_IMP_ID 0x1 +#define SBI_EXT_BASE_GET_IMP_VERSION 0x2 +#define SBI_EXT_BASE_PROBE_EXT 0x3 +#define SBI_EXT_BASE_GET_MVENDORID 0x4 +#define SBI_EXT_BASE_GET_MARCHID 0x5 +#define SBI_EXT_BASE_GET_MIMPID 0x6 + +/* SBI function IDs for TIME extension*/ +#define SBI_EXT_TIME_SET_TIMER 0x0 + +/* SBI function IDs for IPI extension*/ +#define SBI_EXT_IPI_SEND_IPI 0x0 + +/* SBI function IDs for RFENCE extension*/ +#define SBI_EXT_RFENCE_REMOTE_FENCE_I 0x0 +#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA 0x1 +#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID 0x2 +#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA 0x3 +#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID 0x4 +#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA 0x5 +#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID 0x6 + +/* SBI function IDs for HSM extension */ +#define SBI_EXT_HSM_HART_START 0x0 +#define SBI_EXT_HSM_HART_STOP 0x1 +#define SBI_EXT_HSM_HART_GET_STATUS 0x2 + +#define SBI_HSM_HART_STATUS_STARTED 0x0 +#define SBI_HSM_HART_STATUS_STOPPED 0x1 +#define SBI_HSM_HART_STATUS_START_PENDING 0x2 +#define SBI_HSM_HART_STATUS_STOP_PENDING 0x3 + +#define SBI_SPEC_VERSION_MAJOR_OFFSET 24 +#define SBI_SPEC_VERSION_MAJOR_MASK 0x7f +#define SBI_SPEC_VERSION_MINOR_MASK 0xffffff +#define SBI_EXT_VENDOR_START 0x09000000 +#define SBI_EXT_VENDOR_END 0x09FFFFFF +/* clang-format on */ + +#endif From patchwork Thu Aug 27 09:21:33 2020 Content-Type: text/plain; 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Thu, 27 Aug 2020 17:22:33 +0800 From: Yifei Jiang To: , Subject: [PATCH RFC v3 10/14] target/riscv: Add sifive_plic vmstate Date: Thu, 27 Aug 2020 17:21:33 +0800 Message-ID: <20200827092137.479-11-jiangyifei@huawei.com> X-Mailer: git-send-email 2.26.2.windows.1 In-Reply-To: <20200827092137.479-1-jiangyifei@huawei.com> References: <20200827092137.479-1-jiangyifei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.31] X-CFilter-Loop: Reflected Received-SPF: pass client-ip=45.249.212.190; envelope-from=jiangyifei@huawei.com; helo=huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/27 02:12:47 X-ACL-Warn: Detected OS = Linux 3.11 and newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: victor.zhangxiaofeng@huawei.com, sagark@eecs.berkeley.edu, kvm@vger.kernel.org, libvir-list@redhat.com, kbastian@mail.uni-paderborn.de, anup.patel@wdc.com, yinyipeng1@huawei.com, Alistair.Francis@wdc.com, Yifei Jiang , kvm-riscv@lists.infradead.org, palmer@dabbelt.com, dengkai1@huawei.com, wu.wubin@huawei.com, zhang.zhanghailiang@huawei.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add sifive_plic vmstate for supporting sifive_plic migration. Current vmstate framework only supports one structure parameter as num field to describe variable length arrays, so introduce num_enables. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- hw/riscv/sifive_plic.c | 24 +++++++++++++++++++++++- include/hw/riscv/sifive_plic.h | 1 + 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c index 9c5a131e0f..897dc289a0 100644 --- a/hw/riscv/sifive_plic.c +++ b/hw/riscv/sifive_plic.c @@ -32,6 +32,7 @@ #include "hw/riscv/sifive_plic.h" #include "sysemu/kvm.h" #include "kvm_riscv.h" +#include "migration/vmstate.h" #define RISCV_DEBUG_PLIC 0 @@ -460,11 +461,12 @@ static void sifive_plic_realize(DeviceState *dev, Error **errp) TYPE_SIFIVE_PLIC, plic->aperture_size); parse_hart_config(plic); plic->bitfield_words = (plic->num_sources + 31) >> 5; + plic->num_enables = plic->bitfield_words * plic->num_addrs; plic->source_priority = g_new0(uint32_t, plic->num_sources); plic->target_priority = g_new(uint32_t, plic->num_addrs); plic->pending = g_new0(uint32_t, plic->bitfield_words); plic->claimed = g_new0(uint32_t, plic->bitfield_words); - plic->enable = g_new0(uint32_t, plic->bitfield_words * plic->num_addrs); + plic->enable = g_new0(uint32_t, plic->num_enables); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &plic->mmio); qdev_init_gpio_in(dev, sifive_plic_irq_request, plic->num_sources); @@ -484,12 +486,32 @@ static void sifive_plic_realize(DeviceState *dev, Error **errp) msi_nonbroken = true; } +static const VMStateDescription vmstate_sifive_plic = { + .name = "riscv_sifive_plic", + .version_id = 1, + .minimum_version_id = 1, + .fields = (VMStateField[]) { + VMSTATE_VARRAY_UINT32(source_priority, SiFivePLICState, num_sources, 0, + vmstate_info_uint32, uint32_t), + VMSTATE_VARRAY_UINT32(target_priority, SiFivePLICState, num_addrs, 0, + vmstate_info_uint32, uint32_t), + VMSTATE_VARRAY_UINT32(pending, SiFivePLICState, bitfield_words, 0, + vmstate_info_uint32, uint32_t), + VMSTATE_VARRAY_UINT32(claimed, SiFivePLICState, bitfield_words, 0, + vmstate_info_uint32, uint32_t), + VMSTATE_VARRAY_UINT32(enable, SiFivePLICState, num_enables, 0, + vmstate_info_uint32, uint32_t), + VMSTATE_END_OF_LIST() + } +}; + static void sifive_plic_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); device_class_set_props(dc, sifive_plic_properties); dc->realize = sifive_plic_realize; + dc->vmsd = &vmstate_sifive_plic; } static const TypeInfo sifive_plic_info = { diff --git a/include/hw/riscv/sifive_plic.h b/include/hw/riscv/sifive_plic.h index 4421e81249..130df0cf1c 100644 --- a/include/hw/riscv/sifive_plic.h +++ b/include/hw/riscv/sifive_plic.h @@ -49,6 +49,7 @@ typedef struct SiFivePLICState { MemoryRegion mmio; uint32_t num_addrs; uint32_t bitfield_words; + uint32_t num_enables; PLICAddr *addr_config; uint32_t *source_priority; uint32_t *target_priority; From patchwork Thu Aug 27 09:21:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiangyifei X-Patchwork-Id: 275439 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2C74C433DF for ; Thu, 27 Aug 2020 09:28:17 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B86422075B for ; Thu, 27 Aug 2020 09:28:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B86422075B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:48858 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kBECe-0004o3-TH for qemu-devel@archiver.kernel.org; Thu, 27 Aug 2020 05:28:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57084) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBE7R-0002tB-6Q; Thu, 27 Aug 2020 05:22:53 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:34554 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBE7M-0003G9-Ac; Thu, 27 Aug 2020 05:22:52 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id D8300F5FA69D5CDAF46A; Thu, 27 Aug 2020 17:22:42 +0800 (CST) Received: from huawei.com (10.174.187.31) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Thu, 27 Aug 2020 17:22:35 +0800 From: Yifei Jiang To: , Subject: [PATCH RFC v3 12/14] target/riscv: Add kvm_riscv_get/put_regs_timer Date: Thu, 27 Aug 2020 17:21:35 +0800 Message-ID: <20200827092137.479-13-jiangyifei@huawei.com> X-Mailer: git-send-email 2.26.2.windows.1 In-Reply-To: <20200827092137.479-1-jiangyifei@huawei.com> References: <20200827092137.479-1-jiangyifei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.31] X-CFilter-Loop: Reflected Received-SPF: pass client-ip=45.249.212.32; envelope-from=jiangyifei@huawei.com; helo=huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/27 02:28:14 X-ACL-Warn: Detected OS = Linux 3.11 and newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: victor.zhangxiaofeng@huawei.com, sagark@eecs.berkeley.edu, kvm@vger.kernel.org, libvir-list@redhat.com, kbastian@mail.uni-paderborn.de, anup.patel@wdc.com, yinyipeng1@huawei.com, Alistair.Francis@wdc.com, Yifei Jiang , kvm-riscv@lists.infradead.org, palmer@dabbelt.com, dengkai1@huawei.com, wu.wubin@huawei.com, zhang.zhanghailiang@huawei.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Add kvm_riscv_get/put_regs_timer to synchronize virtual time context from KVM. The frequency of virtual time is not supported by KVM_SET_ONE_REG, So it's useless to synchronize the frequency of virtual time. To set register of RISCV_TIMER_REG(state) will occur a error from KVM on kvm_timer_state == 0. It's better to adapt in KVM, but it doesn't matter that adaping in QEMU. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- target/riscv/cpu.h | 6 ++++ target/riscv/kvm.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 78 insertions(+) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 7795e7ae13..b735258f27 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -233,6 +233,12 @@ struct CPURISCVState { hwaddr kernel_addr; hwaddr fdt_addr; + + /* kvm timer */ + bool kvm_timer_dirty; + uint64_t kvm_timer_time; + uint64_t kvm_timer_compare; + uint64_t kvm_timer_state; }; #define RISCV_CPU_CLASS(klass) \ diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index b49df6dd9c..59c537b1cb 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -59,6 +59,9 @@ static __u64 kvm_riscv_reg_id(__u64 type, __u64 idx) #define RISCV_CSR_REG(name) kvm_riscv_reg_id(KVM_REG_RISCV_CSR, \ KVM_REG_RISCV_CSR_REG(name)) +#define RISCV_TIMER_REG(name) kvm_riscv_reg_id(KVM_REG_RISCV_TIMER, \ + KVM_REG_RISCV_TIMER_REG(name)) + #define RISCV_FP_F_REG(idx) kvm_riscv_reg_id(KVM_REG_RISCV_FP_F, idx) #define RISCV_FP_D_REG(idx) kvm_riscv_reg_id(KVM_REG_RISCV_FP_D, idx) @@ -306,6 +309,75 @@ static int kvm_riscv_put_regs_fp(CPUState *cs) return ret; } +static void kvm_riscv_get_regs_timer(CPUState *cs) +{ + int ret; + uint64_t reg; + CPURISCVState *env = &RISCV_CPU(cs)->env; + + if (env->kvm_timer_dirty) { + return; + } + + ret = kvm_get_one_reg(cs, RISCV_TIMER_REG(time), ®); + if (ret) { + abort(); + } + env->kvm_timer_time = reg; + + ret = kvm_get_one_reg(cs, RISCV_TIMER_REG(compare), ®); + if (ret) { + abort(); + } + env->kvm_timer_compare = reg; + + ret = kvm_get_one_reg(cs, RISCV_TIMER_REG(state), ®); + if (ret) { + abort(); + } + env->kvm_timer_state = reg; + + env->kvm_timer_dirty = true; +} + +static void kvm_riscv_put_regs_timer(CPUState *cs) +{ + int ret; + uint64_t reg; + CPURISCVState *env = &RISCV_CPU(cs)->env; + + if (!env->kvm_timer_dirty) { + return; + } + + reg = env->kvm_timer_time; + ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(time), ®); + if (ret) { + abort(); + } + + reg = env->kvm_timer_compare; + ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(compare), ®); + if (ret) { + abort(); + } + + /* + * To set register of RISCV_TIMER_REG(state) will occur a error from KVM + * on env->kvm_timer_state == 0, It's better to adapt in KVM, but it + * doesn't matter that adaping in QEMU now. + * TODO If KVM changes, adapt here. + */ + if (env->kvm_timer_state) { + reg = env->kvm_timer_state; + ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(state), ®); + if (ret) { + abort(); + } + } + + env->kvm_timer_dirty = false; +} const KVMCapabilityInfo kvm_arch_required_capabilities[] = { KVM_CAP_LAST_INFO From patchwork Thu Aug 27 09:21:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiangyifei X-Patchwork-Id: 275441 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAB7CC433E3 for ; Thu, 27 Aug 2020 09:25:50 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A39B82075B for ; Thu, 27 Aug 2020 09:25:50 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A39B82075B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:36278 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kBEAH-0008Ap-Q9 for qemu-devel@archiver.kernel.org; Thu, 27 Aug 2020 05:25:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57046) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBE7O-0002lN-Iy; Thu, 27 Aug 2020 05:22:50 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:4660 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kBE7L-0003G4-Fc; Thu, 27 Aug 2020 05:22:50 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id A2193869D6D927573166; Thu, 27 Aug 2020 17:22:42 +0800 (CST) Received: from huawei.com (10.174.187.31) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Thu, 27 Aug 2020 17:22:35 +0800 From: Yifei Jiang To: , Subject: [PATCH RFC v3 13/14] target/riscv: Implement virtual time adjusting with vm state changing Date: Thu, 27 Aug 2020 17:21:36 +0800 Message-ID: <20200827092137.479-14-jiangyifei@huawei.com> X-Mailer: git-send-email 2.26.2.windows.1 In-Reply-To: <20200827092137.479-1-jiangyifei@huawei.com> References: <20200827092137.479-1-jiangyifei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.187.31] X-CFilter-Loop: Reflected Received-SPF: pass client-ip=45.249.212.190; envelope-from=jiangyifei@huawei.com; helo=huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/27 02:12:47 X-ACL-Warn: Detected OS = Linux 3.11 and newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: victor.zhangxiaofeng@huawei.com, sagark@eecs.berkeley.edu, kvm@vger.kernel.org, libvir-list@redhat.com, kbastian@mail.uni-paderborn.de, anup.patel@wdc.com, yinyipeng1@huawei.com, Alistair.Francis@wdc.com, Yifei Jiang , kvm-riscv@lists.infradead.org, palmer@dabbelt.com, dengkai1@huawei.com, wu.wubin@huawei.com, zhang.zhanghailiang@huawei.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" We hope that virtual time adjusts with vm state changing. When a vm is stopped, guest virtual time should stop counting and kvm_timer should be stopped. When the vm is resumed, guest virtual time should continue to count and kvm_timer should be restored. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- target/riscv/kvm.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index 59c537b1cb..943d733539 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -40,6 +40,7 @@ #include "kvm_riscv.h" #include "sbi_ecall_interface.h" #include "chardev/char-fe.h" +#include "sysemu/runstate.h" static __u64 kvm_riscv_reg_id(__u64 type, __u64 idx) { @@ -448,6 +449,17 @@ unsigned long kvm_arch_vcpu_id(CPUState *cpu) return cpu->cpu_index; } +static void kvm_riscv_vm_state_change(void *opaque, int running, RunState state) +{ + CPUState *cs = opaque; + + if (running) { + kvm_riscv_put_regs_timer(cs); + } else { + kvm_riscv_get_regs_timer(cs); + } +} + void kvm_arch_init_irq_routing(KVMState *s) { } @@ -459,6 +471,8 @@ int kvm_arch_init_vcpu(CPUState *cs) RISCVCPU *cpu = RISCV_CPU(cs); __u64 id; + qemu_add_vm_change_state_handler(kvm_riscv_vm_state_change, cs); + id = kvm_riscv_reg_id(KVM_REG_RISCV_CONFIG, KVM_REG_RISCV_CONFIG_REG(isa)); ret = kvm_get_one_reg(cs, id, &isa); if (ret) {