From patchwork Mon Feb 27 18:02:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 94561 Delivered-To: patch@linaro.org Received: by 10.140.20.113 with SMTP id 104csp976475qgi; Mon, 27 Feb 2017 10:03:13 -0800 (PST) X-Received: by 10.200.52.52 with SMTP id u49mr16111663qtb.101.1488218593536; Mon, 27 Feb 2017 10:03:13 -0800 (PST) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id m20si12386756qta.241.2017.02.27.10.03.13; Mon, 27 Feb 2017 10:03:13 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 148D863621; Mon, 27 Feb 2017 18:03:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id E9717635FD; Mon, 27 Feb 2017 18:02:54 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 63C2E60C9D; Mon, 27 Feb 2017 18:02:52 +0000 (UTC) Received: from mail-wr0-f177.google.com (mail-wr0-f177.google.com [209.85.128.177]) by lists.linaro.org (Postfix) with ESMTPS id 5760C60AF6 for ; Mon, 27 Feb 2017 18:02:51 +0000 (UTC) Received: by mail-wr0-f177.google.com with SMTP id g10so57734084wrg.2 for ; Mon, 27 Feb 2017 10:02:51 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cq1HaAZzE75b0bEjjdiY+kkiVPuJsMaqDqoCHutjMe4=; b=q8H0du1/LSO3RGEZWrpast0M9DbjDUMjvKUs0G5fjVIEU5etDsRDiRerntK8m1uS0Q yr+K85VPWgoJXoxCy/ITLZNaoKZEfMhNHARjhYj9Rok1hX7IhskYaHFeRZAqYbutYzAg oCad2qoH+fzqeHQPbwiDikRMz9E15nIyitKO7zRUHwtGjSVu1/mVqSj1cU+UD2dnHzwx 7vFX2WHLr98q7NiDB60TS/mpgFsGUpWVtarBVL6DUWzUcRguP+BgA3/4SUlvB0Ea+q+H RLAgjfJv74IuHyHAorho3vMwTqADuhST0+oe05MfiC+tPXrfsSXLdHbgccjiKdDwQNT/ FLVg== X-Gm-Message-State: AMke39kPZJUof0HjMnDrCUBx2a62xjSUwoFkYnWFg9dv5audtsxza4V95PG/sd5GBuIZIZhksQY= X-Received: by 10.223.175.15 with SMTP id z15mr12444487wrc.84.1488218570467; Mon, 27 Feb 2017 10:02:50 -0800 (PST) Received: from localhost.localdomain ([105.149.201.216]) by smtp.gmail.com with ESMTPSA id v72sm12668569wmd.0.2017.02.27.10.02.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Feb 2017 10:02:49 -0800 (PST) From: Ard Biesheuvel To: linaro-uefi@lists.linaro.org, leif.lindholm@linaro.org, alan@softiron.co.uk Date: Mon, 27 Feb 2017 18:02:29 +0000 Message-Id: <1488218551-6372-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488218551-6372-1-git-send-email-ard.biesheuvel@linaro.org> References: <1488218551-6372-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [Linaro-uefi] [PATCH 1/3] Platforms/AMD/Styx/PlatformSmbiosDxe: don't write to string literals X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Remove the code from PlatformSmbiosDxe that writes to a string literal to turn the string 'L# Cache' into L1/L2/L3, and just emit the three versions instead. This is necessary given that string literals are emitted into .rodata by default, which makes them read-only when strict memory permissions are in effect. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 21 ++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c index 5ee5d92fdf9c..14e3cc409dbc 100644 --- a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c +++ b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c @@ -355,8 +355,16 @@ SMBIOS_TABLE_TYPE7 mCacheInfoType7 = { CacheAssociativity2Way // Associativity }; #if (FixedPcdGetBool (PcdIscpSupport)) -CHAR8 *mCacheInfoType7Strings[] = { - "L# Cache", +CHAR8 *mCacheInfoType7StringsL1[] = { + "L1 Cache", + NULL +}; +CHAR8 *mCacheInfoType7StringsL2[] = { + "L2 Cache", + NULL +}; +CHAR8 *mCacheInfoType7StringsL3[] = { + "L3 Cache", NULL }; #else @@ -710,7 +718,6 @@ CacheInfoUpdateSmbiosType7 ( dstType7.SocketDesignation = 1; // "L# Cache" // L1 cache settings - mCacheInfoType7Strings[0][1] = '1'; // "L# Cache" --> "L1 Cache" SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L1[0]; dstType7.CacheConfiguration = SmbiosT7->T7CacheCfg; dstType7.MaximumCacheSize = SmbiosT7->T7MaxCacheSize; @@ -723,10 +730,9 @@ CacheInfoUpdateSmbiosType7 ( dstType7.ErrorCorrectionType = SmbiosT7->T7ErrorCorrectionType; dstType7.SystemCacheType = SmbiosT7->T7SystemCacheType; dstType7.Associativity = SmbiosT7->T7Associativity; - LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7Strings); + LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7StringsL1); // L2 cache settings - mCacheInfoType7Strings[0][1] = '2'; // "L# Cache" --> "L2 Cache" SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L2[0]; dstType7.CacheConfiguration = SmbiosT7->T7CacheCfg; dstType7.MaximumCacheSize = SmbiosT7->T7MaxCacheSize; @@ -739,10 +745,9 @@ CacheInfoUpdateSmbiosType7 ( dstType7.ErrorCorrectionType = SmbiosT7->T7ErrorCorrectionType; dstType7.SystemCacheType = SmbiosT7->T7SystemCacheType; dstType7.Associativity = SmbiosT7->T7Associativity; - LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7Strings); + LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7StringsL2); // L3 cache settings - mCacheInfoType7Strings[0][1] = '3'; // "L# Cache" --> "L3 Cache" SmbiosT7 = &mSmbiosInfo.SmbiosCpuBuffer.T7L3[0]; dstType7.CacheConfiguration = SmbiosT7->T7CacheCfg; dstType7.MaximumCacheSize = SmbiosT7->T7MaxCacheSize; @@ -755,7 +760,7 @@ CacheInfoUpdateSmbiosType7 ( dstType7.ErrorCorrectionType = SmbiosT7->T7ErrorCorrectionType; dstType7.SystemCacheType = SmbiosT7->T7SystemCacheType; dstType7.Associativity = SmbiosT7->T7Associativity; - LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7Strings); + LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&dstType7, mCacheInfoType7StringsL3); #else LogSmbiosData ((EFI_SMBIOS_TABLE_HEADER *)&mCacheInfoType7, mCacheInfoType7Strings); #endif From patchwork Mon Feb 27 18:02:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 94562 Delivered-To: patch@linaro.org Received: by 10.140.20.113 with SMTP id 104csp976704qgi; Mon, 27 Feb 2017 10:03:46 -0800 (PST) X-Received: by 10.55.89.196 with SMTP id n187mr16461154qkb.17.1488218625822; Mon, 27 Feb 2017 10:03:45 -0800 (PST) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id e5si12383368qtc.219.2017.02.27.10.03.45; Mon, 27 Feb 2017 10:03:45 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 5699460C9D; Mon, 27 Feb 2017 18:03:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id C08A563608; Mon, 27 Feb 2017 18:03:05 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id E727763609; Mon, 27 Feb 2017 18:02:59 +0000 (UTC) Received: from mail-wr0-f179.google.com (mail-wr0-f179.google.com [209.85.128.179]) by lists.linaro.org (Postfix) with ESMTPS id 4FB7F60AF6 for ; Mon, 27 Feb 2017 18:02:53 +0000 (UTC) Received: by mail-wr0-f179.google.com with SMTP id l37so13710833wrc.1 for ; Mon, 27 Feb 2017 10:02:53 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9ovdmZAYoMYim+s/6M32e87Af1yWUFV5ySi1WSe8JjE=; b=s9aVf3HO8D2Yj7kpvV4mXNNhhnX4HyfdhRCYwwuOyiS+Is0OhmWYwixayboysgZvnZ k78YbI23rue0uip03RGFiI78jDtht1XPzc+4hnm50236NJ5HpqU+QkU5JlTOakhFilP9 wEZxRh9/is88Jn9oEsIfGkJbqi2Hjn7br7HnVKOkxoldWHXZ5+fPQEz+By3JDPsoH5tU JgEFcXsNIGWg82ZDgNnw9/l17JvbH4dNFbherciKT0G7tCuWmSAHosk6REfB6avvaf0b p8q9xSl74o5ROGKHanOj/S1ay58/MFgnYKU87mZQ3FjhwCrfcQC187Ngc51pE8In6zJZ 4aOA== X-Gm-Message-State: AMke39mGD1bpFpeYyIH8o+IjehRB7iWpYn4k0Q8JMyTG7jU0UoOWs6guB6tVekif2ThFafrhuM0= X-Received: by 10.223.182.133 with SMTP id j5mr6575888wre.19.1488218572285; Mon, 27 Feb 2017 10:02:52 -0800 (PST) Received: from localhost.localdomain ([105.149.201.216]) by smtp.gmail.com with ESMTPSA id v72sm12668569wmd.0.2017.02.27.10.02.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Feb 2017 10:02:51 -0800 (PST) From: Ard Biesheuvel To: linaro-uefi@lists.linaro.org, leif.lindholm@linaro.org, alan@softiron.co.uk Date: Mon, 27 Feb 2017 18:02:30 +0000 Message-Id: <1488218551-6372-3-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488218551-6372-1-git-send-email-ard.biesheuvel@linaro.org> References: <1488218551-6372-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [Linaro-uefi] [PATCH 2/3] Platforms/AMD/Styx: constify/staticize all local functions and variables X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Now that we've made a clean spot, let's clean up this module by making everything we can STATIC and/or CONST. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c | 72 ++++++++++++-------- 1 file changed, 42 insertions(+), 30 deletions(-) diff --git a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c index 14e3cc409dbc..51616b2d5f11 100644 --- a/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c +++ b/Platforms/AMD/Styx/Drivers/PlatformSmbiosDxe/PlatformSmbiosDxe.c @@ -57,15 +57,15 @@ extern EFI_BOOT_SERVICES *gBS; * G L O B A L S *---------------------------------------------------------------------------------------- */ -EFI_SMBIOS_PROTOCOL *mSmbiosProtocol; -AMD_ISCP_DXE_PROTOCOL *mIscpDxeProtocol; -ISCP_SMBIOS_INFO mSmbiosInfo; +STATIC EFI_SMBIOS_PROTOCOL *mSmbiosProtocol; +STATIC AMD_ISCP_DXE_PROTOCOL *mIscpDxeProtocol; +STATIC ISCP_SMBIOS_INFO mSmbiosInfo; /*********************************************************************** SMBIOS data definition TYPE0 BIOS Information ************************************************************************/ -SMBIOS_TABLE_TYPE0 mBIOSInfoType0 = { +STATIC CONST SMBIOS_TABLE_TYPE0 mBIOSInfoType0 = { { EFI_SMBIOS_TYPE_BIOS_INFORMATION, sizeof (SMBIOS_TABLE_TYPE0), 0 }, 1, // Vendor String 2, // BiosVersion String @@ -130,7 +130,7 @@ SMBIOS_TABLE_TYPE0 mBIOSInfoType0 = { 0xFF, // EmbeddedControllerFirmwareMinorRelease }; -CHAR8 *mBIOSInfoType0Strings[] = { +STATIC CHAR8 CONST * CONST mBIOSInfoType0Strings[] = { "edk2.sourceforge.net", // Vendor String __TIME__, // BiosVersion String __DATE__, // BiosReleaseDate String @@ -140,7 +140,7 @@ CHAR8 *mBIOSInfoType0Strings[] = { /*********************************************************************** SMBIOS data definition TYPE1 System Information ************************************************************************/ -SMBIOS_TABLE_TYPE1 mSysInfoType1 = { +STATIC CONST SMBIOS_TABLE_TYPE1 mSysInfoType1 = { { EFI_SMBIOS_TYPE_SYSTEM_INFORMATION, sizeof (SMBIOS_TABLE_TYPE1), 0 }, 1, // Manufacturer String 2, // ProductName String @@ -151,7 +151,7 @@ SMBIOS_TABLE_TYPE1 mSysInfoType1 = { 5, // SKUNumber String 6, // Family String }; -CHAR8 *mSysInfoType1Strings[] = { +STATIC CHAR8 CONST * CONST mSysInfoType1Strings[] = { "AMD", "Seattle", "1.0", @@ -164,7 +164,7 @@ CHAR8 *mSysInfoType1Strings[] = { /*********************************************************************** SMBIOS data definition TYPE2 Board Information ************************************************************************/ -SMBIOS_TABLE_TYPE2 mBoardInfoType2 = { +STATIC CONST SMBIOS_TABLE_TYPE2 mBoardInfoType2 = { { EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, sizeof (SMBIOS_TABLE_TYPE2), 0 }, 1, // Manufacturer String 2, // ProductName String @@ -185,7 +185,7 @@ SMBIOS_TABLE_TYPE2 mBoardInfoType2 = { 0, // NumberOfContainedObjectHandles; { 0 } // ContainedObjectHandles[1]; }; -CHAR8 *mBoardInfoType2Strings[] = { +STATIC CHAR8 CONST * CONST mBoardInfoType2Strings[] = { "AMD", "Seattle", "1.0", @@ -198,7 +198,7 @@ CHAR8 *mBoardInfoType2Strings[] = { /*********************************************************************** SMBIOS data definition TYPE3 Enclosure Information ************************************************************************/ -SMBIOS_TABLE_TYPE3 mEnclosureInfoType3 = { +STATIC CONST SMBIOS_TABLE_TYPE3 mEnclosureInfoType3 = { { EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, sizeof (SMBIOS_TABLE_TYPE3), 0 }, 1, // Manufacturer String MiscChassisTypeLapTop, // Type; @@ -216,7 +216,7 @@ SMBIOS_TABLE_TYPE3 mEnclosureInfoType3 = { 0, // ContainedElementRecordLength; { { 0 } }, // ContainedElements[1]; }; -CHAR8 *mEnclosureInfoType3Strings[] = { +STATIC CHAR8 CONST * CONST mEnclosureInfoType3Strings[] = { "AMD", "1.0", "Chassis Board Serial#", @@ -227,7 +227,7 @@ CHAR8 *mEnclosureInfoType3Strings[] = { /*********************************************************************** SMBIOS data definition TYPE4 Processor Information ************************************************************************/ -SMBIOS_TABLE_TYPE4 mProcessorInfoType4 = { +STATIC SMBIOS_TABLE_TYPE4 mProcessorInfoType4 = { { EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, sizeof (SMBIOS_TABLE_TYPE4), 0}, 1, // Socket String ProcessorOther, // ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA. @@ -306,7 +306,7 @@ SMBIOS_TABLE_TYPE4 mProcessorInfoType4 = { ProcessorFamilyARM, // ARM Processor Family; }; -CHAR8 *mProcessorInfoType4Strings[] = { +STATIC CHAR8 CONST * CONST mProcessorInfoType4Strings[] = { "Socket", "ARM", #ifdef ARM_CPU_AARCH64 @@ -323,7 +323,7 @@ CHAR8 *mProcessorInfoType4Strings[] = { /*********************************************************************** SMBIOS data definition TYPE7 Cache Information ************************************************************************/ -SMBIOS_TABLE_TYPE7 mCacheInfoType7 = { +STATIC SMBIOS_TABLE_TYPE7 mCacheInfoType7 = { { EFI_SMBIOS_TYPE_CACHE_INFORMATION, sizeof (SMBIOS_TABLE_TYPE7), 0 }, 1, // SocketDesignation String 0x018A, // Cache Configuration @@ -355,20 +355,20 @@ SMBIOS_TABLE_TYPE7 mCacheInfoType7 = { CacheAssociativity2Way // Associativity }; #if (FixedPcdGetBool (PcdIscpSupport)) -CHAR8 *mCacheInfoType7StringsL1[] = { +STATIC CHAR8 CONST * CONST mCacheInfoType7StringsL1[] = { "L1 Cache", NULL }; -CHAR8 *mCacheInfoType7StringsL2[] = { +STATIC CHAR8 CONST * CONST mCacheInfoType7StringsL2[] = { "L2 Cache", NULL }; -CHAR8 *mCacheInfoType7StringsL3[] = { +STATIC CHAR8 CONST * CONST mCacheInfoType7StringsL3[] = { "L3 Cache", NULL }; #else -CHAR8 *mCacheInfoType7Strings[] = { +STATIC CHAR8 CONST * CONST mCacheInfoType7Strings[] = { "Cache1", NULL }; @@ -377,7 +377,7 @@ CHAR8 *mCacheInfoType7Strings[] = { /*********************************************************************** SMBIOS data definition TYPE9 System Slot Information ************************************************************************/ -SMBIOS_TABLE_TYPE9 mSysSlotInfoType9 = { +STATIC CONST SMBIOS_TABLE_TYPE9 mSysSlotInfoType9 = { { EFI_SMBIOS_TYPE_SYSTEM_SLOTS, sizeof (SMBIOS_TABLE_TYPE9), 0 }, 1, // SlotDesignation String SlotTypeOther, // SlotType; ///< The enumeration value from MISC_SLOT_TYPE. @@ -405,7 +405,7 @@ SMBIOS_TABLE_TYPE9 mSysSlotInfoType9 = { 0, // BusNum; 0, // DevFuncNum; }; -CHAR8 *mSysSlotInfoType9Strings[] = { +STATIC CHAR8 CONST * CONST mSysSlotInfoType9Strings[] = { "SD Card", NULL }; @@ -413,7 +413,7 @@ CHAR8 *mSysSlotInfoType9Strings[] = { /*********************************************************************** SMBIOS data definition TYPE16 Physical Memory ArrayInformation ************************************************************************/ -SMBIOS_TABLE_TYPE16 mPhyMemArrayInfoType16 = { +STATIC SMBIOS_TABLE_TYPE16 mPhyMemArrayInfoType16 = { { EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, sizeof (SMBIOS_TABLE_TYPE16), 0 }, MemoryArrayLocationSystemBoard, // Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION. MemoryArrayUseSystemMemory, // Use; ///< The enumeration value from MEMORY_ARRAY_USE. @@ -423,14 +423,14 @@ SMBIOS_TABLE_TYPE16 mPhyMemArrayInfoType16 = { 1, // NumberOfMemoryDevices; 0x3fffffffffffffffULL, // ExtendedMaximumCapacity; }; -CHAR8 *mPhyMemArrayInfoType16Strings[] = { +STATIC CHAR8 CONST * CONST mPhyMemArrayInfoType16Strings[] = { NULL }; /*********************************************************************** SMBIOS data definition TYPE17 Memory Device Information ************************************************************************/ -SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = { +STATIC SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = { { EFI_SMBIOS_TYPE_MEMORY_DEVICE, sizeof (SMBIOS_TABLE_TYPE17), 0 }, 0, // MemoryArrayHandle; 0xFFFE, // MemoryErrorInformationHandle; @@ -471,9 +471,9 @@ SMBIOS_TABLE_TYPE17 mMemDevInfoType17 = { }; #if (FixedPcdGetBool (PcdIscpSupport)) -CHAR8 *mMemDevInfoType17Strings[ 7 ] = {0}; +STATIC CHAR8 CONST *mMemDevInfoType17Strings[ 7 ] = {0}; #else -CHAR8 *mMemDevInfoType17Strings[] = { +STATIC CHAR8 CONST * CONST mMemDevInfoType17Strings[] = { "OS Virtual Memory", "malloc", "OSV", @@ -484,7 +484,7 @@ CHAR8 *mMemDevInfoType17Strings[] = { /*********************************************************************** SMBIOS data definition TYPE19 Memory Array Mapped Address Information ************************************************************************/ -SMBIOS_TABLE_TYPE19 mMemArrMapInfoType19 = { +STATIC SMBIOS_TABLE_TYPE19 mMemArrMapInfoType19 = { { EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, sizeof (SMBIOS_TABLE_TYPE19), 0 }, 0x80000000, // StartingAddress; 0xbfffffff, // EndingAddress; @@ -493,20 +493,20 @@ SMBIOS_TABLE_TYPE19 mMemArrMapInfoType19 = { 0, // ExtendedStartingAddress; 0, // ExtendedEndingAddress; }; -CHAR8 *mMemArrMapInfoType19Strings[] = { +STATIC CHAR8 CONST * CONST mMemArrMapInfoType19Strings[] = { NULL }; /*********************************************************************** SMBIOS data definition TYPE32 Boot Information ************************************************************************/ -SMBIOS_TABLE_TYPE32 mBootInfoType32 = { +STATIC CONST SMBIOS_TABLE_TYPE32 mBootInfoType32 = { { EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, sizeof (SMBIOS_TABLE_TYPE32), 0 }, { 0, 0, 0, 0, 0, 0 }, // Reserved[6]; BootInformationStatusNoError // BootStatus }; -CHAR8 *mBootInfoType32Strings[] = { +STATIC CHAR8 CONST * CONST mBootInfoType32Strings[] = { NULL }; @@ -541,11 +541,12 @@ CHAR8 *mBootInfoType32Strings[] = { NULL is OK. **/ +STATIC EFI_STATUS EFIAPI LogSmbiosData ( IN EFI_SMBIOS_TABLE_HEADER *Template, - IN CHAR8 **StringPack + IN CONST CHAR8* CONST *StringPack ) { EFI_STATUS Status; @@ -608,6 +609,7 @@ LogSmbiosData ( /*********************************************************************** SMBIOS data update TYPE0 BIOS Information ************************************************************************/ +STATIC VOID BIOSInfoUpdateSmbiosType0 ( VOID @@ -619,6 +621,7 @@ BIOSInfoUpdateSmbiosType0 ( /*********************************************************************** SMBIOS data update TYPE1 System Information ************************************************************************/ +STATIC VOID SysInfoUpdateSmbiosType1 ( VOID @@ -630,6 +633,7 @@ SysInfoUpdateSmbiosType1 ( /*********************************************************************** SMBIOS data update TYPE2 Board Information ************************************************************************/ +STATIC VOID BoardInfoUpdateSmbiosType2 ( VOID @@ -641,6 +645,7 @@ BoardInfoUpdateSmbiosType2 ( /*********************************************************************** SMBIOS data update TYPE3 Enclosure Information ************************************************************************/ +STATIC VOID EnclosureInfoUpdateSmbiosType3 ( VOID @@ -652,6 +657,7 @@ EnclosureInfoUpdateSmbiosType3 ( /*********************************************************************** SMBIOS data update TYPE4 Processor Information ************************************************************************/ +STATIC VOID ProcessorInfoUpdateSmbiosType4 ( VOID @@ -703,6 +709,7 @@ ProcessorInfoUpdateSmbiosType4 ( /*********************************************************************** SMBIOS data update TYPE7 Cache Information ************************************************************************/ +STATIC VOID CacheInfoUpdateSmbiosType7 ( VOID @@ -769,6 +776,7 @@ CacheInfoUpdateSmbiosType7 ( /*********************************************************************** SMBIOS data update TYPE9 System Slot Information ************************************************************************/ +STATIC VOID SysSlotInfoUpdateSmbiosType9 ( VOID @@ -780,6 +788,7 @@ SysSlotInfoUpdateSmbiosType9 ( /*********************************************************************** SMBIOS data update TYPE16 Physical Memory Array Information ************************************************************************/ +STATIC VOID PhyMemArrayInfoUpdateSmbiosType16 ( VOID @@ -802,6 +811,7 @@ PhyMemArrayInfoUpdateSmbiosType16 ( /*********************************************************************** SMBIOS data update TYPE17 Memory Device Information ************************************************************************/ +STATIC VOID MemDevInfoUpdatedstType17 ( VOID @@ -884,6 +894,7 @@ MemDevInfoUpdatedstType17 ( /*********************************************************************** SMBIOS data update TYPE19 Memory Array Map Information ************************************************************************/ +STATIC VOID MemArrMapInfoUpdateSmbiosType19 ( VOID @@ -909,6 +920,7 @@ MemArrMapInfoUpdateSmbiosType19 ( /*********************************************************************** SMBIOS data update TYPE32 Boot Information ************************************************************************/ +STATIC VOID BootInfoUpdateSmbiosType32 ( VOID From patchwork Mon Feb 27 18:02:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 94563 Delivered-To: patch@linaro.org Received: by 10.140.20.113 with SMTP id 104csp976922qgi; Mon, 27 Feb 2017 10:04:17 -0800 (PST) X-Received: by 10.237.50.133 with SMTP id z5mr11285032qtd.203.1488218657113; Mon, 27 Feb 2017 10:04:17 -0800 (PST) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id m9si12376602qte.315.2017.02.27.10.04.16; Mon, 27 Feb 2017 10:04:17 -0800 (PST) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 27B8960BDF; Mon, 27 Feb 2017 18:04:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 1076D63601; Mon, 27 Feb 2017 18:03:34 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 8ED3C635E8; Mon, 27 Feb 2017 18:03:25 +0000 (UTC) Received: from mail-wr0-f179.google.com (mail-wr0-f179.google.com [209.85.128.179]) by lists.linaro.org (Postfix) with ESMTPS id 7A14963603 for ; Mon, 27 Feb 2017 18:02:55 +0000 (UTC) Received: by mail-wr0-f179.google.com with SMTP id u108so27839505wrb.3 for ; Mon, 27 Feb 2017 10:02:55 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=eZl13IcSpt1O7hde4937XViLdu+MLSJBWlLl0OG8lik=; b=kgPHR3b4hdVOtKG0KvdjiR7x48fyZPN5Qv+RDaUUmjQoUAQogls14vuV/xegCydUxR 7H1sZd7nf7Vd4SQg4krHgK/e1/yiR0tKwr98gpFojtBs7pSCoPkp6c/0J7R5zkSKDKjH bpHpljTVNv6mJ2UiDYY/8awGkwIM9hfYLnsZUmMerkrqYeq6hGn/lKnVjR2PRl5sCkyk GDcMhaVF32Y11/trPWmMWlJCcrgnFzil4JtzNwQS4ItO7Dx1KzMunCWZK/QIqRMMX+Fe dIFQNI+997PTd0ets17pp3jGwnXqnC3citQSBGB1iV7Y64gu+W/n8yRcObH+P5cUStji aUPQ== X-Gm-Message-State: AMke39khxfF8ALSuTKpezQs9GF00OBnWNlpwzIek9PhT3PGFvk+dhhf41PKwDMFpFl4Y3IcUHCA= X-Received: by 10.223.134.253 with SMTP id 58mr17913166wry.46.1488218574296; Mon, 27 Feb 2017 10:02:54 -0800 (PST) Received: from localhost.localdomain ([105.149.201.216]) by smtp.gmail.com with ESMTPSA id v72sm12668569wmd.0.2017.02.27.10.02.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Feb 2017 10:02:53 -0800 (PST) From: Ard Biesheuvel To: linaro-uefi@lists.linaro.org, leif.lindholm@linaro.org, alan@softiron.co.uk Date: Mon, 27 Feb 2017 18:02:31 +0000 Message-Id: <1488218551-6372-4-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488218551-6372-1-git-send-email-ard.biesheuvel@linaro.org> References: <1488218551-6372-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [Linaro-uefi] [PATCH 3/3] Platforms/AMD/Styx: enable strict memory permission policy X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Implement a strict separation between writable and executable memory, by enabling the new core features that - map PE/COFF code and data sections with either executable or writable permissions, but never both; - map all other regions with the XN attributes set. Note that the former requires 4 KB section alignment, which is not the default when using the tiny code model, so set the section alignment explicitly both for DEBUG and RELEASE builds. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index a236836db691..03ca1ffae2e5 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -273,6 +273,9 @@ DEFINE DO_KCS = 1 [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER] GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x10000 +[BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION] + GCC:*_*_AARCH64_DLINK_FLAGS = -z common-page-size=0x1000 + ################################################################################ # # Pcd Section - list of all EDK II PCD Entries defined by this Platform @@ -440,6 +443,18 @@ DEFINE DO_KCS = 1 ## ACPI (no tables < 4GB) gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20 + # + # Enable strict image permissions for all images. (This applies + # only to images that were built with >= 4 KB section alignment.) + # + gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy|0x3 + + # + # Enable NX memory protection for all non-code regions, including OEM and OS + # reserved ones. + # + gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy|0xC000000000007FD5 + !if $(DO_PSCI) gAmdStyxTokenSpaceGuid.PcdPsciOsSupport|TRUE !else