From patchwork Mon Oct 19 12:42:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 285585 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F626C43467 for ; Mon, 19 Oct 2020 12:43:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EED32222B8 for ; Mon, 19 Oct 2020 12:43:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727137AbgJSMnF (ORCPT ); Mon, 19 Oct 2020 08:43:05 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:6248 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726336AbgJSMnF (ORCPT ); Mon, 19 Oct 2020 08:43:05 -0400 X-IronPort-AV: E=Sophos;i="5.77,394,1596466800"; d="scan'208";a="60189671" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 19 Oct 2020 21:43:04 +0900 Received: from localhost.localdomain (unknown [172.29.53.218]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 09DE442DFC85; Mon, 19 Oct 2020 21:43:02 +0900 (JST) From: Biju Das To: Linus Walleij Cc: Biju Das , Geert Uytterhoeven , linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Chris Paterson , Biju Das , Prabhakar Mahadev Lad Subject: [PATCH 1/6] pinctrl: renesas: r8a77951: Optimize pinctrl image size for R8A774E1 Date: Mon, 19 Oct 2020 13:42:53 +0100 Message-Id: <20201019124258.4574-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201019124258.4574-1-biju.das.jz@bp.renesas.com> References: <20201019124258.4574-1-biju.das.jz@bp.renesas.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This driver supports both RZ/G2H and R-Car H3(R8A77951) SoC's. Optimize pinctrl image size for RZ/G2H, when R-Car H3(R8A77951) SoC is disabled in the defconfig. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/renesas/pfc-r8a77951.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/renesas/pfc-r8a77951.c b/drivers/pinctrl/renesas/pfc-r8a77951.c index a94ebe0bf5d0..c4011c57453d 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77951.c +++ b/drivers/pinctrl/renesas/pfc-r8a77951.c @@ -1827,6 +1827,7 @@ static const unsigned int canfd1_data_mux[] = { CANFD1_TX_MARK, CANFD1_RX_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_R8A77951 /* - DRIF0 --------------------------------------------------------------- */ static const unsigned int drif0_ctrl_a_pins[] = { /* CLK, SYNC */ @@ -2041,6 +2042,7 @@ static const unsigned int drif3_data1_b_pins[] = { static const unsigned int drif3_data1_b_mux[] = { RIF3_D1_B_MARK, }; +#endif /* - DU --------------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { @@ -4159,7 +4161,9 @@ static const unsigned int vin5_clk_mux[] = { static const struct { struct sh_pfc_pin_group common[320]; +#ifdef CONFIG_PINCTRL_PFC_R8A77951 struct sh_pfc_pin_group automotive[30]; +#endif } pinmux_groups = { .common = { SH_PFC_PIN_GROUP(audio_clk_a_a), @@ -4483,6 +4487,7 @@ static const struct { SH_PFC_PIN_GROUP(vin5_clkenb), SH_PFC_PIN_GROUP(vin5_clk), }, +#ifdef CONFIG_PINCTRL_PFC_R8A77951 .automotive = { SH_PFC_PIN_GROUP(drif0_ctrl_a), SH_PFC_PIN_GROUP(drif0_data0_a), @@ -4515,7 +4520,7 @@ static const struct { SH_PFC_PIN_GROUP(drif3_data0_b), SH_PFC_PIN_GROUP(drif3_data1_b), } - +#endif }; static const char * const audio_clk_groups[] = { @@ -4574,6 +4579,7 @@ static const char * const canfd1_groups[] = { "canfd1_data", }; +#ifdef CONFIG_PINCTRL_PFC_R8A77951 static const char * const drif0_groups[] = { "drif0_ctrl_a", "drif0_data0_a", @@ -4615,6 +4621,7 @@ static const char * const drif3_groups[] = { "drif3_data0_b", "drif3_data1_b", }; +#endif static const char * const du_groups[] = { "du_rgb666", @@ -5041,7 +5048,9 @@ static const char * const vin5_groups[] = { static const struct { struct sh_pfc_function common[53]; +#ifdef CONFIG_PINCTRL_PFC_R8A77951 struct sh_pfc_function automotive[4]; +#endif } pinmux_functions = { .common = { SH_PFC_FUNCTION(audio_clk), @@ -5098,13 +5107,14 @@ static const struct { SH_PFC_FUNCTION(vin4), SH_PFC_FUNCTION(vin5), }, +#ifdef CONFIG_PINCTRL_PFC_R8A77951 .automotive = { SH_PFC_FUNCTION(drif0), SH_PFC_FUNCTION(drif1), SH_PFC_FUNCTION(drif2), SH_PFC_FUNCTION(drif3), } - +#endif }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { From patchwork Mon Oct 19 12:42:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 285584 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2ACDC433DF for ; Mon, 19 Oct 2020 12:43:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 69278222BA for ; Mon, 19 Oct 2020 12:43:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727297AbgJSMnL (ORCPT ); Mon, 19 Oct 2020 08:43:11 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:43001 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726336AbgJSMnK (ORCPT ); Mon, 19 Oct 2020 08:43:10 -0400 X-IronPort-AV: E=Sophos;i="5.77,394,1596466800"; d="scan'208";a="59974415" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 19 Oct 2020 21:43:09 +0900 Received: from localhost.localdomain (unknown [172.29.53.218]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 8ECEE42DFC82; Mon, 19 Oct 2020 21:43:07 +0900 (JST) From: Biju Das To: Linus Walleij Cc: Biju Das , Geert Uytterhoeven , linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Chris Paterson , Biju Das , Prabhakar Mahadev Lad Subject: [PATCH 3/6] pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1 Date: Mon, 19 Oct 2020 13:42:55 +0100 Message-Id: <20201019124258.4574-4-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201019124258.4574-1-biju.das.jz@bp.renesas.com> References: <20201019124258.4574-1-biju.das.jz@bp.renesas.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This driver supports both RZ/G2N and R-Car M3-N(R8A77965) SoC's. Optimize pinctrl image size for RZ/G2N, when R-Car M3-N(R8A77965) SoC is disabled in the defconfig. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/renesas/pfc-r8a77965.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c index 7a50b9b69a7d..85fce3dae7a5 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77965.c +++ b/drivers/pinctrl/renesas/pfc-r8a77965.c @@ -1847,6 +1847,7 @@ static const unsigned int canfd1_data_mux[] = { CANFD1_TX_MARK, CANFD1_RX_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_R8A77965 /* - DRIF0 --------------------------------------------------------------- */ static const unsigned int drif0_ctrl_a_pins[] = { /* CLK, SYNC */ @@ -2120,6 +2121,7 @@ static const unsigned int drif3_data1_b_pins[] = { static const unsigned int drif3_data1_b_mux[] = { RIF3_D1_B_MARK, }; +#endif /* - DU --------------------------------------------------------------------- */ static const unsigned int du_rgb666_pins[] = { @@ -4380,7 +4382,9 @@ static const unsigned int vin5_clk_mux[] = { static const struct { struct sh_pfc_pin_group common[318]; +#ifdef CONFIG_PINCTRL_PFC_R8A77965 struct sh_pfc_pin_group automotive[30]; +#endif } pinmux_groups = { .common = { SH_PFC_PIN_GROUP(audio_clk_a_a), @@ -4702,6 +4706,7 @@ static const struct { SH_PFC_PIN_GROUP(vin5_clkenb), SH_PFC_PIN_GROUP(vin5_clk), }, +#ifdef CONFIG_PINCTRL_PFC_R8A77965 .automotive = { SH_PFC_PIN_GROUP(drif0_ctrl_a), SH_PFC_PIN_GROUP(drif0_data0_a), @@ -4734,6 +4739,7 @@ static const struct { SH_PFC_PIN_GROUP(drif3_data0_b), SH_PFC_PIN_GROUP(drif3_data1_b), } +#endif }; static const char * const audio_clk_groups[] = { @@ -4792,6 +4798,7 @@ static const char * const canfd1_groups[] = { "canfd1_data", }; +#ifdef CONFIG_PINCTRL_PFC_R8A77965 static const char * const drif0_groups[] = { "drif0_ctrl_a", "drif0_data0_a", @@ -4833,6 +4840,7 @@ static const char * const drif3_groups[] = { "drif3_data0_b", "drif3_data1_b", }; +#endif static const char * const du_groups[] = { "du_rgb666", @@ -5250,7 +5258,9 @@ static const char * const vin5_groups[] = { static const struct { struct sh_pfc_function common[51]; +#ifdef CONFIG_PINCTRL_PFC_R8A77965 struct sh_pfc_function automotive[4]; +#endif } pinmux_functions = { .common = { SH_PFC_FUNCTION(audio_clk), @@ -5305,12 +5315,14 @@ static const struct { SH_PFC_FUNCTION(vin4), SH_PFC_FUNCTION(vin5), }, +#ifdef CONFIG_PINCTRL_PFC_R8A77965 .automotive = { SH_PFC_FUNCTION(drif0), SH_PFC_FUNCTION(drif1), SH_PFC_FUNCTION(drif2), SH_PFC_FUNCTION(drif3), } +#endif }; static const struct pinmux_cfg_reg pinmux_config_regs[] = { From patchwork Mon Oct 19 12:42:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 285583 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8EE9FC433E7 for ; Mon, 19 Oct 2020 12:43:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4B88322283 for ; Mon, 19 Oct 2020 12:43:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727332AbgJSMnP (ORCPT ); Mon, 19 Oct 2020 08:43:15 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:43001 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726336AbgJSMnO (ORCPT ); Mon, 19 Oct 2020 08:43:14 -0400 X-IronPort-AV: E=Sophos;i="5.77,394,1596466800"; d="scan'208";a="59974426" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 19 Oct 2020 21:43:13 +0900 Received: from localhost.localdomain (unknown [172.29.53.218]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 29E2542DFC88; Mon, 19 Oct 2020 21:43:11 +0900 (JST) From: Biju Das To: Linus Walleij Cc: Biju Das , Geert Uytterhoeven , linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Chris Paterson , Biju Das , Prabhakar Mahadev Lad Subject: [PATCH 5/6] pinctrl: renesas: r8a7790: Optimize pinctrl image size for R8A7742 Date: Mon, 19 Oct 2020 13:42:57 +0100 Message-Id: <20201019124258.4574-6-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201019124258.4574-1-biju.das.jz@bp.renesas.com> References: <20201019124258.4574-1-biju.das.jz@bp.renesas.com> Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This driver supports both RZ/G1H and R-Car H2(R8A7790) SoC's. Optimize pinctrl image size for RZ/G1H, when R-Car H2(R8A7790) SoC is disabled in the shmobile_defconfig. Signed-off-by: Biju Das Reviewed-by: Geert Uytterhoeven --- drivers/pinctrl/renesas/pfc-r8a7790.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/pinctrl/renesas/pfc-r8a7790.c b/drivers/pinctrl/renesas/pfc-r8a7790.c index 3f48d3d879f7..8943ca695ff0 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7790.c +++ b/drivers/pinctrl/renesas/pfc-r8a7790.c @@ -2393,6 +2393,7 @@ static const unsigned int intc_irq3_pins[] = { static const unsigned int intc_irq3_mux[] = { IRQ3_MARK, }; +#ifdef CONFIG_PINCTRL_PFC_R8A7790 /* - MLB+ ------------------------------------------------------------------- */ static const unsigned int mlb_3pin_pins[] = { RCAR_GP_PIN(4, 0), RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2), @@ -2400,6 +2401,7 @@ static const unsigned int mlb_3pin_pins[] = { static const unsigned int mlb_3pin_mux[] = { MLB_CLK_MARK, MLB_SIG_MARK, MLB_DAT_MARK, }; +#endif /* - MMCIF0 ----------------------------------------------------------------- */ static const unsigned int mmc0_data1_pins[] = { /* D[0] */ @@ -4131,7 +4133,9 @@ static const unsigned int vin3_clk_mux[] = { static const struct { struct sh_pfc_pin_group common[311]; +#ifdef CONFIG_PINCTRL_PFC_R8A7790 struct sh_pfc_pin_group automotive[1]; +#endif } pinmux_groups = { .common = { SH_PFC_PIN_GROUP(audio_clk_a), @@ -4446,9 +4450,11 @@ static const struct { SH_PFC_PIN_GROUP(vin3_clkenb), SH_PFC_PIN_GROUP(vin3_clk), }, +#ifdef CONFIG_PINCTRL_PFC_R8A7790 .automotive = { SH_PFC_PIN_GROUP(mlb_3pin), } +#endif }; static const char * const audio_clk_groups[] = { @@ -4592,9 +4598,11 @@ static const char * const intc_groups[] = { "intc_irq3", }; +#ifdef CONFIG_PINCTRL_PFC_R8A7790 static const char * const mlb_groups[] = { "mlb_3pin", }; +#endif static const char * const mmc0_groups[] = { "mmc0_data1", @@ -4942,7 +4950,9 @@ static const char * const vin3_groups[] = { static const struct { struct sh_pfc_function common[58]; +#ifdef CONFIG_PINCTRL_PFC_R8A7790 struct sh_pfc_function automotive[1]; +#endif } pinmux_functions = { .common = { SH_PFC_FUNCTION(audio_clk), @@ -5004,9 +5014,11 @@ static const struct { SH_PFC_FUNCTION(vin2), SH_PFC_FUNCTION(vin3), }, +#ifdef CONFIG_PINCTRL_PFC_R8A7790 .automotive = { SH_PFC_FUNCTION(mlb), } +#endif }; static const struct pinmux_cfg_reg pinmux_config_regs[] = {