From patchwork Fri Nov 24 15:25:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 119590 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp2374803qgn; Fri, 24 Nov 2017 07:27:26 -0800 (PST) X-Google-Smtp-Source: AGs4zMZ2WUISk67UdSb5lTp53a9O23mZbsP8ClRn7RW9SOh17YWmOm5IUZHdKhsqny56tgD4EYhv X-Received: by 10.80.151.125 with SMTP id d58mr38819711edb.236.1511537246339; Fri, 24 Nov 2017 07:27:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511537246; cv=none; d=google.com; s=arc-20160816; b=vyOmKP3/cIYYSOjfXFsHO3207OZibHyFGTpngdavSOy5D+iqP+P+dr3zv/X2dPr1P4 7nMP2ybyYRD90QAIiBhqp9aGX5ay2KfZKlHhc7YTQsu6E2fdIGLKzS716aDqSUv/s9hs fi45cI1U+8j8Xd+Ggi8GPQIjIrhZ3fB2tR3e1uAxzWMP4jgBsNH98DnvFprAm4i/gBiD i2G22CP910xrUmJlruKXp0zKi17Y53/kjJ9XAn47ZH6KGaH42Y5b05wzfK4c9ydVQUJN 0ud78p/qllnaZmzHQXTSDPAQUjSln6Gd7DIcv4AcdDEVEAjQ8ATqdSQTkYgznVOXXppy ppfA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=+R4gyHmBHyu6mBb2ydCxxTdFH3zNRh84In/apIWj2fw=; b=0JBQUF2tKCC4xxL0t+POU/TQfT3gkoQtX9g1B1LdLMQ/2Vl16shh9R823Uc1pZPv7o eq6UHVmV+xwGL6wXM1z8ARoS7ox0lti4KGlzMBw7kcRrhBR3aZcBZWVHpUrbW05G7DUI VC2/qhP8nujP3w/QbA7rAkIJXc1ulhKcAGb4n9GoHJjFQZCNs6LyGoPT25lFICAJJ/W4 fFQYqCphCJmCHkt7G9N8hSfIHX4TVkxpAqmDfkyfZFN7joxCDHgzm/i2LJdhF3ctM8U8 BxxRquuLyM6Za5uWT8MS/729nP9tEHpij+tuOC5EbxGLM5kYic3SMCpD9Yn0Xnu5nIyb x09Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=aOakG3ZH; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id o3si519857edd.300.2017.11.24.07.27.26; Fri, 24 Nov 2017 07:27:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=aOakG3ZH; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id E19D7C21E42; Fri, 24 Nov 2017 15:26:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id BE294C21DFA; Fri, 24 Nov 2017 15:26:57 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 779B8C21E08; Fri, 24 Nov 2017 15:25:53 +0000 (UTC) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by lists.denx.de (Postfix) with ESMTPS id 08753C21E24 for ; Fri, 24 Nov 2017 15:25:52 +0000 (UTC) Received: from grover.sesame (FL1-125-199-20-195.osk.mesh.ad.jp [125.199.20.195]) (authenticated) by conuserg-11.nifty.com with ESMTP id vAOFPbJk011993; Sat, 25 Nov 2017 00:25:38 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com vAOFPbJk011993 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1511537138; bh=bl5UAmpwEVh/p/AUZ0Rmh5kZNc7cLbYORdhNTGQZ2pQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aOakG3ZHDaiWyZdPanmyXfhH8kyBvedhGoNRnO+DvSGKKFdpcEv//UWT95dNwBA8d 7yW7tNQnOJQ4LBGfOzd0IMeNsjK34QzCvK53+Vzg2GRdw0nX5JqK5rdz18rypU5wPh +rbNYDlD4MuGzP5DKsv0WZ8g/Wpv3B2wY892xqBXAgMs6jkzDounyWGtyu52cvY5Qg f6dVM+zPlxiI4tRd2Nv6+P48RlZhWlTViJ27nwjGoSCCMwWxQjkP02oVSfLDBPMxz4 mAynM0eOQAY5p84Y8GZJiwSIuxtRPU/yWe2HBuvAk9jx8P4fQTrAGRQPlATWSYZP/W rTHdTXBQ2BD5A== X-Nifty-SrcIP: [125.199.20.195] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 25 Nov 2017 00:25:31 +0900 Message-Id: <1511537135-26482-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511537135-26482-1-git-send-email-yamada.masahiro@socionext.com> References: <1511537135-26482-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 1/5] ARM: uniphier: set CONFIG_LOGLEVEL to 6 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Print out KERN_NOTICE or higher level log messages. Signed-off-by: Masahiro Yamada --- configs/uniphier_ld4_sld8_defconfig | 1 + configs/uniphier_v7_defconfig | 1 + configs/uniphier_v8_defconfig | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 3a991d7..542cebd 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -9,6 +9,7 @@ CONFIG_ARCH_UNIPHIER_LD4_SLD8=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_LOGLEVEL=6 CONFIG_SPL=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index b4b54c0..9082ba5 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_NAND_SUPPORT=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_LOGLEVEL=6 CONFIG_SPL=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index bc4bbbf..746e451 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -7,6 +7,7 @@ CONFIG_ARCH_UNIPHIER_V8_MULTI=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref" # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_LOGLEVEL=6 CONFIG_HUSH_PARSER=y CONFIG_CMD_CONFIG=y CONFIG_CMD_IMLS=y From patchwork Fri Nov 24 15:25:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 119593 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp2377418qgn; Fri, 24 Nov 2017 07:29:50 -0800 (PST) X-Google-Smtp-Source: AGs4zMa1RXs9YnUIeXpgqHvvn/DlOERgFCgWJSZQJsH/myiP8RSpySOxeHKJMc56NhS4KesEnjEb X-Received: by 10.80.134.18 with SMTP id o18mr39660651edo.306.1511537390641; Fri, 24 Nov 2017 07:29:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511537390; cv=none; d=google.com; s=arc-20160816; b=GPb/Gg2KcPz3HmpecILZVNWifgHSkXFIZAOzxzPuhLO55Rs4o5+oEw9cokr0VruKfn Ewb2dyDw5F/e/cQMOy2x3v86vhcpxnmuaXAXnDUEc2PXPizIyd3Qx1odP9FzZylkYBLG TLBvEwDQEFQVWrJdzdccRrkSnDSjxMEHJa9yfR86hXl/34ZYJgsdBtX8OtUig5vqK2tg pyr944159rMKAPJTFjiqauy+AWaVGOLlk6OJ9XjBe/6dQ467S4Exby9qjaoD1vohwEgj Gc2MuoQhnUml6tqwRhVgMTHesRJtmX/VjFTZCAwZ2bxUhbc1tDNgU5BKsp17ZyT28pvy TEfg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=PEUYf+YD8M8cu7wc2xOSMC4Saaa3N48ooWdW+ZaqReQ=; b=BCyG1/4SLrnPVGEO8NK6T9aUkKF3f57tFXuaCTJLk9YNUv/YXpXdfKBF59Qao6MIL+ NWC2LFL/3VUO9bgUoq5zT2VksK3AqiGBfd6X6Fi/V3Zsx/jasIfSJulspv8YUY3DdJsQ cYThj3CNUNS1zrmkzevmKGZkr9Yvvw2ji4xz6B5ODP0FNxGOLz2j68/azmIjxqG5qQlx pQySdqduRwgzGsXcqBecxMIeSKkTQAgGXDP7L8rmFH6OIjHdJ7BfpC3umhypmYN6HYHq zgH2g9P5WEighsh5uaL4hPgjh5/r9YZ897KHZYs+uQVJu98psQMPlQs8Cb6IBLYfjEDu YiOw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=ILePPLXr; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id n17si890018eda.409.2017.11.24.07.29.50; Fri, 24 Nov 2017 07:29:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=ILePPLXr; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 3C238C21E42; Fri, 24 Nov 2017 15:27:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 15C44C21E33; Fri, 24 Nov 2017 15:27:13 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 23991C21E22; Fri, 24 Nov 2017 15:25:53 +0000 (UTC) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by lists.denx.de (Postfix) with ESMTPS id E6655C21E1E for ; Fri, 24 Nov 2017 15:25:52 +0000 (UTC) Received: from grover.sesame (FL1-125-199-20-195.osk.mesh.ad.jp [125.199.20.195]) (authenticated) by conuserg-11.nifty.com with ESMTP id vAOFPbJl011993; Sat, 25 Nov 2017 00:25:38 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com vAOFPbJl011993 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1511537139; bh=v+Y6knRmJ9DTTgbF+/cyISX8UqyEkhns2RzylhW6GpA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ILePPLXrJLOnBySARLlzT+PL4b4CfvGgPja6owBqbXBmxHUZuK5V/nnbIJIIs1OuM aLN6kjggGhZWgXmew0VlsPw/huZtzysecgIaTQddbY/L41emSJe+78bBVm4HzqZR2o 0exksyA3mJoxwTgQ6s4K/+XXUg5Hi1zwsY4ORjvPFvYfrs8FJ9GoZCP9WoOTdeHAXt s13uhfQzudnR/QUqV42TerUE0ztrN98QI9k0S6gqDBaZ7rFHWJFGDKC/dXJrFF0olG NpsICCBFb6CzoViz+bY4ZlU+g9AzPT9EzgDXq0vqR0y92yyXheyQK2tCQyUQIRiH79 yyGtE5QrSnt6g== X-Nifty-SrcIP: [125.199.20.195] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 25 Nov 2017 00:25:32 +0900 Message-Id: <1511537135-26482-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511537135-26482-1-git-send-email-yamada.masahiro@socionext.com> References: <1511537135-26482-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 2/5] ARM: uniphier: remove IRQ settings X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This work-around has been here in U-Boot because the AIDET and GPIO drivers were missing in the upstream Linux. Both are now available in Linus' tree: - drivers/irqchip/irq-uniphier-aidet.c - drivers/gpio/gpio-uniphier.c Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_init.c | 35 ----------------------------------- 1 file changed, 35 deletions(-) diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index a6ee22e..28784ea 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -17,37 +17,6 @@ DECLARE_GLOBAL_DATA_PTR; -static void uniphier_setup_xirq(void) -{ - const void *fdt = gd->fdt_blob; - int soc_node, aidet_node; - const fdt32_t *val; - unsigned long aidet_base; - u32 tmp; - - soc_node = fdt_path_offset(fdt, "/soc"); - if (soc_node < 0) - return; - - aidet_node = fdt_subnode_offset_namelen(fdt, soc_node, "aidet", 5); - if (aidet_node < 0) - return; - - val = fdt_getprop(fdt, aidet_node, "reg", NULL); - if (!val) - return; - - aidet_base = fdt32_to_cpu(*val); - - tmp = readl(aidet_base + 8); /* AIDET DETCONFR2 */ - tmp |= 0x00ff0000; /* Set XIRQ0-7 low active */ - writel(tmp, aidet_base + 8); - - tmp = readl(0x55000090); /* IRQCTL */ - tmp |= 0x000000ff; - writel(tmp, 0x55000090); -} - #ifdef CONFIG_ARCH_UNIPHIER_LD11 static void uniphier_ld11_misc_init(void) { @@ -192,10 +161,6 @@ int board_init(void) led_puts("U3"); - uniphier_setup_xirq(); - - led_puts("U4"); - support_card_late_init(); led_puts("Uboo"); From patchwork Fri Nov 24 15:25:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 119591 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp2375148qgn; Fri, 24 Nov 2017 07:27:46 -0800 (PST) X-Google-Smtp-Source: AGs4zMaooWRN32IhJAz+GXpXmzs2nGWtOKqsOsFwJTwkML4pAa13idsVclU9kpHYp9vDyHFTmOlz X-Received: by 10.80.153.210 with SMTP id n18mr4949179edb.281.1511537266032; Fri, 24 Nov 2017 07:27:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511537266; cv=none; d=google.com; s=arc-20160816; b=Z8Hwpjt7s8uJVoxX4r8TJbpmGlyVMdPZ9fz7rnnKQ2ToL6J5p1uPeDW/VscWv3e8WP KwDXQjZdtsg71m58D/WSdO4gBgJA1OOGjjuN45t7en/PifAXuGcKLi7aGChwn/zbNQcv PZWKc28ui4+SgXtBUn4sJtJJrorlANHaorgu8EPPqUlMGyuOtrCfWqtPyM7corRDBXe4 bSGydC+lPIOwyCyl3f6/WJlot+uz9JovuLcTnCazPnchwZSsG8wrcKI9AhsurQsmRoUz ydtOkIVTdbleqEszxWtrl1ZcIXK9r9n+D+BNSFdW5yDOyTZ2HDYczleyK58cs+PmDSfQ sRzQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=GUW7kfbrz+XQq3eH306dTu/MdObPJfFJMKQalTINbUI=; b=JhtJiQuFEeiIdce31g+0WR2lpYJtJOpy8kxhXfcnvWmyYz9JkPyqluAwElQN5GQ/Vq oA3OHDDiBnP1yrYtuGo7/cTJp6/Nl5dCUS9+qcc4kjAmw3H+PSybi8yaIUyy1iYWYGb1 +K5X25l2FUna8dCzIG0bxeou85yxsphigoGvpa1KY9DoON2r5/Ctl3+xBzoHzJWVLwf4 AeLox60tiO1FSpzzzzqHYNCkurT95b4iW35ZewhUlHe3rsvNMhyCs0uywBcBTT4q3a83 bcwBAnK9OrqzCDqW2Y+fpxAlhxf6V9oXgH/MP4Urg6JgxgvKyCBHTZblMBRyg34/HkR8 G/rA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=W26EA3it; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id l63si9630722ede.122.2017.11.24.07.27.45; Fri, 24 Nov 2017 07:27:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=W26EA3it; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by lists.denx.de (Postfix, from userid 105) id 9970DC21DE4; Fri, 24 Nov 2017 15:27:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C7ADFC21DDE; Fri, 24 Nov 2017 15:27:06 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C574AC21DB2; Fri, 24 Nov 2017 15:25:53 +0000 (UTC) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by lists.denx.de (Postfix) with ESMTPS id 2C5C4C21E3B for ; Fri, 24 Nov 2017 15:25:52 +0000 (UTC) Received: from grover.sesame (FL1-125-199-20-195.osk.mesh.ad.jp [125.199.20.195]) (authenticated) by conuserg-11.nifty.com with ESMTP id vAOFPbJm011993; Sat, 25 Nov 2017 00:25:39 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com vAOFPbJm011993 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1511537139; bh=nb3+c3B/xCtH6YM39g/Xotv4X2b0NMsl5S9btpMZjck=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=W26EA3itdiZAr4aeGL1HZhYKSx36K5BmULXRAPh6zV3PnPIvssOkVZHN1606ezH1x oqiJclX+p9RyaEOgUQYu9rD93w4QyU+qneeHd+faxTqsLRp+Ml89KU66Bg8A35hqVq wu+LHp3G9fooGy/fzYy2yt4XIv0lEX+pL/p6JSu6P8IK/HqCTLgg3kLOtOHe+xz8eF XOn2vLMGrAqcr4gr+RyMgtmELU72+S/322o05XRZTxBgx/SnPljOTHIfHHUmLpbd7H Vok7VZPHsjgcVibcDypiIH8F6+ier+KP09sVWWKe0sqrr+6p+hCQyuoofKIzoEw3nm ygoSI3b3I6oKA== X-Nifty-SrcIP: [125.199.20.195] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 25 Nov 2017 00:25:33 +0900 Message-Id: <1511537135-26482-4-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511537135-26482-1-git-send-email-yamada.masahiro@socionext.com> References: <1511537135-26482-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 3/5] ARM: uniphier: remove XIRQ pin settings X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The XIRQ pins are now set up on the Linux side by the GPIO hogging. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/board_init.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/arch/arm/mach-uniphier/board_init.c b/arch/arm/mach-uniphier/board_init.c index 28784ea..121b786 100644 --- a/arch/arm/mach-uniphier/board_init.c +++ b/arch/arm/mach-uniphier/board_init.c @@ -17,24 +17,9 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_ARCH_UNIPHIER_LD11 -static void uniphier_ld11_misc_init(void) -{ - sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */ - sg_set_iectrl(149); - sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */ - sg_set_iectrl(153); -} -#endif - #ifdef CONFIG_ARCH_UNIPHIER_LD20 static void uniphier_ld20_misc_init(void) { - sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */ - sg_set_iectrl(149); - sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */ - sg_set_iectrl(153); - /* ES1 errata: increase VDD09 supply to suppress VBO noise */ if (uniphier_get_soc_revision() == 1) { writel(0x00000003, 0x6184e004); @@ -105,7 +90,6 @@ static const struct uniphier_initdata uniphier_initdata[] = { .sbc_init = uniphier_ld11_sbc_init, .pll_init = uniphier_ld11_pll_init, .clk_init = uniphier_ld11_clk_init, - .misc_init = uniphier_ld11_misc_init, }, #endif #if defined(CONFIG_ARCH_UNIPHIER_LD20) From patchwork Fri Nov 24 15:25:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 119592 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp2376874qgn; Fri, 24 Nov 2017 07:29:18 -0800 (PST) X-Google-Smtp-Source: AGs4zMbTo94A+1v/zLBqtrjvx7wC2Uq7JCOhzJwOdGwxdi56NoPP9huLYuOodAnLV2/Hlprm22Xy X-Received: by 10.80.147.93 with SMTP id n29mr39079071eda.237.1511537358559; Fri, 24 Nov 2017 07:29:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511537358; cv=none; d=google.com; s=arc-20160816; b=qGOUqGqMnhupO3e1GSdD4flWRzUxfZf+QmHaQMV4fYPNPHFEeX+damG0ab3P1xR8a/ amFOnVQtD802rDLAPRXFY7W7cLHTD8gGxmmZSh20Z0XYbl8MuJmGuGuCISTrz9JnXhsx aZ6PDM6cMw7l5Cp+S/D7M12FGqjCSsNPBmB9SBBDEXUHyq3KzLassVApIR9f7VrAtdH9 Z27S3b7i9rPpQckIEOEsc1Kv0yDpRXnVeAHnOfr/pVietAYQbKBOg0oYk3bd/rJIDTCk d7H7UvWv/8Mzw1mtO547CnxX8kTtxL2z9SxFaYW6aQ7DRwu5luyQ0jIWrN7IJuH+Ajye 4lZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:dkim-filter:arc-authentication-results; bh=/VhEvfdvnKCnWfGtaE9qYGOGeYELsAdPuF+g2aI8TSk=; b=Y6UrVchV3vigMc3vPWpG6x6BobpczB0uBeT/AdyJb9YK3itO/nm963Na4DIF9zNrQ4 gGK9UC7lL7HRKmC31i6ux9lpzuhACDIRZ3R9YZds31DBIoXY/YbqHvumz4kBDQeQSKoQ TFy3jsMaplgQzfLZuXsQpvdza9HIUcK6+7UmHzgxZdmKJlnpKe4dUuCGf1VXiKeSzh85 QCkNkfxSiFkDwEVogo0buvzn9q3LEn2eAUXXI6iqT5/0KYYe2BxRwytawtvS0feWTycv ld6VZeapRo6WcNASCxj0sEoLBGRN4ht42ZZtyLjWeSletUb8BjFdPXSlKhE+MJXi2hPY Zu+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com header.s=dec2015msa header.b=bASorbUf; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Return-Path: Received: from lists.denx.de (dione.denx.de. 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Fri, 24 Nov 2017 15:27:09 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 83582C21DDA; Fri, 24 Nov 2017 15:25:53 +0000 (UTC) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by lists.denx.de (Postfix) with ESMTPS id E437FC21DDB for ; Fri, 24 Nov 2017 15:25:52 +0000 (UTC) Received: from grover.sesame (FL1-125-199-20-195.osk.mesh.ad.jp [125.199.20.195]) (authenticated) by conuserg-11.nifty.com with ESMTP id vAOFPbJn011993; Sat, 25 Nov 2017 00:25:39 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com vAOFPbJn011993 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1511537140; bh=+edk3NSG1w3RvEbq92fAXmusAZ2C33B3JIm6Tjz620k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bASorbUfsXUMsoRw6+j7xqXZO+91s4stD3knRfiXA371YRbpN7ySvMdN0kOGZUqal 6lJH//U3y4qC77loJhPxJME+cEVnyj793MDSK1Jb/Vp8OlRigMBRqgCKcmpXIW0QaH 6qnjedhB1MFOt0Ru7ZaEbKipkC9YyMBkBMmuUWqGb2wwLQ/doF6Lz9l1O2yEJSKoq0 tfgvNYqn7sGQh2ieZsZQGD7g36NjXldTuJpkCyCZg5MtxXeB99FtA/GzSSD2CzhIQb ePQLvzKTdVvHMSw+cpDYvg3M23LRnyJRVWV6aTQ+4j/T4w3HtJ8GI1QBTX87ImdG6a s7x79M38VlfjA== X-Nifty-SrcIP: [125.199.20.195] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 25 Nov 2017 00:25:34 +0900 Message-Id: <1511537135-26482-5-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511537135-26482-1-git-send-email-yamada.masahiro@socionext.com> References: <1511537135-26482-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 4/5] gpio: uniphier: import dt-binginds header from Linux X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Signed-off-by: Masahiro Yamada --- drivers/gpio/gpio-uniphier.c | 3 +-- include/dt-bindings/gpio/uniphier-gpio.h | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+), 2 deletions(-) create mode 100644 include/dt-bindings/gpio/uniphier-gpio.h diff --git a/drivers/gpio/gpio-uniphier.c b/drivers/gpio/gpio-uniphier.c index 107c3fc..8d72ab8 100644 --- a/drivers/gpio/gpio-uniphier.c +++ b/drivers/gpio/gpio-uniphier.c @@ -13,8 +13,7 @@ #include #include #include - -#define UNIPHIER_GPIO_LINES_PER_BANK 8 +#include #define UNIPHIER_GPIO_PORT_DATA 0x0 /* data */ #define UNIPHIER_GPIO_PORT_DIR 0x4 /* direction (1:in, 0:out) */ diff --git a/include/dt-bindings/gpio/uniphier-gpio.h b/include/dt-bindings/gpio/uniphier-gpio.h new file mode 100644 index 0000000..9f0ad17 --- /dev/null +++ b/include/dt-bindings/gpio/uniphier-gpio.h @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2017 Socionext Inc. + * Author: Masahiro Yamada + */ + +#ifndef _DT_BINDINGS_GPIO_UNIPHIER_H +#define _DT_BINDINGS_GPIO_UNIPHIER_H + +#define UNIPHIER_GPIO_LINES_PER_BANK 8 + +#define UNIPHIER_GPIO_IRQ_OFFSET ((UNIPHIER_GPIO_LINES_PER_BANK) * 15) + +#define UNIPHIER_GPIO_PORT(bank, line) \ + ((UNIPHIER_GPIO_LINES_PER_BANK) * (bank) + (line)) + +#define UNIPHIER_GPIO_IRQ(n) ((UNIPHIER_GPIO_IRQ_OFFSET) + (n)) + +#endif /* _DT_BINDINGS_GPIO_UNIPHIER_H */ From patchwork Fri Nov 24 15:25:35 2017 Content-Type: text/plain; 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Fri, 24 Nov 2017 15:27:24 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 1526EC21E45; Fri, 24 Nov 2017 15:25:54 +0000 (UTC) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by lists.denx.de (Postfix) with ESMTPS id 1F676C21E37 for ; Fri, 24 Nov 2017 15:25:52 +0000 (UTC) Received: from grover.sesame (FL1-125-199-20-195.osk.mesh.ad.jp [125.199.20.195]) (authenticated) by conuserg-11.nifty.com with ESMTP id vAOFPbJo011993; Sat, 25 Nov 2017 00:25:40 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com vAOFPbJo011993 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1511537140; bh=myLGzNdJrZ6eInv036ivl52Bu0xGLaWrVlaeDUMdmdQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wHUYP9x7H+VuMbP6dIxY0h71oYK2cnMvEzGVMoh4mX27YQ7HUdQYpPk3yqtIiJExh tvc/QiicDcfTL3Q3Bp1B9hdEWK6mjwTCaEik58p6y4XXP/pEZVbLApu/nRH8fsq+Yg 5+43Ev2Pmn1g5t7/KVEiN2wFAqVM2eYUFBKKIvF0e3iJDIjalEFTAbKALK27rjx0Yg PDnLv18y8RUz138W+xFb+krTKvFQxh3vvQ53uIY0zSTyrXy4/zSYKtdndTsX1xT54s yo8sJbD4xWtlrySlV9vBIYiCrLM+iho5QYaG076V3zKUhxzeAov04uWgy8VqSIcV8P Qtft3jw13HVxA== X-Nifty-SrcIP: [125.199.20.195] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Sat, 25 Nov 2017 00:25:35 +0900 Message-Id: <1511537135-26482-6-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511537135-26482-1-git-send-email-yamada.masahiro@socionext.com> References: <1511537135-26482-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 5/5] ARM: dts: uniphier: Sync with Linux 4.15-rc1 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Signed-off-by: Masahiro Yamada --- arch/arm/dts/uniphier-ld11-ref.dts | 10 +++- arch/arm/dts/uniphier-ld11.dtsi | 50 +++++++++++++++++-- arch/arm/dts/uniphier-ld20-ref.dts | 10 +++- arch/arm/dts/uniphier-ld20.dtsi | 87 ++++++++++++++++++++++++++++++++- arch/arm/dts/uniphier-ld4-ref.dts | 10 +++- arch/arm/dts/uniphier-ld4.dtsi | 23 +++++++-- arch/arm/dts/uniphier-ld6b-ref.dts | 10 +++- arch/arm/dts/uniphier-pinctrl.dtsi | 52 ++++++++++---------- arch/arm/dts/uniphier-pro4-ref.dts | 10 +++- arch/arm/dts/uniphier-pro4.dtsi | 22 +++++++-- arch/arm/dts/uniphier-pro5.dtsi | 16 +++++- arch/arm/dts/uniphier-pxs2.dtsi | 66 ++++++++++++++++++++++--- arch/arm/dts/uniphier-pxs3-ref.dts | 10 +++- arch/arm/dts/uniphier-pxs3.dtsi | 42 +++++++++++++++- arch/arm/dts/uniphier-sld8-ref.dts | 10 +++- arch/arm/dts/uniphier-sld8.dtsi | 23 +++++++-- arch/arm/dts/uniphier-support-card.dtsi | 3 +- arch/arm/dts/uniphier-v7-u-boot.dtsi | 8 +-- arch/arm/mach-uniphier/sbc/sbc-ld11.c | 2 +- arch/arm/mach-uniphier/sbc/sbc-pxs2.c | 2 +- 20 files changed, 400 insertions(+), 66 deletions(-) diff --git a/arch/arm/dts/uniphier-ld11-ref.dts b/arch/arm/dts/uniphier-ld11-ref.dts index ffb473a..54c5317 100644 --- a/arch/arm/dts/uniphier-ld11-ref.dts +++ b/arch/arm/dts/uniphier-ld11-ref.dts @@ -40,13 +40,21 @@ }; ðsc { - interrupts = <0 48 4>; + interrupts = <0 8>; }; &serial0 { status = "okay"; }; +&gpio { + xirq0 { + gpio-hog; + gpios = ; + input; + }; +}; + &i2c0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index cf079b9..40f27bb 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -7,6 +7,9 @@ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +#include +#include + /memreserve/ 0x80000000 0x02000000; / { @@ -49,7 +52,7 @@ }; }; - cluster0_opp: opp_table { + cluster0_opp: opp-table { compatible = "operating-points-v2"; opp-shared; @@ -96,6 +99,11 @@ }; }; + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 13 4>, @@ -119,6 +127,7 @@ pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; clock-frequency = <58820000>; + resets = <&peri_rst 0>; }; serial1: serial@54006900 { @@ -130,6 +139,7 @@ pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; clock-frequency = <58820000>; + resets = <&peri_rst 1>; }; serial2: serial@54006a00 { @@ -141,6 +151,7 @@ pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; clock-frequency = <58820000>; + resets = <&peri_rst 2>; }; serial3: serial@54006b00 { @@ -152,6 +163,7 @@ pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; clock-frequency = <58820000>; + resets = <&peri_rst 3>; }; gpio: gpio@55000000 { @@ -200,6 +212,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&peri_clk 4>; + resets = <&peri_rst 4>; clock-frequency = <100000>; }; @@ -213,6 +226,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&peri_clk 5>; + resets = <&peri_rst 5>; clock-frequency = <100000>; }; @@ -223,6 +237,7 @@ #size-cells = <0>; interrupts = <0 43 4>; clocks = <&peri_clk 6>; + resets = <&peri_rst 6>; clock-frequency = <400000>; }; @@ -236,6 +251,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; clocks = <&peri_clk 7>; + resets = <&peri_rst 7>; clock-frequency = <100000>; }; @@ -249,6 +265,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4>; clocks = <&peri_clk 8>; + resets = <&peri_rst 8>; clock-frequency = <100000>; }; @@ -259,6 +276,7 @@ #size-cells = <0>; interrupts = <0 25 4>; clocks = <&peri_clk 9>; + resets = <&peri_rst 9>; clock-frequency = <400000>; }; @@ -311,9 +329,11 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc_1v8>; clocks = <&sys_clk 4>; + resets = <&sys_rst 4>; bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; + mmc-pwrseq = <&emmc_pwrseq>; cdns,phy-input-delay-legacy = <4>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; @@ -328,7 +348,8 @@ interrupts = <0 243 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0>; - clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, + <&mio_clk 12>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>; }; @@ -340,7 +361,8 @@ interrupts = <0 244 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1>; - clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, + <&mio_clk 13>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>; }; @@ -352,7 +374,8 @@ interrupts = <0 245 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb2>; - clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, + <&mio_clk 14>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, <&mio_rst 14>; }; @@ -384,6 +407,24 @@ }; }; + soc-glue@5f900000 { + compatible = "socionext,uniphier-ld11-soc-glue-debug", + "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x5f900000 0x2000>; + + efuse@100 { + compatible = "socionext,uniphier-efuse"; + reg = <0x100 0x28>; + }; + + efuse@200 { + compatible = "socionext,uniphier-efuse"; + reg = <0x200 0x68>; + }; + }; + aidet: aidet@5fc20000 { compatible = "socionext,uniphier-ld11-aidet"; reg = <0x5fc20000 0x200>; @@ -429,6 +470,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; clocks = <&sys_clk 2>; + resets = <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-ld20-ref.dts b/arch/arm/dts/uniphier-ld20-ref.dts index 1ca0c86..6933710 100644 --- a/arch/arm/dts/uniphier-ld20-ref.dts +++ b/arch/arm/dts/uniphier-ld20-ref.dts @@ -40,13 +40,21 @@ }; ðsc { - interrupts = <0 48 4>; + interrupts = <0 8>; }; &serial0 { status = "okay"; }; +&gpio { + xirq0 { + gpio-hog; + gpios = ; + input; + }; +}; + &i2c0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi index 68f0292..4d8655e 100644 --- a/arch/arm/dts/uniphier-ld20.dtsi +++ b/arch/arm/dts/uniphier-ld20.dtsi @@ -7,6 +7,10 @@ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +#include +#include +#include + /memreserve/ 0x80000000 0x02000000; / { @@ -46,6 +50,7 @@ clocks = <&sys_clk 32>; enable-method = "psci"; operating-points-v2 = <&cluster0_opp>; + #cooling-cells = <2>; }; cpu1: cpu@1 { @@ -64,6 +69,7 @@ clocks = <&sys_clk 33>; enable-method = "psci"; operating-points-v2 = <&cluster1_opp>; + #cooling-cells = <2>; }; cpu3: cpu@101 { @@ -76,7 +82,7 @@ }; }; - cluster0_opp: opp_table0 { + cluster0_opp: opp-table0 { compatible = "operating-points-v2"; opp-shared; @@ -114,7 +120,7 @@ }; }; - cluster1_opp: opp_table1 { + cluster1_opp: opp-table1 { compatible = "operating-points-v2"; opp-shared; @@ -165,6 +171,11 @@ }; }; + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(3, 2) GPIO_ACTIVE_LOW>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 13 4>, @@ -173,6 +184,40 @@ <1 10 4>; }; + thermal-zones { + cpu-thermal { + polling-delay-passive = <250>; /* 250ms */ + polling-delay = <1000>; /* 1000ms */ + thermal-sensors = <&pvtctl>; + + trips { + cpu_crit: cpu-crit { + temperature = <110000>; /* 110C */ + hysteresis = <2000>; + type = "critical"; + }; + cpu_alert: cpu-alert { + temperature = <100000>; /* 100C */ + hysteresis = <2000>; + type = "passive"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert>; + cooling-device = <&cpu0 + THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + map1 { + trip = <&cpu_alert>; + cooling-device = <&cpu2 + THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + soc@0 { compatible = "simple-bus"; #address-cells = <1>; @@ -188,6 +233,7 @@ pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; clock-frequency = <58820000>; + resets = <&peri_rst 0>; }; serial1: serial@54006900 { @@ -199,6 +245,7 @@ pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; clock-frequency = <58820000>; + resets = <&peri_rst 1>; }; serial2: serial@54006a00 { @@ -210,6 +257,7 @@ pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; clock-frequency = <58820000>; + resets = <&peri_rst 2>; }; serial3: serial@54006b00 { @@ -221,6 +269,7 @@ pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; clock-frequency = <58820000>; + resets = <&peri_rst 3>; }; gpio: gpio@55000000 { @@ -263,6 +312,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&peri_clk 4>; + resets = <&peri_rst 4>; clock-frequency = <100000>; }; @@ -276,6 +326,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&peri_clk 5>; + resets = <&peri_rst 5>; clock-frequency = <100000>; }; @@ -286,6 +337,7 @@ #size-cells = <0>; interrupts = <0 43 4>; clocks = <&peri_clk 6>; + resets = <&peri_rst 6>; clock-frequency = <400000>; }; @@ -299,6 +351,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; clocks = <&peri_clk 7>; + resets = <&peri_rst 7>; clock-frequency = <100000>; }; @@ -312,6 +365,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4>; clocks = <&peri_clk 8>; + resets = <&peri_rst 8>; clock-frequency = <100000>; }; @@ -322,6 +376,7 @@ #size-cells = <0>; interrupts = <0 25 4>; clocks = <&peri_clk 9>; + resets = <&peri_rst 9>; clock-frequency = <400000>; }; @@ -379,9 +434,11 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc_1v8>; clocks = <&sys_clk 4>; + resets = <&sys_rst 4>; bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; + mmc-pwrseq = <&emmc_pwrseq>; cdns,phy-input-delay-legacy = <4>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; @@ -413,6 +470,24 @@ }; }; + soc-glue@5f900000 { + compatible = "socionext,uniphier-ld20-soc-glue-debug", + "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x5f900000 0x2000>; + + efuse@100 { + compatible = "socionext,uniphier-efuse"; + reg = <0x100 0x28>; + }; + + efuse@200 { + compatible = "socionext,uniphier-efuse"; + reg = <0x200 0x68>; + }; + }; + aidet: aidet@5fc20000 { compatible = "socionext,uniphier-ld20-aidet"; reg = <0x5fc20000 0x200>; @@ -447,6 +522,13 @@ watchdog { compatible = "socionext,uniphier-wdt"; }; + + pvtctl: pvtctl { + compatible = "socionext,uniphier-ld20-thermal"; + interrupts = <0 3 4>; + #thermal-sensor-cells = <0>; + socionext,tmod-calibration = <0x0f22 0x68ee>; + }; }; usb: usb@65b00000 { @@ -476,6 +558,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; clocks = <&sys_clk 2>; + resets = <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-ld4-ref.dts b/arch/arm/dts/uniphier-ld4-ref.dts index fb94df4..6097878 100644 --- a/arch/arm/dts/uniphier-ld4-ref.dts +++ b/arch/arm/dts/uniphier-ld4-ref.dts @@ -38,7 +38,7 @@ }; ðsc { - interrupts = <0 49 4>; + interrupts = <1 8>; }; &serial0 { @@ -53,6 +53,14 @@ status = "okay"; }; +&gpio { + xirq1 { + gpio-hog; + gpios = ; + input; + }; +}; + &i2c0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi index 158beae..4f8f386 100644 --- a/arch/arm/dts/uniphier-ld4.dtsi +++ b/arch/arm/dts/uniphier-ld4.dtsi @@ -7,6 +7,8 @@ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +#include + / { compatible = "socionext,uniphier-ld4"; #address-cells = <1>; @@ -37,7 +39,7 @@ clock-frequency = <24576000>; }; - arm_timer_clk: arm_timer_clk { + arm_timer_clk: arm-timer { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <50000000>; @@ -72,6 +74,7 @@ pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; clock-frequency = <36864000>; + resets = <&peri_rst 0>; }; serial1: serial@54006900 { @@ -83,6 +86,7 @@ pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; clock-frequency = <36864000>; + resets = <&peri_rst 1>; }; serial2: serial@54006a00 { @@ -94,6 +98,7 @@ pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; clock-frequency = <36864000>; + resets = <&peri_rst 2>; }; serial3: serial@54006b00 { @@ -105,6 +110,7 @@ pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; clock-frequency = <36864000>; + resets = <&peri_rst 3>; }; gpio: gpio@55000000 { @@ -118,6 +124,7 @@ gpio-ranges = <&pinctrl 0 0 0>; gpio-ranges-group-names = "gpio_range"; ngpios = <136>; + socionext,interrupt-ranges = <0 48 13>, <14 62 2>; }; i2c0: i2c@58400000 { @@ -130,6 +137,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&peri_clk 4>; + resets = <&peri_rst 4>; clock-frequency = <100000>; }; @@ -143,6 +151,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&peri_clk 5>; + resets = <&peri_rst 5>; clock-frequency = <100000>; }; @@ -156,6 +165,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; clocks = <&peri_clk 6>; + resets = <&peri_rst 6>; clock-frequency = <400000>; }; @@ -169,6 +179,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; clocks = <&peri_clk 7>; + resets = <&peri_rst 7>; clock-frequency = <100000>; }; @@ -261,7 +272,8 @@ interrupts = <0 80 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0>; - clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, + <&mio_clk 12>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>; }; @@ -273,7 +285,8 @@ interrupts = <0 81 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1>; - clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, + <&mio_clk 13>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>; }; @@ -285,7 +298,8 @@ interrupts = <0 82 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb2>; - clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, + <&mio_clk 14>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, <&mio_rst 14>; }; @@ -354,6 +368,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand2cs>; clocks = <&sys_clk 2>; + resets = <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-ld6b-ref.dts b/arch/arm/dts/uniphier-ld6b-ref.dts index 9b136b8..1703d8f 100644 --- a/arch/arm/dts/uniphier-ld6b-ref.dts +++ b/arch/arm/dts/uniphier-ld6b-ref.dts @@ -40,7 +40,7 @@ }; ðsc { - interrupts = <0 52 4>; + interrupts = <4 8>; }; &serial0 { @@ -55,6 +55,14 @@ status = "okay"; }; +&gpio { + xirq4 { + gpio-hog; + gpios = ; + input; + }; +}; + &i2c0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi index a1b9a6c..d4f78c2 100644 --- a/arch/arm/dts/uniphier-pinctrl.dtsi +++ b/arch/arm/dts/uniphier-pinctrl.dtsi @@ -8,132 +8,132 @@ */ &pinctrl { - pinctrl_aout: aout_grp { + pinctrl_aout: aout { groups = "aout"; function = "aout"; }; - pinctrl_emmc: emmc_grp { + pinctrl_emmc: emmc { groups = "emmc", "emmc_dat8"; function = "emmc"; }; - pinctrl_emmc_1v8: emmc_grp_1v8 { + pinctrl_emmc_1v8: emmc-1v8 { groups = "emmc", "emmc_dat8"; function = "emmc"; }; - pinctrl_ether_mii: ether_mii_grp { + pinctrl_ether_mii: ether-mii { groups = "ether_mii"; function = "ether_mii"; }; - pinctrl_ether_rgmii: ether_rgmii_grp { + pinctrl_ether_rgmii: ether-rgmii { groups = "ether_rgmii"; function = "ether_rgmii"; }; - pinctrl_ether_rmii: ether_rmii_grp { + pinctrl_ether_rmii: ether-rmii { groups = "ether_rmii"; function = "ether_rmii"; }; - pinctrl_i2c0: i2c0_grp { + pinctrl_i2c0: i2c0 { groups = "i2c0"; function = "i2c0"; }; - pinctrl_i2c1: i2c1_grp { + pinctrl_i2c1: i2c1 { groups = "i2c1"; function = "i2c1"; }; - pinctrl_i2c2: i2c2_grp { + pinctrl_i2c2: i2c2 { groups = "i2c2"; function = "i2c2"; }; - pinctrl_i2c3: i2c3_grp { + pinctrl_i2c3: i2c3 { groups = "i2c3"; function = "i2c3"; }; - pinctrl_i2c4: i2c4_grp { + pinctrl_i2c4: i2c4 { groups = "i2c4"; function = "i2c4"; }; - pinctrl_nand: nand_grp { + pinctrl_nand: nand { groups = "nand"; function = "nand"; }; - pinctrl_nand2cs: nand2cs_grp { + pinctrl_nand2cs: nand2cs { groups = "nand", "nand_cs1"; function = "nand"; }; - pinctrl_sd: sd_grp { + pinctrl_sd: sd { groups = "sd"; function = "sd"; }; - pinctrl_sd_1v8: sd_grp_1v8 { + pinctrl_sd_1v8: sd-1v8 { groups = "sd"; function = "sd"; }; - pinctrl_sd1: sd1_grp { + pinctrl_sd1: sd1 { groups = "sd1"; function = "sd1"; }; - pinctrl_sd1_1v8: sd1_grp_1v8 { + pinctrl_sd1_1v8: sd1-1v8 { groups = "sd1"; function = "sd1"; }; - pinctrl_system_bus: system_bus_grp { + pinctrl_system_bus: system-bus { groups = "system_bus", "system_bus_cs1"; function = "system_bus"; }; - pinctrl_uart0: uart0_grp { + pinctrl_uart0: uart0 { groups = "uart0"; function = "uart0"; }; - pinctrl_uart1: uart1_grp { + pinctrl_uart1: uart1 { groups = "uart1"; function = "uart1"; }; - pinctrl_uart2: uart2_grp { + pinctrl_uart2: uart2 { groups = "uart2"; function = "uart2"; }; - pinctrl_uart3: uart3_grp { + pinctrl_uart3: uart3 { groups = "uart3"; function = "uart3"; }; - pinctrl_usb0: usb0_grp { + pinctrl_usb0: usb0 { groups = "usb0"; function = "usb0"; }; - pinctrl_usb1: usb1_grp { + pinctrl_usb1: usb1 { groups = "usb1"; function = "usb1"; }; - pinctrl_usb2: usb2_grp { + pinctrl_usb2: usb2 { groups = "usb2"; function = "usb2"; }; - pinctrl_usb3: usb3_grp { + pinctrl_usb3: usb3 { groups = "usb3"; function = "usb3"; }; diff --git a/arch/arm/dts/uniphier-pro4-ref.dts b/arch/arm/dts/uniphier-pro4-ref.dts index 1b22f80..3f9ce6d 100644 --- a/arch/arm/dts/uniphier-pro4-ref.dts +++ b/arch/arm/dts/uniphier-pro4-ref.dts @@ -41,7 +41,7 @@ }; ðsc { - interrupts = <0 50 4>; + interrupts = <2 8>; }; &serial0 { @@ -56,6 +56,14 @@ status = "okay"; }; +&gpio { + xirq2 { + gpio-hog; + gpios = ; + input; + }; +}; + &i2c0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi index ea97e26..9b3ce13 100644 --- a/arch/arm/dts/uniphier-pro4.dtsi +++ b/arch/arm/dts/uniphier-pro4.dtsi @@ -7,6 +7,8 @@ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +#include + / { compatible = "socionext,uniphier-pro4"; #address-cells = <1>; @@ -45,7 +47,7 @@ clock-frequency = <25000000>; }; - arm_timer_clk: arm_timer_clk { + arm_timer_clk: arm-timer { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <50000000>; @@ -80,6 +82,7 @@ pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; clock-frequency = <73728000>; + resets = <&peri_rst 0>; }; serial1: serial@54006900 { @@ -91,6 +94,7 @@ pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; clock-frequency = <73728000>; + resets = <&peri_rst 1>; }; serial2: serial@54006a00 { @@ -102,6 +106,7 @@ pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; clock-frequency = <73728000>; + resets = <&peri_rst 2>; }; serial3: serial@54006b00 { @@ -113,6 +118,7 @@ pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; clock-frequency = <73728000>; + resets = <&peri_rst 3>; }; gpio: gpio@55000000 { @@ -126,6 +132,7 @@ gpio-ranges = <&pinctrl 0 0 0>; gpio-ranges-group-names = "gpio_range"; ngpios = <248>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>; }; i2c0: i2c@58780000 { @@ -138,6 +145,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&peri_clk 4>; + resets = <&peri_rst 4>; clock-frequency = <100000>; }; @@ -151,6 +159,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&peri_clk 5>; + resets = <&peri_rst 5>; clock-frequency = <100000>; }; @@ -164,6 +173,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; clocks = <&peri_clk 6>; + resets = <&peri_rst 6>; clock-frequency = <100000>; }; @@ -177,6 +187,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; clocks = <&peri_clk 7>; + resets = <&peri_rst 7>; clock-frequency = <100000>; }; @@ -190,6 +201,7 @@ #size-cells = <0>; interrupts = <0 25 4>; clocks = <&peri_clk 9>; + resets = <&peri_rst 9>; clock-frequency = <400000>; }; @@ -201,6 +213,7 @@ #size-cells = <0>; interrupts = <0 26 4>; clocks = <&peri_clk 10>; + resets = <&peri_rst 10>; clock-frequency = <400000>; }; @@ -310,7 +323,8 @@ interrupts = <0 80 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb2>; - clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, + <&mio_clk 12>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>; }; @@ -322,7 +336,8 @@ interrupts = <0 81 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb3>; - clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, + <&mio_clk 13>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>; }; @@ -427,6 +442,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; clocks = <&sys_clk 2>; + resets = <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi index 3be3acf..c3b627c 100644 --- a/arch/arm/dts/uniphier-pro5.dtsi +++ b/arch/arm/dts/uniphier-pro5.dtsi @@ -37,7 +37,7 @@ }; }; - cpu_opp: opp_table { + cpu_opp: opp-table { compatible = "operating-points-v2"; opp-shared; @@ -119,7 +119,7 @@ clock-frequency = <20000000>; }; - arm_timer_clk: arm_timer_clk { + arm_timer_clk: arm-timer { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <50000000>; @@ -167,6 +167,7 @@ pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; clock-frequency = <73728000>; + resets = <&peri_rst 0>; }; serial1: serial@54006900 { @@ -178,6 +179,7 @@ pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; clock-frequency = <73728000>; + resets = <&peri_rst 1>; }; serial2: serial@54006a00 { @@ -189,6 +191,7 @@ pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; clock-frequency = <73728000>; + resets = <&peri_rst 2>; }; serial3: serial@54006b00 { @@ -200,6 +203,7 @@ pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; clock-frequency = <73728000>; + resets = <&peri_rst 3>; }; gpio: gpio@55000000 { @@ -213,6 +217,7 @@ gpio-ranges = <&pinctrl 0 0 0>; gpio-ranges-group-names = "gpio_range"; ngpios = <248>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>; }; i2c0: i2c@58780000 { @@ -225,6 +230,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&peri_clk 4>; + resets = <&peri_rst 4>; clock-frequency = <100000>; }; @@ -238,6 +244,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&peri_clk 5>; + resets = <&peri_rst 5>; clock-frequency = <100000>; }; @@ -251,6 +258,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; clocks = <&peri_clk 6>; + resets = <&peri_rst 6>; clock-frequency = <100000>; }; @@ -264,6 +272,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; clocks = <&peri_clk 7>; + resets = <&peri_rst 7>; clock-frequency = <100000>; }; @@ -277,6 +286,7 @@ #size-cells = <0>; interrupts = <0 25 4>; clocks = <&peri_clk 9>; + resets = <&peri_rst 9>; clock-frequency = <400000>; }; @@ -288,6 +298,7 @@ #size-cells = <0>; interrupts = <0 26 4>; clocks = <&peri_clk 10>; + resets = <&peri_rst 10>; clock-frequency = <400000>; }; @@ -438,6 +449,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand2cs>; clocks = <&sys_clk 2>; + resets = <&sys_rst 2>; }; emmc: sdhc@68400000 { diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index dcb2515..549d930 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -7,6 +7,9 @@ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +#include +#include + / { compatible = "socionext,uniphier-pxs2"; #address-cells = <1>; @@ -16,7 +19,7 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0>; @@ -24,9 +27,10 @@ enable-method = "psci"; next-level-cache = <&l2>; operating-points-v2 = <&cpu_opp>; + #cooling-cells = <2>; }; - cpu@1 { + cpu1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <1>; @@ -36,7 +40,7 @@ operating-points-v2 = <&cpu_opp>; }; - cpu@2 { + cpu2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <2>; @@ -46,7 +50,7 @@ operating-points-v2 = <&cpu_opp>; }; - cpu@3 { + cpu3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <3>; @@ -57,7 +61,7 @@ }; }; - cpu_opp: opp_table { + cpu_opp: opp-table { compatible = "operating-points-v2"; opp-shared; @@ -107,13 +111,42 @@ clock-frequency = <25000000>; }; - arm_timer_clk: arm_timer_clk { + arm_timer_clk: arm-timer { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <50000000>; }; }; + thermal-zones { + cpu-thermal { + polling-delay-passive = <250>; /* 250ms */ + polling-delay = <1000>; /* 1000ms */ + thermal-sensors = <&pvtctl>; + + trips { + cpu_crit: cpu-crit { + temperature = <95000>; /* 95C */ + hysteresis = <2000>; + type = "critical"; + }; + cpu_alert: cpu-alert { + temperature = <85000>; /* 85C */ + hysteresis = <2000>; + type = "passive"; + }; + }; + + cooling-maps { + map { + trip = <&cpu_alert>; + cooling-device = <&cpu0 + THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; @@ -142,6 +175,7 @@ pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; clock-frequency = <88900000>; + resets = <&peri_rst 0>; }; serial1: serial@54006900 { @@ -153,6 +187,7 @@ pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; clock-frequency = <88900000>; + resets = <&peri_rst 1>; }; serial2: serial@54006a00 { @@ -164,6 +199,7 @@ pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; clock-frequency = <88900000>; + resets = <&peri_rst 2>; }; serial3: serial@54006b00 { @@ -175,6 +211,7 @@ pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; clock-frequency = <88900000>; + resets = <&peri_rst 3>; }; gpio: gpio@55000000 { @@ -190,6 +227,8 @@ gpio-ranges-group-names = "gpio_range0", "gpio_range1"; ngpios = <232>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>, + <21 217 3>; }; i2c0: i2c@58780000 { @@ -202,6 +241,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&peri_clk 4>; + resets = <&peri_rst 4>; clock-frequency = <100000>; }; @@ -215,6 +255,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&peri_clk 5>; + resets = <&peri_rst 5>; clock-frequency = <100000>; }; @@ -228,6 +269,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; clocks = <&peri_clk 6>; + resets = <&peri_rst 6>; clock-frequency = <100000>; }; @@ -241,6 +283,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; clocks = <&peri_clk 7>; + resets = <&peri_rst 7>; clock-frequency = <100000>; }; @@ -252,6 +295,7 @@ #size-cells = <0>; interrupts = <0 45 4>; clocks = <&peri_clk 8>; + resets = <&peri_rst 8>; clock-frequency = <400000>; }; @@ -263,6 +307,7 @@ #size-cells = <0>; interrupts = <0 25 4>; clocks = <&peri_clk 9>; + resets = <&peri_rst 9>; clock-frequency = <400000>; }; @@ -274,6 +319,7 @@ #size-cells = <0>; interrupts = <0 26 4>; clocks = <&peri_clk 10>; + resets = <&peri_rst 10>; clock-frequency = <400000>; }; @@ -412,6 +458,13 @@ compatible = "socionext,uniphier-pxs2-reset"; #reset-cells = <1>; }; + + pvtctl: pvtctl { + compatible = "socionext,uniphier-pxs2-thermal"; + interrupts = <0 3 4>; + #thermal-sensor-cells = <0>; + socionext,tmod-calibration = <0x0f86 0x6844>; + }; }; usb0: usb@65b00000 { @@ -459,6 +512,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand2cs>; clocks = <&sys_clk 2>; + resets = <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-pxs3-ref.dts b/arch/arm/dts/uniphier-pxs3-ref.dts index 27de84d..f549610 100644 --- a/arch/arm/dts/uniphier-pxs3-ref.dts +++ b/arch/arm/dts/uniphier-pxs3-ref.dts @@ -38,13 +38,21 @@ }; ðsc { - interrupts = <0 52 4>; + interrupts = <4 8>; }; &serial0 { status = "okay"; }; +&gpio { + xirq4 { + gpio-hog; + gpios = ; + input; + }; +}; + &i2c0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi index a004bd1..9c3aad5 100644 --- a/arch/arm/dts/uniphier-pxs3.dtsi +++ b/arch/arm/dts/uniphier-pxs3.dtsi @@ -7,6 +7,9 @@ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +#include +#include + /memreserve/ 0x80000000 0x02000000; / { @@ -73,7 +76,7 @@ }; }; - cluster0_opp: opp_table { + cluster0_opp: opp-table { compatible = "operating-points-v2"; opp-shared; @@ -124,6 +127,11 @@ }; }; + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio UNIPHIER_GPIO_PORT(5, 7) GPIO_ACTIVE_LOW>; + }; + timer { compatible = "arm,armv8-timer"; interrupts = <1 13 4>, @@ -147,6 +155,7 @@ pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; clock-frequency = <58820000>; + resets = <&peri_rst 0>; }; serial1: serial@54006900 { @@ -158,6 +167,7 @@ pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; clock-frequency = <58820000>; + resets = <&peri_rst 1>; }; serial2: serial@54006a00 { @@ -169,6 +179,7 @@ pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; clock-frequency = <58820000>; + resets = <&peri_rst 2>; }; serial3: serial@54006b00 { @@ -180,6 +191,7 @@ pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; clock-frequency = <58820000>; + resets = <&peri_rst 3>; }; gpio: gpio@55000000 { @@ -197,6 +209,8 @@ "gpio_range1", "gpio_range2"; ngpios = <286>; + socionext,interrupt-ranges = <0 48 16>, <16 154 5>, + <21 217 3>; }; i2c0: i2c@58780000 { @@ -209,6 +223,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&peri_clk 4>; + resets = <&peri_rst 4>; clock-frequency = <100000>; }; @@ -222,6 +237,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&peri_clk 5>; + resets = <&peri_rst 5>; clock-frequency = <100000>; }; @@ -235,6 +251,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; clocks = <&peri_clk 6>; + resets = <&peri_rst 6>; clock-frequency = <100000>; }; @@ -248,6 +265,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; clocks = <&peri_clk 7>; + resets = <&peri_rst 7>; clock-frequency = <100000>; }; @@ -259,6 +277,7 @@ #size-cells = <0>; interrupts = <0 26 4>; clocks = <&peri_clk 10>; + resets = <&peri_rst 10>; clock-frequency = <400000>; }; @@ -316,9 +335,11 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_emmc_1v8>; clocks = <&sys_clk 4>; + resets = <&sys_rst 4>; bus-width = <8>; mmc-ddr-1_8v; mmc-hs200-1_8v; + mmc-pwrseq = <&emmc_pwrseq>; cdns,phy-input-delay-legacy = <4>; cdns,phy-input-delay-mmc-highspeed = <2>; cdns,phy-input-delay-mmc-ddr = <3>; @@ -350,6 +371,24 @@ }; }; + soc-glue@5f900000 { + compatible = "socionext,uniphier-pxs3-soc-glue-debug", + "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x5f900000 0x2000>; + + efuse@100 { + compatible = "socionext,uniphier-efuse"; + reg = <0x100 0x28>; + }; + + efuse@200 { + compatible = "socionext,uniphier-efuse"; + reg = <0x200 0x68>; + }; + }; + aidet: aidet@5fc20000 { compatible = "socionext,uniphier-pxs3-aidet"; reg = <0x5fc20000 0x200>; @@ -431,6 +470,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand>; clocks = <&sys_clk 2>; + resets = <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-sld8-ref.dts b/arch/arm/dts/uniphier-sld8-ref.dts index c94f0af..8fae1ed 100644 --- a/arch/arm/dts/uniphier-sld8-ref.dts +++ b/arch/arm/dts/uniphier-sld8-ref.dts @@ -38,7 +38,7 @@ }; ðsc { - interrupts = <0 48 4>; + interrupts = <0 8>; }; &serial0 { @@ -53,6 +53,14 @@ status = "okay"; }; +&gpio { + xirq0 { + gpio-hog; + gpios = ; + input; + }; +}; + &i2c0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi index a3693b0..c759ac6 100644 --- a/arch/arm/dts/uniphier-sld8.dtsi +++ b/arch/arm/dts/uniphier-sld8.dtsi @@ -7,6 +7,8 @@ * SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +#include + / { compatible = "socionext,uniphier-sld8"; #address-cells = <1>; @@ -37,7 +39,7 @@ clock-frequency = <25000000>; }; - arm_timer_clk: arm_timer_clk { + arm_timer_clk: arm-timer { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <50000000>; @@ -72,6 +74,7 @@ pinctrl-0 = <&pinctrl_uart0>; clocks = <&peri_clk 0>; clock-frequency = <80000000>; + resets = <&peri_rst 0>; }; serial1: serial@54006900 { @@ -83,6 +86,7 @@ pinctrl-0 = <&pinctrl_uart1>; clocks = <&peri_clk 1>; clock-frequency = <80000000>; + resets = <&peri_rst 1>; }; serial2: serial@54006a00 { @@ -94,6 +98,7 @@ pinctrl-0 = <&pinctrl_uart2>; clocks = <&peri_clk 2>; clock-frequency = <80000000>; + resets = <&peri_rst 2>; }; serial3: serial@54006b00 { @@ -105,6 +110,7 @@ pinctrl-0 = <&pinctrl_uart3>; clocks = <&peri_clk 3>; clock-frequency = <80000000>; + resets = <&peri_rst 3>; }; gpio: gpio@55000000 { @@ -122,6 +128,7 @@ "gpio_range1", "gpio_range2"; ngpios = <136>; + socionext,interrupt-ranges = <0 48 13>, <14 62 2>; }; i2c0: i2c@58400000 { @@ -134,6 +141,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; clocks = <&peri_clk 4>; + resets = <&peri_rst 4>; clock-frequency = <100000>; }; @@ -147,6 +155,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; clocks = <&peri_clk 5>; + resets = <&peri_rst 5>; clock-frequency = <100000>; }; @@ -160,6 +169,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; clocks = <&peri_clk 6>; + resets = <&peri_rst 6>; clock-frequency = <400000>; }; @@ -173,6 +183,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; clocks = <&peri_clk 7>; + resets = <&peri_rst 7>; clock-frequency = <100000>; }; @@ -265,7 +276,8 @@ interrupts = <0 80 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb0>; - clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, + <&mio_clk 12>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>, <&mio_rst 12>; }; @@ -277,7 +289,8 @@ interrupts = <0 81 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1>; - clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, + <&mio_clk 13>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>, <&mio_rst 13>; }; @@ -289,7 +302,8 @@ interrupts = <0 82 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb2>; - clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>; + clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, + <&mio_clk 14>; resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>, <&mio_rst 14>; }; @@ -358,6 +372,7 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_nand2cs>; clocks = <&sys_clk 2>; + resets = <&sys_rst 2>; }; }; }; diff --git a/arch/arm/dts/uniphier-support-card.dtsi b/arch/arm/dts/uniphier-support-card.dtsi index 6c825f1..e4e7e1b 100644 --- a/arch/arm/dts/uniphier-support-card.dtsi +++ b/arch/arm/dts/uniphier-support-card.dtsi @@ -11,11 +11,12 @@ status = "okay"; ranges = <1 0x00000000 0x42000000 0x02000000>; - support_card: support_card@1,1f00000 { + support_card: support-card@1,1f00000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges = <0x00000000 1 0x01f00000 0x00100000>; + interrupt-parent = <&gpio>; ethsc: ethernet@0 { compatible = "smsc,lan9118", "smsc,lan9115"; diff --git a/arch/arm/dts/uniphier-v7-u-boot.dtsi b/arch/arm/dts/uniphier-v7-u-boot.dtsi index 4a0c9c0..0094a45 100644 --- a/arch/arm/dts/uniphier-v7-u-boot.dtsi +++ b/arch/arm/dts/uniphier-v7-u-boot.dtsi @@ -36,19 +36,19 @@ pinctrl { u-boot,dm-pre-reloc; - emmc_grp { + emmc { u-boot,dm-pre-reloc; }; - uart0_grp { + uart0 { u-boot,dm-pre-reloc; }; - uart1_grp { + uart1 { u-boot,dm-pre-reloc; }; - uart2_grp { + uart2 { u-boot,dm-pre-reloc; }; }; diff --git a/arch/arm/mach-uniphier/sbc/sbc-ld11.c b/arch/arm/mach-uniphier/sbc/sbc-ld11.c index e6b83ff..d075c47 100644 --- a/arch/arm/mach-uniphier/sbc/sbc-ld11.c +++ b/arch/arm/mach-uniphier/sbc/sbc-ld11.c @@ -21,5 +21,5 @@ void uniphier_ld11_sbc_init(void) /* pins for NAND and System Bus are multiplexed */ if (spl_boot_device() != BOOT_DEVICE_NAND) - uniphier_pin_init("system_bus_grp"); + uniphier_pin_init("system-bus"); } diff --git a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c index 0e0ba27..9ee2646 100644 --- a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c +++ b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c @@ -17,5 +17,5 @@ void uniphier_pxs2_sbc_init(void) /* system bus output enable */ writel(0x17, PC0CTRL); - uniphier_pin_init("system_bus_grp"); /* PXs3 */ + uniphier_pin_init("system-bus"); /* PXs3 */ }