From patchwork Mon Nov 27 15:41:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119735 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp438521qgn; Mon, 27 Nov 2017 07:42:47 -0800 (PST) X-Google-Smtp-Source: AGs4zMZX8dpmDo+EKypuUrf89UjjgahmSUB5IaBxDqKIoI8J54szuSSCOFsRxPXKNm8clXdyqdLc X-Received: by 10.84.164.104 with SMTP id m37mr25426449plg.98.1511797367395; Mon, 27 Nov 2017 07:42:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797367; cv=none; d=google.com; s=arc-20160816; b=EwQLEYPQAuMwMrCyCdrRttvW/8vGDj89kykfKMebLRuWXcZTkBJQHOk7k48XxEoFTG 2a9vSX00qLxuqStePwH2I/L8qH3u3+Lcu08LU8prrV9r+H0gwmlHtHNrFFDTuHas/W4P CDrr0U545sU/5ESmKg2MG3ClhJhsIqer6QA+X0COP9w0Ylo0BtPIoWGPN163551msFX9 x7+3e2HsMw51175Rz1YCcr0OzhJ1Eo/diV12aTSqASS3B8FC56kep2ne3dT2flG7UeHb cDwJgEafKlCNDsksjtuzBzB1Cz1zjAPVDN5/LhncNfPY7i0ORPpRrhPsvX8N5BYm24SZ sUew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=UT3g2WKARgTzVUX0YmTysMT2YS/O/SIf5VxbWz34ors=; b=NnfieufuS7h2jggWweviaBlTHiJMzaoZXUOhB+SwED/ym3DqMrqlH/1ztWMMLVqJ4i 54zrBGUDko6d6V675at5Og4QxtZRNJ6p0BSX7HJousnKyK6ZH0a+QlRxjB4k84rOXHln pGn+8gJG8XJI0sJnTmmlXvPHunnC9RSS5vqLBsRxsGreY1UarBUm8+y+MWiHHb+ALsr0 zs/bPPSIgS8Ui3lPoTSeD077HF6KJVp3GonaP0Cbbr0DfthnTMSS6RQXhwxuvzmaIjKk gMqZkhfwrvtst2O7rKcwk0YPSp5iB3kUqtxpCGdHv9v98tFfR8AyZV/G/4M20QqL9KM4 2oLw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j6si7843312pfg.374.2017.11.27.07.42.47; Mon, 27 Nov 2017 07:42:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753018AbdK0Pmp (ORCPT + 28 others); Mon, 27 Nov 2017 10:42:45 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:32967 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752862AbdK0PmE (ORCPT ); Mon, 27 Nov 2017 10:42:04 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id C70E0213F1; Mon, 27 Nov 2017 16:42:02 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id 86ABC213ED; Mon, 27 Nov 2017 16:42:02 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Mark Rutland , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, plaes@plaes.org, icenowy@aosc.io, Thomas Petazzoni , jernej.skrabec@siol.net Subject: [PATCH v2 06/18] drm/sun4i: Rename layers to UI planes Date: Mon, 27 Nov 2017 16:41:30 +0100 Message-Id: <1e19868fb01b0180cc97e80ef945693204dc4801.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The currently supported planes for DE2 are actually only UI planes, and the VI planes will differ both in terms of code and features. It will make sense to support them in a separate file, so let's make sure we don't create a confusing file name. Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/Makefile | 2 +- drivers/gpu/drm/sun4i/sun8i_layer.c | 134 +----------------------------- drivers/gpu/drm/sun4i/sun8i_layer.h | 36 +-------- drivers/gpu/drm/sun4i/sun8i_mixer.c | 4 +- drivers/gpu/drm/sun4i/sun8i_ui.c | 134 +++++++++++++++++++++++++++++- drivers/gpu/drm/sun4i/sun8i_ui.h | 36 ++++++++- 6 files changed, 173 insertions(+), 173 deletions(-) delete mode 100644 drivers/gpu/drm/sun4i/sun8i_layer.c delete mode 100644 drivers/gpu/drm/sun4i/sun8i_layer.h create mode 100644 drivers/gpu/drm/sun4i/sun8i_ui.c create mode 100644 drivers/gpu/drm/sun4i/sun8i_ui.h -- git-series 0.9.1 diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile index 0c2f8c7facae..241cce172728 100644 --- a/drivers/gpu/drm/sun4i/Makefile +++ b/drivers/gpu/drm/sun4i/Makefile @@ -9,7 +9,7 @@ sun4i-drm-hdmi-y += sun4i_hdmi_enc.o sun4i-drm-hdmi-y += sun4i_hdmi_i2c.o sun4i-drm-hdmi-y += sun4i_hdmi_tmds_clk.o -sun8i-mixer-y += sun8i_mixer.o sun8i_layer.o +sun8i-mixer-y += sun8i_mixer.o sun8i_ui.o sun4i-tcon-y += sun4i_crtc.o sun4i-tcon-y += sun4i_dotclock.o diff --git a/drivers/gpu/drm/sun4i/sun8i_layer.c b/drivers/gpu/drm/sun4i/sun8i_layer.c deleted file mode 100644 index 23810ff72684..000000000000 --- a/drivers/gpu/drm/sun4i/sun8i_layer.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * Copyright (C) Icenowy Zheng - * - * Based on sun4i_layer.h, which is: - * Copyright (C) 2015 Free Electrons - * Copyright (C) 2015 NextThing Co - * - * Maxime Ripard - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - */ - -#include -#include -#include - -#include "sun8i_layer.h" -#include "sun8i_mixer.h" - -struct sun8i_plane_desc { - enum drm_plane_type type; - const uint32_t *formats; - uint32_t nformats; -}; - -static void sun8i_mixer_layer_atomic_disable(struct drm_plane *plane, - struct drm_plane_state *old_state) -{ - struct sun8i_layer *layer = plane_to_sun8i_layer(plane); - struct sun8i_mixer *mixer = layer->mixer; - - sun8i_mixer_layer_enable(mixer, layer->id, false); -} - -static void sun8i_mixer_layer_atomic_update(struct drm_plane *plane, - struct drm_plane_state *old_state) -{ - struct sun8i_layer *layer = plane_to_sun8i_layer(plane); - struct sun8i_mixer *mixer = layer->mixer; - - sun8i_mixer_update_layer_coord(mixer, layer->id, plane); - sun8i_mixer_update_layer_formats(mixer, layer->id, plane); - sun8i_mixer_update_layer_buffer(mixer, layer->id, plane); - sun8i_mixer_layer_enable(mixer, layer->id, true); -} - -static struct drm_plane_helper_funcs sun8i_mixer_layer_helper_funcs = { - .atomic_disable = sun8i_mixer_layer_atomic_disable, - .atomic_update = sun8i_mixer_layer_atomic_update, -}; - -static const struct drm_plane_funcs sun8i_mixer_layer_funcs = { - .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, - .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, - .destroy = drm_plane_cleanup, - .disable_plane = drm_atomic_helper_disable_plane, - .reset = drm_atomic_helper_plane_reset, - .update_plane = drm_atomic_helper_update_plane, -}; - -static const uint32_t sun8i_mixer_layer_formats[] = { - DRM_FORMAT_RGB888, - DRM_FORMAT_ARGB8888, - DRM_FORMAT_XRGB8888, -}; - -static const struct sun8i_plane_desc sun8i_mixer_planes[] = { - { - .type = DRM_PLANE_TYPE_PRIMARY, - .formats = sun8i_mixer_layer_formats, - .nformats = ARRAY_SIZE(sun8i_mixer_layer_formats), - }, -}; - -static struct sun8i_layer *sun8i_layer_init_one(struct drm_device *drm, - struct sun8i_mixer *mixer, - const struct sun8i_plane_desc *plane) -{ - struct sun8i_layer *layer; - int ret; - - layer = devm_kzalloc(drm->dev, sizeof(*layer), GFP_KERNEL); - if (!layer) - return ERR_PTR(-ENOMEM); - - /* possible crtcs are set later */ - ret = drm_universal_plane_init(drm, &layer->plane, 0, - &sun8i_mixer_layer_funcs, - plane->formats, plane->nformats, - NULL, plane->type, NULL); - if (ret) { - dev_err(drm->dev, "Couldn't initialize layer\n"); - return ERR_PTR(ret); - } - - drm_plane_helper_add(&layer->plane, - &sun8i_mixer_layer_helper_funcs); - layer->mixer = mixer; - - return layer; -} - -struct drm_plane **sun8i_layers_init(struct drm_device *drm, - struct sunxi_engine *engine) -{ - struct drm_plane **planes; - struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); - int i; - - planes = devm_kcalloc(drm->dev, ARRAY_SIZE(sun8i_mixer_planes) + 1, - sizeof(*planes), GFP_KERNEL); - if (!planes) - return ERR_PTR(-ENOMEM); - - for (i = 0; i < ARRAY_SIZE(sun8i_mixer_planes); i++) { - const struct sun8i_plane_desc *plane = &sun8i_mixer_planes[i]; - struct sun8i_layer *layer; - - layer = sun8i_layer_init_one(drm, mixer, plane); - if (IS_ERR(layer)) { - dev_err(drm->dev, "Couldn't initialize %s plane\n", - i ? "overlay" : "primary"); - return ERR_CAST(layer); - }; - - layer->id = i; - planes[i] = &layer->plane; - }; - - return planes; -} diff --git a/drivers/gpu/drm/sun4i/sun8i_layer.h b/drivers/gpu/drm/sun4i/sun8i_layer.h deleted file mode 100644 index e5eccd27cff0..000000000000 --- a/drivers/gpu/drm/sun4i/sun8i_layer.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (C) Icenowy Zheng - * - * Based on sun4i_layer.h, which is: - * Copyright (C) 2015 Free Electrons - * Copyright (C) 2015 NextThing Co - * - * Maxime Ripard - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - */ - -#ifndef _SUN8I_LAYER_H_ -#define _SUN8I_LAYER_H_ - -struct sunxi_engine; - -struct sun8i_layer { - struct drm_plane plane; - struct sun4i_drv *drv; - struct sun8i_mixer *mixer; - int id; -}; - -static inline struct sun8i_layer * -plane_to_sun8i_layer(struct drm_plane *plane) -{ - return container_of(plane, struct sun8i_layer, plane); -} - -struct drm_plane **sun8i_layers_init(struct drm_device *drm, - struct sunxi_engine *engine); -#endif /* _SUN8I_LAYER_H_ */ diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index c0cdccf772a2..f503bd000893 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -26,7 +26,7 @@ #include "sun4i_drv.h" #include "sun8i_mixer.h" -#include "sun8i_layer.h" +#include "sun8i_ui.h" #include "sunxi_engine.h" static void sun8i_mixer_commit(struct sunxi_engine *engine) @@ -228,7 +228,7 @@ int sun8i_mixer_update_layer_buffer(struct sun8i_mixer *mixer, static const struct sunxi_engine_ops sun8i_engine_ops = { .commit = sun8i_mixer_commit, - .layers_init = sun8i_layers_init, + .layers_init = sun8i_ui_init, }; static struct regmap_config sun8i_mixer_regmap_config = { diff --git a/drivers/gpu/drm/sun4i/sun8i_ui.c b/drivers/gpu/drm/sun4i/sun8i_ui.c new file mode 100644 index 000000000000..3986cb08509c --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun8i_ui.c @@ -0,0 +1,134 @@ +/* + * Copyright (C) Icenowy Zheng + * + * Based on sun4i_layer.h, which is: + * Copyright (C) 2015 Free Electrons + * Copyright (C) 2015 NextThing Co + * + * Maxime Ripard + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include +#include +#include + +#include "sun8i_ui.h" +#include "sun8i_mixer.h" + +struct sun8i_plane_desc { + enum drm_plane_type type; + const uint32_t *formats; + uint32_t nformats; +}; + +static void sun8i_mixer_ui_atomic_disable(struct drm_plane *plane, + struct drm_plane_state *old_state) +{ + struct sun8i_ui *ui = plane_to_sun8i_ui(plane); + struct sun8i_mixer *mixer = ui->mixer; + + sun8i_mixer_layer_enable(mixer, ui->id, false); +} + +static void sun8i_mixer_ui_atomic_update(struct drm_plane *plane, + struct drm_plane_state *old_state) +{ + struct sun8i_ui *ui = plane_to_sun8i_ui(plane); + struct sun8i_mixer *mixer = ui->mixer; + + sun8i_mixer_update_layer_coord(mixer, ui->id, plane); + sun8i_mixer_update_layer_formats(mixer, ui->id, plane); + sun8i_mixer_update_layer_buffer(mixer, ui->id, plane); + sun8i_mixer_layer_enable(mixer, ui->id, true); +} + +static struct drm_plane_helper_funcs sun8i_mixer_ui_helper_funcs = { + .atomic_disable = sun8i_mixer_ui_atomic_disable, + .atomic_update = sun8i_mixer_ui_atomic_update, +}; + +static const struct drm_plane_funcs sun8i_mixer_ui_funcs = { + .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, + .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, + .destroy = drm_plane_cleanup, + .disable_plane = drm_atomic_helper_disable_plane, + .reset = drm_atomic_helper_plane_reset, + .update_plane = drm_atomic_helper_update_plane, +}; + +static const uint32_t sun8i_mixer_ui_formats[] = { + DRM_FORMAT_RGB888, + DRM_FORMAT_ARGB8888, + DRM_FORMAT_XRGB8888, +}; + +static const struct sun8i_plane_desc sun8i_mixer_ui_planes[] = { + { + .type = DRM_PLANE_TYPE_PRIMARY, + .formats = sun8i_mixer_ui_formats, + .nformats = ARRAY_SIZE(sun8i_mixer_ui_formats), + }, +}; + +static struct sun8i_ui *sun8i_ui_init_one(struct drm_device *drm, + struct sun8i_mixer *mixer, + const struct sun8i_plane_desc *plane) +{ + struct sun8i_ui *ui; + int ret; + + ui = devm_kzalloc(drm->dev, sizeof(*ui), GFP_KERNEL); + if (!ui) + return ERR_PTR(-ENOMEM); + + /* possible crtcs are set later */ + ret = drm_universal_plane_init(drm, &ui->plane, 0, + &sun8i_mixer_ui_funcs, + plane->formats, plane->nformats, + NULL, plane->type, NULL); + if (ret) { + dev_err(drm->dev, "Couldn't initialize ui\n"); + return ERR_PTR(ret); + } + + drm_plane_helper_add(&ui->plane, + &sun8i_mixer_ui_helper_funcs); + ui->mixer = mixer; + + return ui; +} + +struct drm_plane **sun8i_ui_init(struct drm_device *drm, + struct sunxi_engine *engine) +{ + struct drm_plane **planes; + struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); + int i; + + planes = devm_kcalloc(drm->dev, ARRAY_SIZE(sun8i_mixer_ui_planes) + 1, + sizeof(*planes), GFP_KERNEL); + if (!planes) + return ERR_PTR(-ENOMEM); + + for (i = 0; i < ARRAY_SIZE(sun8i_mixer_ui_planes); i++) { + const struct sun8i_plane_desc *plane = &sun8i_mixer_ui_planes[i]; + struct sun8i_ui *ui; + + ui = sun8i_ui_init_one(drm, mixer, plane); + if (IS_ERR(ui)) { + dev_err(drm->dev, "Couldn't initialize %s plane\n", + i ? "overlay" : "primary"); + return ERR_CAST(ui); + }; + + ui->id = i; + planes[i] = &ui->plane; + }; + + return planes; +} diff --git a/drivers/gpu/drm/sun4i/sun8i_ui.h b/drivers/gpu/drm/sun4i/sun8i_ui.h new file mode 100644 index 000000000000..17dfc92ccc9f --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun8i_ui.h @@ -0,0 +1,36 @@ +/* + * Copyright (C) Icenowy Zheng + * + * Based on sun4i_layer.h, which is: + * Copyright (C) 2015 Free Electrons + * Copyright (C) 2015 NextThing Co + * + * Maxime Ripard + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#ifndef _SUN8I_UI_H_ +#define _SUN8I_UI_H_ + +struct sunxi_engine; + +struct sun8i_ui { + struct drm_plane plane; + struct sun4i_drv *drv; + struct sun8i_mixer *mixer; + int id; +}; + +static inline struct sun8i_ui * +plane_to_sun8i_ui(struct drm_plane *plane) +{ + return container_of(plane, struct sun8i_ui, plane); +} + +struct drm_plane **sun8i_ui_init(struct drm_device *drm, + struct sunxi_engine *engine); +#endif /* _SUN8I_UI_H_ */ From patchwork Mon Nov 27 15:41:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119729 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp438076qgn; Mon, 27 Nov 2017 07:42:25 -0800 (PST) X-Google-Smtp-Source: AGs4zMarFO/W7kV3ltg5YWb9XMDH+2iECaAi8XGaTqlOvmUyZ3Tbec94fmSztnNS7RSGbnkYQ7E1 X-Received: by 10.159.208.67 with SMTP id w3mr39517257plz.175.1511797345705; Mon, 27 Nov 2017 07:42:25 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797345; cv=none; d=google.com; s=arc-20160816; b=uXXfD5jfO0dUDjHrwaoh7K9zS36jTw3x1oIYn1ytt2mflxb3PiS9PdDruNV4eOZINP LcwIB4O5kems5XjDK6GasqXxBGkZS3Awtguj0llX9+81I3xg91xcKfVPNi31kRrLwcXd lDZmZ3gPCnW2n2lx7K+eeIHTRS/AelMeJi1yXRsmYcdIx8GocbKJ8ERJCg1afXJIfX+m 4KrkRNBuxZuQHKCoGKnalxNxNTZXPs3uTsP+aMLcxqkPetGG5dLfIi3qIb4QmW2sKV2F T0W6TUnMySLMP7DMvAsALiQcQcx6F47mNqFbNBEQtreThHSGf3vsqKLMOqKvgo6G9Fq+ hz+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=ijOOuI4oewAtoz4zr4mKLei6kyDOZ2QLa+qRhmA9Vjk=; b=bYYYVSHW2I6o0AOXYvmkux/4kUS/yboLFQ0or8uQd2BysaL6uDDo42XbDssZOiH5YX +Y5llfc8EvbqBjSlhUjPuhThmhmceZP3632yD1yk8LfQ7k5n8hVoTA6NMCvrFI1Mgfrx xDOtsCFElDwK3AKMWRx/yQ0F9qJZ6o9KO82F50oit4ffabAUKkdKadhgH2/eKSO9PVgB PCY5osW1PqyC4IDk3PqrFd151yF6W9Qpm6LT7lGnccXsWQOSmATxwZHFR88jfQy3fm79 n2T0LyQwqyNXyBJFAmpM/rzDoswESWZm4380eazDI+zEFIQQFEgFXk1DGDrk+gLEMyi4 MFKQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j6si7843312pfg.374.2017.11.27.07.42.25; Mon, 27 Nov 2017 07:42:25 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752930AbdK0PmK (ORCPT + 28 others); Mon, 27 Nov 2017 10:42:10 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:32941 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752874AbdK0PmF (ORCPT ); Mon, 27 Nov 2017 10:42:05 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id E49D5213FC; Mon, 27 Nov 2017 16:42:03 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id ACB5B213F3; Mon, 27 Nov 2017 16:42:03 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Mark Rutland , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, plaes@plaes.org, icenowy@aosc.io, Thomas Petazzoni , jernej.skrabec@siol.net Subject: [PATCH v2 08/18] drm/sun4i: Reorder and document DE2 mixer registers Date: Mon, 27 Nov 2017 16:41:32 +0100 Message-Id: X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some registers values have been hardcoded so far, or were not as descriptive as supposed to, because of missing information. The various BSP that poped up since have given us more details, some hopefully we can be more explicit about things. Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 25 ++++---- drivers/gpu/drm/sun4i/sun8i_mixer.h | 89 ++++++++++++++++-------------- 2 files changed, 63 insertions(+), 51 deletions(-) -- git-series 0.9.1 diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 648a6ad3104a..44d5e639ebb2 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -61,7 +61,7 @@ void sun8i_mixer_layer_enable(struct sun8i_mixer *mixer, struct sun8i_ui *ui, regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ui->chan, ui->id), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MASK, - SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_DEF); + SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA(255)); } static int sun8i_mixer_drm_format_to_layer(struct drm_plane *plane, @@ -329,19 +329,20 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, /* Initialize blender */ regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_FCOLOR_CTL, - SUN8I_MIXER_BLEND_FCOLOR_CTL_DEF); - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PREMULTIPLY, - SUN8I_MIXER_BLEND_PREMULTIPLY_DEF); + SUN8I_MIXER_BLEND_FCOLOR_CTL_FCOLOR_EN(0) | + SUN8I_MIXER_BLEND_FCOLOR_CTL_EN(0)); + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PREMULTIPLY, 0); regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR, - SUN8I_MIXER_BLEND_BKCOLOR_DEF); + SUN8I_MIXER_BLEND_BKCOLOR_ALPHA(255)); regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_MODE(0), - SUN8I_MIXER_BLEND_MODE_DEF); - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_CK_CTL, - SUN8I_MIXER_BLEND_CK_CTL_DEF); - - regmap_write(mixer->engine.regs, - SUN8I_MIXER_BLEND_ATTR_FCOLOR(0), - SUN8I_MIXER_BLEND_ATTR_FCOLOR_DEF); + SUN8I_MIXER_BLEND_MODE_PIXEL_FS(1) | + SUN8I_MIXER_BLEND_MODE_PIXEL_FD(3) | + SUN8I_MIXER_BLEND_MODE_ALPHA_FS(1) | + SUN8I_MIXER_BLEND_MODE_ALPHA_FD(3)); + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_CK_CTL, 0); + + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(0), + SUN8I_MIXER_BLEND_ATTR_FCOLOR_ALPHA(255)); /* Select the first UI channel */ DRM_DEBUG_DRIVER("Selecting channel %d (first UI channel)\n", diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index ce984c436246..b6512198af55 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -22,71 +22,82 @@ #define SUN8I_MIXER_COORD(x, y) ((y) << 16 | (x)) #define SUN8I_MIXER_GLOBAL_CTL 0x0 +#define SUN8I_MIXER_GLOBAL_CTL_RT_EN BIT(0) + #define SUN8I_MIXER_GLOBAL_STATUS 0x4 #define SUN8I_MIXER_GLOBAL_DBUFF 0x8 -#define SUN8I_MIXER_GLOBAL_SIZE 0xc - -#define SUN8I_MIXER_GLOBAL_CTL_RT_EN 0x1 +#define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE BIT(0) -#define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE 0x1 +#define SUN8I_MIXER_GLOBAL_SIZE 0xc #define SUN8I_MIXER_BLEND_FCOLOR_CTL 0x1000 +#define SUN8I_MIXER_BLEND_FCOLOR_CTL_EN(x) BIT(8 + (x)) +#define SUN8I_MIXER_BLEND_FCOLOR_CTL_FCOLOR_EN(x) BIT(x) + #define SUN8I_MIXER_BLEND_ATTR_FCOLOR(x) (0x1004 + 0x10 * (x) + 0x0) +#define SUN8I_MIXER_BLEND_ATTR_FCOLOR_ALPHA(x) (((x) & 0xff) << 24) + #define SUN8I_MIXER_BLEND_ATTR_INSIZE(x) (0x1004 + 0x10 * (x) + 0x4) + #define SUN8I_MIXER_BLEND_ATTR_OFFSET(x) (0x1004 + 0x10 * (x) + 0x8) #define SUN8I_MIXER_BLEND_ROUTE 0x1080 #define SUN8I_MIXER_BLEND_PREMULTIPLY 0x1084 + #define SUN8I_MIXER_BLEND_BKCOLOR 0x1088 +#define SUN8I_MIXER_BLEND_BKCOLOR_ALPHA(x) (((x) & 0xff) << 24) + #define SUN8I_MIXER_BLEND_OUTSIZE 0x108c + #define SUN8I_MIXER_BLEND_MODE(x) (0x1090 + 0x04 * (x)) +#define SUN8I_MIXER_BLEND_MODE_ALPHA_FD(x) (((x) & 0xf) << 24) +#define SUN8I_MIXER_BLEND_MODE_ALPHA_FS(x) (((x) & 0xf) << 16) +#define SUN8I_MIXER_BLEND_MODE_PIXEL_FD(x) (((x) & 0xf) << 8) +#define SUN8I_MIXER_BLEND_MODE_PIXEL_FS(x) ((x) & 0xf) + #define SUN8I_MIXER_BLEND_CK_CTL 0x10b0 #define SUN8I_MIXER_BLEND_CK_CFG 0x10b4 #define SUN8I_MIXER_BLEND_CK_MAX(x) (0x10c0 + 0x04 * (x)) #define SUN8I_MIXER_BLEND_CK_MIN(x) (0x10e0 + 0x04 * (x)) -#define SUN8I_MIXER_BLEND_OUTCTL 0x10fc - -/* The following numbers are some still unknown magic numbers */ -#define SUN8I_MIXER_BLEND_ATTR_FCOLOR_DEF 0xff000000 -#define SUN8I_MIXER_BLEND_FCOLOR_CTL_DEF 0x00000101 -#define SUN8I_MIXER_BLEND_PREMULTIPLY_DEF 0x0 -#define SUN8I_MIXER_BLEND_BKCOLOR_DEF 0xff000000 -#define SUN8I_MIXER_BLEND_MODE_DEF 0x03010301 -#define SUN8I_MIXER_BLEND_CK_CTL_DEF 0x0 -#define SUN8I_MIXER_BLEND_OUTCTL_INTERLACED BIT(1) +#define SUN8I_MIXER_BLEND_OUTCTL 0x10fc +#define SUN8I_MIXER_BLEND_OUTCTL_INTERLACED BIT(1) /* * VI channels are not used now, but the support of them may be introduced in * the future. */ -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x0) -#define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x4) -#define SUN8I_MIXER_CHAN_UI_LAYER_COORD(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x8) -#define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0xc) -#define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x10) -#define SUN8I_MIXER_CHAN_UI_LAYER_BOT_LADDR(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x14) -#define SUN8I_MIXER_CHAN_UI_LAYER_FCOLOR(ch, layer) \ - (0x2000 + 0x1000 * (ch) + 0x20 * (layer) + 0x18) -#define SUN8I_MIXER_CHAN_UI_TOP_HADDR(ch) (0x2000 + 0x1000 * (ch) + 0x80) -#define SUN8I_MIXER_CHAN_UI_BOT_HADDR(ch) (0x2000 + 0x1000 * (ch) + 0x84) -#define SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch) (0x2000 + 0x1000 * (ch) + 0x88) +#define SUN8I_MIXER_CHAN(ch) (0x2000 + 0x1000 * (ch)) +#define SUN8I_MIXER_UI_LAYER(ch, layer) (SUN8I_MIXER_CHAN(ch) + 0x20 * (layer)) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN BIT(0) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_MASK GENMASK(2, 1) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK GENMASK(11, 8) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x00) #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MASK GENMASK(31, 24) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_DEF (1 << 1) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_ARGB8888 (0 << 8) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_XRGB8888 (4 << 8) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_RGB888 (8 << 8) -#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_DEF (0xff << 24) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA(x) (0xff << 24) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK GENMASK(11, 8) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_RGB888 (8 << 8) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_XRGB8888 (4 << 8) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_ARGB8888 (0 << 8) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_MASK GENMASK(2, 1) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_ALPHA_MODE_DEF (1 << 1) +#define SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN BIT(0) + +#define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x04) +#define SUN8I_MIXER_CHAN_UI_LAYER_COORD(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x08) +#define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x0c) +#define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x10) +#define SUN8I_MIXER_CHAN_UI_LAYER_BOT_LADDR(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x14) +#define SUN8I_MIXER_CHAN_UI_LAYER_FCOLOR(ch, layer) \ + (SUN8I_MIXER_UI_LAYER(ch, layer) + 0x18) + +#define SUN8I_MIXER_CHAN_UI_TOP_HADDR(ch) (SUN8I_MIXER_CHAN(ch) + 0x80) +#define SUN8I_MIXER_CHAN_UI_BOT_HADDR(ch) (SUN8I_MIXER_CHAN(ch) + 0x84) +#define SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch) (SUN8I_MIXER_CHAN(ch) + 0x88) /* * These sub-engines are still unknown now, the EN registers are here only to From patchwork Mon Nov 27 15:41:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119727 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp437850qgn; Mon, 27 Nov 2017 07:42:14 -0800 (PST) X-Google-Smtp-Source: AGs4zMaikwaekpVfjgmL2K6L4Zbg6pQvtMM9yEuN2jjqKfIPaVMTP3KXMQ69DelQQisOKUrniZ59 X-Received: by 10.101.101.154 with SMTP id u26mr30643206pgv.416.1511797334532; Mon, 27 Nov 2017 07:42:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797334; cv=none; d=google.com; s=arc-20160816; b=fZt2lifkCQ8ui6ZyRBjqX2u1nHqauohk9iUKf93og8DKp2xxphbCawne3i17+M+Pj4 TWxIWbFs0bv1ayiyN4oJjncwIw/kP3A/GLYk+XHF4k3qXlF3VuKm6vPhNYjjTwUjqph2 32c5C8imNas+JHof2sKXicUstYasz7sPVsrLyua2MFM/zJndoPBPuQfENPx+Y/QpLXOM fEdQhqD+ZfEujx1eF6yKbelzOfvzWvhk6SbzJ0Q66sP5U0cDGA7HC0jkPpD3/Q8Y9AKl jjXSELUngj6WW81leHq4UqqeE7g3It71il4K4GYG+4LxUIt/HPCnU7cTWDFUrw5mNVtS dWdw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=ELXWN+5gDE+TYw0VdF8/sT94TAnDshJLibmoC5dqwMs=; b=AQxx89R8UTYv0oui3VqwkNWIF1hR0iqAuxVTkty0V9DJfLNtnxrYyhfjD2Y3R7oIIe 4jp/8ICk/F35ZS3DktoVAdzM6OMKkaIL3am0xI3YXubz8f331gxbPdvjBWlzNTmuv7YD r4+O5Ovw0D+QauFzduwKiYHJump030UkjtLPnj6CW39qR/4mhwZtFYdkdz9ZhoqhEt63 OdflavlKFNA0t6chECQvBMBkDXXExcft/pqLwMQ03j6NnlGnN3N6YRqjoKROf6O621FY 9xGqUCp4kImc9ffAJiKgsbi6CPeqXWryzBP5j8o0X3IkWYWcH9pGYJuloRndTqCVZpGp Rihw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j6si7843312pfg.374.2017.11.27.07.42.14; Mon, 27 Nov 2017 07:42:14 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752949AbdK0PmM (ORCPT + 28 others); Mon, 27 Nov 2017 10:42:12 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:32915 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752884AbdK0PmG (ORCPT ); Mon, 27 Nov 2017 10:42:06 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id 7C17D213FE; Mon, 27 Nov 2017 16:42:04 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id 447ED213FB; Mon, 27 Nov 2017 16:42:04 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Mark Rutland , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, plaes@plaes.org, icenowy@aosc.io, Thomas Petazzoni , jernej.skrabec@siol.net Subject: [PATCH v2 09/18] drm/sun4i: Create minimal multipliers and dividers Date: Mon, 27 Nov 2017 16:41:33 +0100 Message-Id: X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The various outputs the TCON can provide have different constraints on the dotclock divider. Let's make them configurable by the various mode_set functions. Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun4i_dotclock.c | 10 +++++++--- drivers/gpu/drm/sun4i/sun4i_tcon.c | 2 ++ drivers/gpu/drm/sun4i/sun4i_tcon.h | 2 ++ 3 files changed, 11 insertions(+), 3 deletions(-) -- git-series 0.9.1 diff --git a/drivers/gpu/drm/sun4i/sun4i_dotclock.c b/drivers/gpu/drm/sun4i/sun4i_dotclock.c index d401156490f3..023f39bda633 100644 --- a/drivers/gpu/drm/sun4i/sun4i_dotclock.c +++ b/drivers/gpu/drm/sun4i/sun4i_dotclock.c @@ -17,8 +17,9 @@ #include "sun4i_dotclock.h" struct sun4i_dclk { - struct clk_hw hw; - struct regmap *regmap; + struct clk_hw hw; + struct regmap *regmap; + struct sun4i_tcon *tcon; }; static inline struct sun4i_dclk *hw_to_dclk(struct clk_hw *hw) @@ -73,11 +74,13 @@ static unsigned long sun4i_dclk_recalc_rate(struct clk_hw *hw, static long sun4i_dclk_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { + struct sun4i_dclk *dclk = hw_to_dclk(hw); + struct sun4i_tcon *tcon = dclk->tcon; unsigned long best_parent = 0; u8 best_div = 1; int i; - for (i = 6; i <= 127; i++) { + for (i = tcon->dclk_min_div; i <= tcon->dclk_max_div; i++) { unsigned long ideal = rate * i; unsigned long rounded; @@ -167,6 +170,7 @@ int sun4i_dclk_create(struct device *dev, struct sun4i_tcon *tcon) dclk = devm_kzalloc(dev, sizeof(*dclk), GFP_KERNEL); if (!dclk) return -ENOMEM; + dclk->tcon = tcon; init.name = clk_name; init.ops = &sun4i_dclk_ops; diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index f4284b51bdca..5b6cd7c43e4b 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -177,6 +177,8 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, u8 clk_delay; u32 val = 0; + tcon->dclk_min_div = 6; + tcon->dclk_max_div = 127; sun4i_tcon0_mode_set_common(tcon, mode); /* Adjust clock delay */ diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index f61bf6d83b4a..4141fbd97ddf 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -169,6 +169,8 @@ struct sun4i_tcon { /* Pixel clock */ struct clk *dclk; + u8 dclk_max_div; + u8 dclk_min_div; /* Reset control */ struct reset_control *lcd_rst; From patchwork Mon Nov 27 15:41:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119722 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp437578qgn; Mon, 27 Nov 2017 07:42:02 -0800 (PST) X-Google-Smtp-Source: AGs4zMZSpar+d8A5W69BLlDbTVVLiIkyTp56tS+qINd2QbU/lRbblj+21JTQGu7YIolpmCSe4W0K X-Received: by 10.98.153.221 with SMTP id t90mr31070947pfk.210.1511797322730; Mon, 27 Nov 2017 07:42:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797322; cv=none; d=google.com; s=arc-20160816; b=h97b02AmaG0L0H7ly7EfANKr0e+8DX8b1KmhvG1uCPCVm3ffPwaiuBuM/bWz7WZq4B REq8bDV5Lg4WtRwNOU4ZLloJtpoRkGKY36/IYNtfLGwD/gwub2AqzTtnSQTJo9Sgx4lr LMnEFbZ/55Q5vUnoleaZZzbZOpzwTDRkK0hjDNmVJ6pjKjtRY/8ihPJFNikUh4/fPgQ+ KZesHY73O/1XGUZypPe/eYdm2DRnL5Lexy24c8yZQcoqoZIJKTywbxr8ob7f5RJ3WNnS RTzI46+u/HwzKT3ufOXhKow8nCR7wLueTITltkdWOX73dkqYUA7Rv8OLGJ9JClo8Bl2M 19Ew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=yqpyn2ZzrPulvSWi288wwgSL9LFyQZXmzRHmKniWF+g=; b=AYjLpnj3ctOjhvZhWny3qU99WmYL3pwloxlN0LvYJ2j53YA/58ySGtoi1G2drMl2qb hd1VnJzpigI8sXjcR1lbgqAPzozCBW4UdSG9ebMR4KlakTxeLK++IX+9FNg8vJ7brS1u lzAF+QHD8i+WEPsyKsbkGQGfLrJmwHrGiB8NaBE6e3/E4OUvycapeA5MctwAgo0UPnXS /PTOeA2OBiRuyps3OGdXAnneVrXUvfvtvySlWFYoIknwq5zpE3BAbx8ZrlNyyIjJhVSU fbONclDlbc1YFtR9iZnQkS6y4IGKPeSdRllWZgRG5H2oNG1Air/zmRZBQBZhTGGekvac SXmQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o5si25718513pfh.412.2017.11.27.07.42.02; Mon, 27 Nov 2017 07:42:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752834AbdK0PmA (ORCPT + 28 others); Mon, 27 Nov 2017 10:42:00 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:32901 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752589AbdK0Pl5 (ORCPT ); Mon, 27 Nov 2017 10:41:57 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id D4FAC20900; Mon, 27 Nov 2017 16:41:55 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id A10C42081A; Mon, 27 Nov 2017 16:41:55 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Mark Rutland , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, plaes@plaes.org, icenowy@aosc.io, Thomas Petazzoni , jernej.skrabec@siol.net Subject: [PATCH v2 12/18] drm/sun4i: Add A83T support Date: Mon, 27 Nov 2017 16:41:36 +0100 Message-Id: <3a7cfb438e479000986948caf3c14461be6bbe40.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for the A83T display pipeline. Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- git-series 0.9.1 diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 5a1376965270..83b83e070fd5 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -388,6 +388,11 @@ static int sun8i_mixer_remove(struct platform_device *pdev) return 0; } +static const struct sun8i_mixer_cfg sun8i_a83t_mixer_cfg = { + .vi_num = 1, + .ui_num = 3, +}; + static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = { .vi_num = 2, .ui_num = 1, @@ -396,7 +401,7 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = { static const struct of_device_id sun8i_mixer_of_table[] = { { .compatible = "allwinner,sun8i-a83t-de2-mixer", - .data = &sun8i_v3s_mixer_cfg, + .data = &sun8i_a83t_mixer_cfg, }, { .compatible = "allwinner,sun8i-v3s-de2-mixer", From patchwork Mon Nov 27 15:41:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119725 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp437707qgn; Mon, 27 Nov 2017 07:42:07 -0800 (PST) X-Google-Smtp-Source: AGs4zMZeKS66gJIklczjNH95akFC0jYJV0HWMMfA8LFxYJJU+BmRMJMu3Y3aGb18yjJj0U5am4Uk X-Received: by 10.159.254.22 with SMTP id r22mr38813556pls.84.1511797327676; Mon, 27 Nov 2017 07:42:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797327; cv=none; d=google.com; s=arc-20160816; b=o7KKQVfyOhqITRAwZTWSFSGvSnHYDYLxexTK6c7PVum96+893i4ZqapfiDzibpLicu sJVtmXf4BKZBEejl7pic6AfK1uHfgWMTpVpVSqLM+2k4rkuvG4v8Dybe2zUqAf0Emqsv vtDTa2mQXLfpQz5hS0FXgEm/5mYIE/M54TABTIMXntxGAV3ariNWuvcnK/iIVGpAZAfa v8rTkfpFN+EcyrUF1Jq562X5Ktsho6JR7xDhPwTeq7zKb7+ILwmGWBZ9+H6MyGWSlGIA OzLlc5/Xh9590/Z0I8cBm7Iux6ReDFnXUPLZtsoi43He2ueALn/BI71s3MVjdaZ/Xfl0 lTqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=eTOAUKar1gszCeRHAukg9VBQmmAh9YuewSu4JoZMWEk=; b=n+EyEdmoIgI6+OZzRC2ssajKNGlrtxCHVwc/9ehLbBBKosIXr5YQreVvEFnYrgXE9I LhwnWKwfob5bqpIzmTJAIBjbWBKEm6NP4Bd8zZClAn3nZ3QwmJ1yZ9YMDl/DRL9PkzHc 09hXGiwxTkuq+vnHatzNglnmdSXk0AfUTRUvLc59TqosCWEsonys2DcoBZDJc3vvLH31 p+9cC/FDMd2rXkRnVvJMPbtUrBoI+eGMKXNAM4jNXKlM6Nbz2pdk/CfKoyDsJECruDTr 9aOLslKOui/+b3Kx6cAPm1uVjA9LFQ/XEfANLvFOWzs3NYTSwwO2R13dfDkL5Dp1nOMk XyQw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o5si25718513pfh.412.2017.11.27.07.42.07; Mon, 27 Nov 2017 07:42:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752897AbdK0PmF (ORCPT + 28 others); Mon, 27 Nov 2017 10:42:05 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:32915 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752822AbdK0PmA (ORCPT ); Mon, 27 Nov 2017 10:42:00 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id ACDCE212A2; Mon, 27 Nov 2017 16:41:58 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id 7D08A20B52; Mon, 27 Nov 2017 16:41:58 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Mark Rutland , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, plaes@plaes.org, icenowy@aosc.io, Thomas Petazzoni , jernej.skrabec@siol.net Subject: [PATCH v2 17/18] ARM: dts: sun8i: a711: Reinstate the PMIC compatible Date: Mon, 27 Nov 2017 16:41:41 +0100 Message-Id: <97e9c55836808d869f962c376f30d17b774f2251.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When we added the regulator support in commit 90c5d7cdae64 ("ARM: dts: sun8i: a711: Add regulator support"), we also dropped the PMIC's compatible. Since it's not in the PMIC DTSI, unlike most other PMIC DTSI, it obviously wasn't probing anymore. Re-add it so that everything works again. Fixes: 90c5d7cdae64 ("ARM: dts: sun8i: a711: Add regulator support") Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 1 + 1 file changed, 1 insertion(+) -- git-series 0.9.1 diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts index 98715538932f..a021ee6da396 100644 --- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts +++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts @@ -146,6 +146,7 @@ status = "okay"; axp81x: pmic@3a3 { + compatible = "x-powers,axp813"; reg = <0x3a3>; interrupt-parent = <&r_intc>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; From patchwork Mon Nov 27 15:41:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 119724 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp437670qgn; Mon, 27 Nov 2017 07:42:06 -0800 (PST) X-Google-Smtp-Source: AGs4zMZ4zcUPQBwNLGbfIEpg7PQ+YqehJxCHBVCmXLp129eYwC7qIsT+oGOPQIjtaurD+HeQ8Fq6 X-Received: by 10.159.251.140 with SMTP id m12mr39443206pls.199.1511797325999; Mon, 27 Nov 2017 07:42:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511797325; cv=none; d=google.com; s=arc-20160816; b=yoqYXo/quKeX/iYmyeqQqm6nU2/1htDwzMT2SQ8Lh2Q7NlapaT0I5XD2xq52Eo9IJt l3MWok0OBmZJQ24c2jtkjK+36VJNsaiJ6sMM3t9aVvUe2BvhFRWBeybD83MaE0HVA+Ag 7YgcAs9EPHz+kpLV1tnBvR+ZlgG8pPvHLMy5Ui0K6XXC66VpsjDvFzoPZpAF2VldRK6b mYUsGmJguCi7J0H9NYnkuHcLHyHFCAgBWohz0ToCq0VrNfbg/g1OGGgxmiDnTsWmbTou 7QJ/Y6E9O/zbt06No+LBt4kzjQjFzQBGBhdCcrhI+giNfHgtQ9ucNH44rcrh3+jUh73u wUmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=GFijbjOXkyLMwgN0kkXRkmLD2rUuyKHJmlF6LdopYp8=; b=ocfTxmw5ESuy7A7bUXdL+RpyQ5ITsybVocn8R4qSb9K7QQcp5XfILvsS5b1FSL1fTu RYcdjKdTihGJnGLvFm47uiZNik/j0Nan0hplBjiv4Rr3/qS8VHTwbOVF5XT5PwdIlys7 PNNkTvjARXhVmoyLg7GrWhwFpQJpAn1PN/Hrus38q/c5eIoMiSOrFqUnY4enPh8JoIlZ 3XKo1tA60GKDkYEdD/+yARvDqtKW9qAdDnOMUgEpRbOhbsMULMZVlj6q1qB9uoKEAmbU eyDNKzROiX5mtRHZtXXIWOy66CQQ9g6fkfh3yC9ydFQB/n65cLrIrTUVRefuSrX8m3mr 0urA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id o5si25718513pfh.412.2017.11.27.07.42.05; Mon, 27 Nov 2017 07:42:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752870AbdK0PmE (ORCPT + 28 others); Mon, 27 Nov 2017 10:42:04 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:32922 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752832AbdK0PmA (ORCPT ); Mon, 27 Nov 2017 10:42:00 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id 6CC1C213D6; Mon, 27 Nov 2017 16:41:59 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (unknown [185.94.189.187]) by mail.free-electrons.com (Postfix) with ESMTPSA id 1619620DD4; Mon, 27 Nov 2017 16:41:59 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Mark Rutland , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, plaes@plaes.org, icenowy@aosc.io, Thomas Petazzoni , jernej.skrabec@siol.net Subject: [PATCH v2 18/18] ARM: dts: sun8i: a711: Enable the LCD Date: Mon, 27 Nov 2017 16:41:42 +0100 Message-Id: <1a9c9ec49f2b0c55e9a72205e87474a0bc34d9f7.1511797218.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The A711 has 1024x600 LVDS panel, with a PWM-based backlight. Add it to our DT. Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 61 ++++++++++++++++++++++++- 1 file changed, 61 insertions(+) -- git-series 0.9.1 diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts index a021ee6da396..511fca491fe8 100644 --- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts +++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts @@ -45,6 +45,7 @@ #include "sun8i-a83t.dtsi" #include +#include / { model = "TBS A711 Tablet"; @@ -59,6 +60,44 @@ stdout-path = "serial0:115200n8"; }; + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + enable-gpios = <&pio 3 29 GPIO_ACTIVE_HIGH>; + + brightness-levels = <0 1 2 4 8 16 32 64 128 255>; + default-brightness-level = <9>; + }; + + panel { + compatible = "tbs,a711-panel", "panel-lvds"; + backlight = <&backlight>; + power-supply = <®_sw>; + + width-mm = <153>; + height-mm = <90>; + data-mapping = "vesa-24"; + + panel-timing { + /* 1024x600 @60Hz */ + clock-frequency = <52000000>; + hactive = <1024>; + vactive = <600>; + hsync-len = <20>; + hfront-porch = <180>; + hback-porch = <160>; + vfront-porch = <12>; + vback-porch = <23>; + vsync-len = <5>; + }; + + port { + panel_input: endpoint { + remote-endpoint = <&tcon0_out_lcd>; + }; + }; + }; + reg_vbat: reg-vbat { compatible = "regulator-fixed"; regulator-name = "vbat"; @@ -89,6 +128,10 @@ }; }; +&de { + status = "okay"; +}; + /* * An USB-2 hub is connected here, which also means we don't need to * enable the OHCI controller. @@ -142,6 +185,12 @@ status = "okay"; }; +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pin>; + status = "okay"; +}; + &r_rsb { status = "okay"; @@ -323,6 +372,18 @@ regulator-name = "vcc-lcd"; }; +&tcon0 { + pinctrl-names = "default"; + pinctrl-0 = <&lcd_lvds_pins>; +}; + +&tcon0_out { + tcon0_out_lcd: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_input>; + }; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>;