From patchwork Fri Mar 3 21:48:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 94871 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp443117qgd; Fri, 3 Mar 2017 13:55:51 -0800 (PST) X-Received: by 10.84.238.9 with SMTP id u9mr7438737plk.174.1488578151086; Fri, 03 Mar 2017 13:55:51 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l3si11644861pgl.298.2017.03.03.13.55.50; Fri, 03 Mar 2017 13:55:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752183AbdCCVza (ORCPT + 13 others); Fri, 3 Mar 2017 16:55:30 -0500 Received: from mail-pg0-f42.google.com ([74.125.83.42]:33169 "EHLO mail-pg0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752156AbdCCVz1 (ORCPT ); Fri, 3 Mar 2017 16:55:27 -0500 Received: by mail-pg0-f42.google.com with SMTP id 25so47981687pgy.0 for ; Fri, 03 Mar 2017 13:55:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5ncIq3rOLiB5juXFGE67wrPM3sZL99bwDsgIi3smaAE=; b=UjGy1cq99ShJcycz+vs3Im0FXaLOMNhLqhp8Xpv1XHbZxoWMa7DdgaXbG6xRZ7FVft 4x0bOahvRyg009zmQah9Fq6RAaq7DmqSOccfRUtfIyUaqOCYE9teQlc6PpFK0zKsZLw7 x2pn1setm/sejj/46x1sDQO/JEu+jRv1obMFU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=5ncIq3rOLiB5juXFGE67wrPM3sZL99bwDsgIi3smaAE=; b=TgdNyasbuJBCYOcJP2sCQEdpuHUne0YqQLUUGXVoSGuvkpyUd6XIS0O+5fY+tKtZKo Z5G4hB34IDYjhpOKQnmI+YBQupwaTSwSlLG3CkvO8TtQ7i+bH7a9JzejCVVRZqJ3LME9 +gC94k8alrNxLM5SNsvgo5gdfXGgmBsSAmsstOizb8anviK3XgHA/HYGh7kUD3q60RB0 2p2q/TTwAMSXVF0dxWATdVIdNbkQ3DJXVaqVsyMbuJNPKDUQfZnCUTJGENBNlXDjCsSX fW/iJRo0TTcXn8jpwMkNlPyLi2qWCJEVu/LXh0f9uDUdn/X8cQwVXbfgxMIKh/kLli1z sBvA== X-Gm-Message-State: AMke39lWZKoFDAyrdnB7UvWQrsK+zlV95NZv6L2dbsali08AYLAlG3uv8DK8Dt4wWqp7cfHh X-Received: by 10.99.6.76 with SMTP id 73mr5919377pgg.83.1488577704619; Fri, 03 Mar 2017 13:48:24 -0800 (PST) Received: from ubuntu.localdomain (i-global254.qualcomm.com. [199.106.103.254]) by smtp.gmail.com with ESMTPSA id q23sm25200585pfg.63.2017.03.03.13.48.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 03 Mar 2017 13:48:23 -0800 (PST) From: Lina Iyer To: ulf.hansson@linaro.org, khilman@kernel.org, rjw@rjwysocki.net, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: andy.gross@linaro.org, sboyd@codeaurora.org, linux-arm-msm@vger.kernel.org, brendan.jackman@arm.com, lorenzo.pieralisi@arm.com, sudeep.holla@arm.com, Juri.Lelli@arm.com, Lina Iyer Subject: [PATCH V5 1/6] drivers: cpuidle: Read CPU's idle state from PM domain Date: Fri, 3 Mar 2017 13:48:12 -0800 Message-Id: <1488577697-127445-2-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488577697-127445-1-git-send-email-lina.iyer@linaro.org> References: <1488577697-127445-1-git-send-email-lina.iyer@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Currently CPUs idle states and idle states of its parent are represented in a flattened model by the cpu-dile-states property of the CPU node. The CPUs idle states are followed by its cluster idle states. With the introduction of CPU PM domains, the CPUs and domain idle states may be represented hierarchically as part of the domain DT definition. This would mean presenting idle state information in 2 places - CPU nodes for the CPU and the cluster's with the PM domains. Also, it makes sense to define domains around each individual CPU since each of them is a power domain in its own right. The CPU idle states can now be represented as its domain's idle state, defined by the domain-idle-states property. This avoids presenting idle states in multiple places in the DT. Modify the DT-based cpuidle driver to check for the presence of a CPU's domain and if present read the domain-idle-states of the PM domain and if the CPU's domain is absent, revert to reading in the cpu-idle-states property of the CPU DT node. Suggested-by: Sudeep Holla Signed-off-by: Lina Iyer --- drivers/cpuidle/dt_idle_states.c | 38 +++++++++++++++++++++++++++++++++++--- 1 file changed, 35 insertions(+), 3 deletions(-) -- 2.7.4 diff --git a/drivers/cpuidle/dt_idle_states.c b/drivers/cpuidle/dt_idle_states.c index ffca4fc..4df7d45 100644 --- a/drivers/cpuidle/dt_idle_states.c +++ b/drivers/cpuidle/dt_idle_states.c @@ -98,6 +98,39 @@ static int init_state_node(struct cpuidle_state *idle_state, } /* + * Get the state node at @idx. State node may be defined as domain's idle state + * if the CPU has its own domain or defined as CPU's idle state if it doesn't + * have a domain provider. + */ +static struct device_node *get_state_node(struct device_node *cpu_node, + unsigned int idx) +{ + struct device_node *dn; + bool cpu_has_domain = false; + struct of_phandle_args args; + const char *property; + int err; + + err = of_parse_phandle_with_args(cpu_node, "power-domains", + "#power-domain-cells", 0, &args); + if (!err) { + dn = args.np; + err = of_count_phandle_with_args(dn, "domain-idle-states", + NULL); + cpu_has_domain = (err > 0); + } + + if (cpu_has_domain) { + property = "domain-idle-states"; + } else { + property = "cpu-idle-states"; + dn = cpu_node; + } + + return of_parse_phandle(dn, property, idx); +} + +/* * Check that the idle state is uniform across all CPUs in the CPUidle driver * cpumask */ @@ -118,8 +151,7 @@ static bool idle_state_valid(struct device_node *state_node, unsigned int idx, for (cpu = cpumask_next(cpumask_first(cpumask), cpumask); cpu < nr_cpu_ids; cpu = cpumask_next(cpu, cpumask)) { cpu_node = of_cpu_device_node_get(cpu); - curr_state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - idx); + curr_state_node = get_state_node(cpu_node, idx); if (state_node != curr_state_node) valid = false; @@ -176,7 +208,7 @@ int dt_init_idle_driver(struct cpuidle_driver *drv, cpu_node = of_cpu_device_node_get(cpumask_first(cpumask)); for (i = 0; ; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + state_node = get_state_node(cpu_node, i); if (!state_node) break; From patchwork Fri Mar 3 21:48:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 94870 Delivered-To: patch@linaro.org Received: by 10.140.82.71 with SMTP id g65csp443010qgd; Fri, 3 Mar 2017 13:55:30 -0800 (PST) X-Received: by 10.84.131.33 with SMTP id 30mr7327995pld.45.1488578130596; Fri, 03 Mar 2017 13:55:30 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n21si11694599pgj.18.2017.03.03.13.55.30; Fri, 03 Mar 2017 13:55:30 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752159AbdCCVz3 (ORCPT + 13 others); Fri, 3 Mar 2017 16:55:29 -0500 Received: from mail-pg0-f48.google.com ([74.125.83.48]:35780 "EHLO mail-pg0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752110AbdCCVz1 (ORCPT ); Fri, 3 Mar 2017 16:55:27 -0500 Received: by mail-pg0-f48.google.com with SMTP id b129so47944836pgc.2 for ; Fri, 03 Mar 2017 13:54:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=HnX1R2U+zkFRnQ0FKBS4rl+0aVREUPJZAkkad61JZWI=; b=NVM1upbohj4s4XdP5+BCGjy3lCfII8PeDds/0GVCQkDE9T4p9VD6HUDt/tY1wsBf+7 B5adDrAxwih8Vx2whMp10sUH+gaAczuFJ2f50jCkqhnI2qMZltB463FETo4YxJ08zqam QIN3OANXZnfQOngC21V47FE5cg8DiJAU5tkNM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HnX1R2U+zkFRnQ0FKBS4rl+0aVREUPJZAkkad61JZWI=; b=TKIp6QRAFUanJ4MjRf3ZfPTm2BBSP3zltDmwg2I3zicUZkujaNbl7eD/021WFLgWDe 9yxmXBvR5YbDOuk+pj4/GuSDPaPyaa0C0U+p8PW3oM8wVVfSxuxO6NSLJ4nGO8ixEpNr 0/M5hz0SxfCGSqsb8LxgtbilIBrl9odtky3D7LFacvHjvlnNkfjW/b5mv3KKaGaHEM6K KX8WfcO9cklQ4yND482a/JDchNYLYcvDl/oGsL19CDwmqzwUPT7qaMLOBDUqU5w64xy4 I/Toi/HRFRh5BfwGkbiWxyznf/mqiYNhzYmwURqytSU2GhyPUU29eBVfG9UGwGg3HMRm /GiA== X-Gm-Message-State: AMke39m8qwkKbUKwl8RgXF1iaogGLpYjqg/pF7QIFSzjBvMlt09pDlzkqv7C1Zj85oj3pi1k X-Received: by 10.99.94.198 with SMTP id s189mr6066824pgb.211.1488577709380; Fri, 03 Mar 2017 13:48:29 -0800 (PST) Received: from ubuntu.localdomain (i-global254.qualcomm.com. [199.106.103.254]) by smtp.gmail.com with ESMTPSA id q23sm25200585pfg.63.2017.03.03.13.48.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 03 Mar 2017 13:48:28 -0800 (PST) From: Lina Iyer To: ulf.hansson@linaro.org, khilman@kernel.org, rjw@rjwysocki.net, linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: andy.gross@linaro.org, sboyd@codeaurora.org, linux-arm-msm@vger.kernel.org, brendan.jackman@arm.com, lorenzo.pieralisi@arm.com, sudeep.holla@arm.com, Juri.Lelli@arm.com, Lina Iyer , Mark Rutland Subject: [PATCH V5 3/6] drivers: firmware: psci: Support cluster idle states for OS-Initiated Date: Fri, 3 Mar 2017 13:48:14 -0800 Message-Id: <1488577697-127445-4-git-send-email-lina.iyer@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1488577697-127445-1-git-send-email-lina.iyer@linaro.org> References: <1488577697-127445-1-git-send-email-lina.iyer@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org PSCI OS initiated firmware may allow Linux to determine the state of the CPU cluster and the cluster at coherency level to enter idle states when there are no active CPUs. Since Linux has a better idea of the QoS and the wakeup pattern of the CPUs, the cluster idle states may be better determined by the OS instead of the firmware. The last CPU entering idle in a cluster, is responsible for selecting the state of the cluster. Only one CPU in a cluster may provide the cluster idle state to the firmware. Similarly, the last CPU in the system may provide the state of the coherency domain along with the cluster and the CPU state IDs. Utilize the CPU PM domain framework's helper functions to build up the hierarchy of cluster topology using Generic PM domains. We provide callbacks for domain power_on and power_off. By appending the state IDs at each domain level in the -power_off() callbacks, we build up a composite state ID that can be passed onto the firmware to idle the CPU, the cluster and the coherency interface. Cc: Lorenzo Pieralisi Cc: Mark Rutland Signed-off-by: Lina Iyer --- drivers/firmware/psci.c | 93 +++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 90 insertions(+), 3 deletions(-) -- 2.7.4 diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index ec922b8..18ae62d 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -54,6 +55,18 @@ */ static int resident_cpu = -1; static bool psci_has_osi; +static bool psci_has_osi_pd; +static DEFINE_PER_CPU(u32, cluster_state_id); + +static inline u32 psci_get_composite_state_id(u32 cpu_state) +{ + return cpu_state | this_cpu_read(cluster_state_id); +} + +static inline void psci_reset_composite_state_id(void) +{ + this_cpu_write(cluster_state_id, 0); +} bool psci_tos_resident_on(int cpu) { @@ -180,6 +193,8 @@ static int psci_cpu_on(unsigned long cpuid, unsigned long entry_point) fn = psci_function_id[PSCI_FN_CPU_ON]; err = invoke_psci_fn(fn, cpuid, entry_point, 0); + /* Reset CPU cluster states */ + psci_reset_composite_state_id(); return psci_to_linux_errno(err); } @@ -251,6 +266,27 @@ static int __init psci_features(u32 psci_func_id) #ifdef CONFIG_CPU_IDLE static DEFINE_PER_CPU_READ_MOSTLY(u32 *, psci_power_state); +static bool psci_suspend_mode_is_osi; + +static int psci_set_suspend_mode_osi(bool enable) +{ + int ret; + int mode; + + if (enable && !psci_has_osi) + return -ENODEV; + + if (enable == psci_suspend_mode_is_osi) + return 0; + + mode = enable ? PSCI_1_0_SUSPEND_MODE_OSI : PSCI_1_0_SUSPEND_MODE_PC; + ret = invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, + mode, 0, 0); + if (!ret) + psci_suspend_mode_is_osi = enable; + + return psci_to_linux_errno(ret); +} static int psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) { @@ -353,6 +389,39 @@ static int __maybe_unused psci_acpi_cpu_init_idle(unsigned int cpu) } #endif +static int psci_pd_populate_state_data(struct device_node *np, u32 *param) +{ + return of_property_read_u32(np, "arm,psci-suspend-param", param); +} + +static int psci_pd_power_off(u32 idx, u32 param, const struct cpumask *mask) +{ + __this_cpu_add(cluster_state_id, param); + return 0; +} + +const struct cpu_pd_ops psci_pd_ops = { + .populate_state_data = psci_pd_populate_state_data, + .power_off = psci_pd_power_off, +}; + +static int psci_cpu_osi_pd_init(int cpu) +{ + int ret; + + if (!psci_has_osi_pd) + return 0; + + ret = of_setup_cpu_pd_single(cpu, &psci_pd_ops); + if (!ret) { + ret = psci_set_suspend_mode_osi(true); + if (ret) + pr_warn("CPU%d: Error setting PSCI OSI mode\n", cpu); + } + + return ret; +} + int psci_cpu_init_idle(unsigned int cpu) { struct device_node *cpu_node; @@ -368,6 +437,10 @@ int psci_cpu_init_idle(unsigned int cpu) if (!acpi_disabled) return psci_acpi_cpu_init_idle(cpu); + ret = psci_cpu_osi_pd_init(cpu); + if (ret) + return ret; + cpu_node = of_get_cpu_node(cpu, NULL); if (!cpu_node) return -ENODEV; @@ -382,15 +455,17 @@ int psci_cpu_init_idle(unsigned int cpu) static int psci_suspend_finisher(unsigned long index) { u32 *state = __this_cpu_read(psci_power_state); + u32 ext_state = psci_get_composite_state_id(state[index - 1]); - return psci_ops.cpu_suspend(state[index - 1], - virt_to_phys(cpu_resume)); + return psci_ops.cpu_suspend(ext_state, virt_to_phys(cpu_resume)); } int psci_cpu_suspend_enter(unsigned long index) { int ret; u32 *state = __this_cpu_read(psci_power_state); + u32 ext_state = psci_get_composite_state_id(state[index - 1]); + /* * idle state index 0 corresponds to wfi, should never be called * from the cpu_suspend operations @@ -399,10 +474,16 @@ int psci_cpu_suspend_enter(unsigned long index) return -EINVAL; if (!psci_power_state_loses_context(state[index - 1])) - ret = psci_ops.cpu_suspend(state[index - 1], 0); + ret = psci_ops.cpu_suspend(ext_state, 0); else ret = cpu_suspend(index, psci_suspend_finisher); + /* + * Clear the CPU's cluster states, we start afresh after coming + * out of idle. + */ + psci_reset_composite_state_id(); + return ret; } @@ -610,6 +691,7 @@ static int __init psci_0_1_init(struct device_node *np) static int __init psci_1_0_init(struct device_node *np) { + struct device_node *dn; int ret; ret = psci_0_2_init(np); @@ -621,6 +703,11 @@ static int __init psci_1_0_init(struct device_node *np) if (ret & PSCI_1_0_OS_INITIATED) { if (!psci_features(PSCI_1_0_FN_SET_SUSPEND_MODE)) psci_has_osi = true; + /* Check if we power domains defined in the PSCI node */ + dn = of_find_node_with_property(np, "#power-domain-cells"); + if (dn) + psci_has_osi_pd = true; + of_node_put(dn); } return 0;