From patchwork Wed Oct 21 22:46:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 297228 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1509BC4363A for ; Wed, 21 Oct 2020 22:46:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AC420221F9 for ; Wed, 21 Oct 2020 22:46:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="QTnweYnC" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2506906AbgJUWqY (ORCPT ); Wed, 21 Oct 2020 18:46:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2506896AbgJUWqX (ORCPT ); Wed, 21 Oct 2020 18:46:23 -0400 Received: from mail-pg1-x544.google.com (mail-pg1-x544.google.com [IPv6:2607:f8b0:4864:20::544]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A33D2C0613CE for ; Wed, 21 Oct 2020 15:46:23 -0700 (PDT) Received: by mail-pg1-x544.google.com with SMTP id r10so2356310pgb.10 for ; Wed, 21 Oct 2020 15:46:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=Yl4Y/ZzUqbDL5fTVWgJ1VesNcpeRsTPqSs1TyvB5H2Y=; b=QTnweYnCBSxbl9b89sHHA2Js7kV+ZTm0DcM5UkLUlAzkP0Pvld2y1wtens9HEwZGsT rppkETMLwVDexknu09JBjcK2bQi32XeHHAdP0oXwyl3PgSC/f3vT/jaGQ9TbJnKjKQbu xFmU0G/uOkVUNlr/tJdp0sJpzYpF5AwfWrIhoObgpmx6sCswvaeGPSYvHGjLKwqKr2p+ G8uJ74VHjlCOXrZ+koqFK747eem/sP7Qsv/zNFxeE9EPIZ72o6Mky9Acdto/ZpJ4XYGa EN7Vnmt8xh7wNGutYiFuhZPJJWUnt3Zc1Iv/aoVaT8OP5xS65wDKh/i77rxbk2YKMwUX TH4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Yl4Y/ZzUqbDL5fTVWgJ1VesNcpeRsTPqSs1TyvB5H2Y=; b=GpnBdadH0TOUnR9iNtzN/IzdENPPqJkjqhklq1thBlZVff9XWURpWwheEn0SYvqL5W 2jkJpOVOmxvK3gqfCU2OjRE2najmJItnoQxw/uXXVQXzvKCGm3WiFfoBiep/2oH9hkl5 H20cEeqdcAl+tqNm9q5w3pkavQ7G0O2J6qc7sUbC5+qfVT+LulhXqIQ/a8LwALzAzygX /zsd867infXMETIvUGQ4uJhq8eh4PZRfucTCd0Oncwo2nWhYfKjbvlJHerLQZkG7TON2 eL4sBPmYERBQ5ld5HF+8GVhTtmDbWRcOwmSNGWW7Ra1G39KJPNus6dD68t8GMcaXN+My Sp/A== X-Gm-Message-State: AOAM533hApi9dfemXbagT4d3h8D8pWRasIGa7rvVWgKV50jjRQURmx4w f0lf1rO7Ge0orN84Rf3lFxxY5A== X-Google-Smtp-Source: ABdhPJxO62PrV4abUHN2Yj7VIbT+tfAB3XC9h3CbEu9WwUuD0xeTMCm+GIrU1xeH1Fnju0TRZ9UIdg== X-Received: by 2002:a62:e308:0:b029:152:8cc3:ebdc with SMTP id g8-20020a62e3080000b02901528cc3ebdcmr153798pfh.42.1603320383159; Wed, 21 Oct 2020 15:46:23 -0700 (PDT) Received: from localhost.localdomain ([2601:1c2:680:1319:692:26ff:feda:3a81]) by smtp.gmail.com with ESMTPSA id q123sm3327432pfq.56.2020.10.21.15.46.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Oct 2020 15:46:22 -0700 (PDT) From: John Stultz To: lkml Cc: Yu Chen , Felipe Balbi , Tejas Joglekar , Yang Fei , YongQin Liu , Andrzej Pietrasiewicz , Thinh Nguyen , Jun Li , Mauro Carvalho Chehab , Greg Kroah-Hartman , linux-usb@vger.kernel.org, John Stultz Subject: [PATCH v2] usb: dwc3: Trigger a GCTL soft reset when switching modes in DRD Date: Wed, 21 Oct 2020 22:46:19 +0000 Message-Id: <20201021224619.20796-1-john.stultz@linaro.org> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Yu Chen With the current dwc3 code on the HiKey960 we often see the COREIDLE flag get stuck off in __dwc3_gadget_start(), which seems to prevent the reset irq and causes the USB gadget to fail to initialize. We had seen occasional initialization failures with older kernels but with recent 5.x era kernels it seemed to be becoming much more common, so I dug back through some older trees and realized I dropped this quirk from Yu Chen during upstreaming as I couldn't provide a proper rational for it and it didn't seem to be necessary. I now realize I was wrong. After resubmitting the quirk Thinh Nguyen pointed out that it shouldn't be a quirk and it is actually mentioned in the programming guide that it should be done when switching modes in DRD. So, to avoid these !COREIDLE lockups seen on HiKey960, this patch issues GCTL soft reset when switching modes if the controller is in DRD mode. Cc: Felipe Balbi Cc: Tejas Joglekar Cc: Yang Fei Cc: YongQin Liu Cc: Andrzej Pietrasiewicz Cc: Thinh Nguyen Cc: Jun Li Cc: Mauro Carvalho Chehab Cc: Greg Kroah-Hartman Cc: linux-usb@vger.kernel.org Signed-off-by: Yu Chen Signed-off-by: John Stultz --- v2: * Rework to always call the GCTL soft reset in DRD mode, rather then using a quirk as suggested by Thinh Nguyen --- drivers/usb/dwc3/core.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index bdf0925da6b6..ca94f3a2a83c 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -114,10 +114,24 @@ void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode) dwc->current_dr_role = mode; } +static void dwc3_gctl_core_soft_reset(struct dwc3 *dwc) +{ + int reg; + + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg |= (DWC3_GCTL_CORESOFTRESET); + dwc3_writel(dwc->regs, DWC3_GCTL, reg); + + reg = dwc3_readl(dwc->regs, DWC3_GCTL); + reg &= ~(DWC3_GCTL_CORESOFTRESET); + dwc3_writel(dwc->regs, DWC3_GCTL, reg); +} + static void __dwc3_set_mode(struct work_struct *work) { struct dwc3 *dwc = work_to_dwc(work); unsigned long flags; + int hw_mode; int ret; u32 reg; @@ -154,6 +168,11 @@ static void __dwc3_set_mode(struct work_struct *work) break; } + /* Execute a GCTL Core Soft Reset when switch mode in DRD*/ + hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); + if (hw_mode == DWC3_GHWPARAMS0_MODE_DRD) + dwc3_gctl_core_soft_reset(dwc); + spin_lock_irqsave(&dwc->lock, flags); dwc3_set_prtcap(dwc, dwc->desired_dr_role);