From patchwork Tue Dec 5 15:10:15 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 120674 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5864465qgn; Tue, 5 Dec 2017 07:10:59 -0800 (PST) X-Google-Smtp-Source: AGs4zMYF79pMhbgJuczMg+fJlmzIY8QnywhKX7XGzY6gfNdv4/oFGxKyY2Y6m8kno40CgqpKyhk8 X-Received: by 10.84.247.148 with SMTP id o20mr18865753pll.137.1512486659412; Tue, 05 Dec 2017 07:10:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512486659; cv=none; d=google.com; s=arc-20160816; b=XWY2WQBEbKPSjhZUM+mXb7F5QgicegWncGjRwUky2sUUcu7fwJpV4dlxcBDqGKFKFt mFYQcc8xxQcKy+fl5rr6DJbPF7k7Mnqk8difYW3A4DC42TSkVS1EC0QLk34nXSV5LUl0 KKXYHbrp8xuCnUCqj2TmVeWF0xrRijXCSv5d3pJDKR3D/3r56kH7nn6NqudFiwJOUxLt 0pwZ8QsHfjdjcOs4buqJn1ywke7eSi1OTQ9nIiAFTn4ar3KHAotrxB/tp7oxcbTm5POE SLxb0VGkjCG7+MMidG8v9a/or/RO2BFyG/YiFtKgkkNE8EKonhZFHaUq11S2kUFKf6yJ p/TA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=y7RZ3MNe5lEdwRuU31BNuaEiMJ/BcEEoTy5PgLhC4WU=; b=tXI3WW1vn3Y5A31thBwEfDMYJ4/8kXs9G1+fyfR9iMNONBNuWSyQlqPdE+v/tqZwAA pj2Ce/7IBRFIN9dIJvnXedLnU5xQP4yFhFpTje8oORYF3q79/K7PgS0hcufP74kUzSRX kxKPghTBLks49bbaxdeIKgSrzU14+kvkZ2OYTCGrQqqg56nrz0HSvdt+dhqGfQ4M6pEr CcHRGV+N8xxiMY/S2RwFQT50vJHyMNdixGWyT8EBv3q34CQFfJUijjoHkpztVTTuxV09 GEHzA2hZ/aJkiLvZpBqX190NPcKANfdgheDd5q3pFXzcFH8q4X0/q8TrnUEPPr+Hz85B Eu9Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w22si199051pll.376.2017.12.05.07.10.59; Tue, 05 Dec 2017 07:10:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753039AbdLEPKy (ORCPT + 28 others); Tue, 5 Dec 2017 10:10:54 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:56115 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752844AbdLEPKj (ORCPT ); Tue, 5 Dec 2017 10:10:39 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id E483A20744; Tue, 5 Dec 2017 16:10:37 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id B281A203A2; Tue, 5 Dec 2017 16:10:37 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Mark Rutland , Rob Herring , linux-arm-kernel@lists.infradead.org, plaes@plaes.org, icenowy@aosc.io, Thomas Petazzoni , jernej.skrabec@siol.net, devicetree@vger.kernel.org Subject: [PATCH v3 03/15] dt-bindings: display: sun4i-drm: Add LVDS properties Date: Tue, 5 Dec 2017 16:10:15 +0100 Message-Id: <17851ba6277b69aa9cd81de5eead62bfed271661.1512486553.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some clocks and resets supposed to drive the LVDS logic in the display engine have been overlooked when the driver was first introduced. Add those additional resources to the binding, and we'll deal with the ABI stability in the code. Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 8 +++++++- 1 file changed, 8 insertions(+) -- git-series 0.9.1 diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 50cc72ee1168..d4259a4f5171 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -121,6 +121,14 @@ Required properties: On SoCs other than the A33 and V3s, there is one more clock required: - 'tcon-ch1': The clock driving the TCON channel 1 +On SoCs that support LVDS (all SoCs but the A13, H3, H5 and V3s), you +need one more reset line: + - 'lvds': The reset line driving the LVDS logic + +And on the SoCs newer than the A31 (sun6i and sun8i families), you +need one more clock line: + - 'lvds-pll': The PLL that can be used to drive the LVDS clock + DRC --- From patchwork Tue Dec 5 15:10:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 120680 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp5865172qgn; Tue, 5 Dec 2017 07:11:30 -0800 (PST) X-Google-Smtp-Source: AGs4zMbjmtC413Xk41KuDsK6FyIz2L9whWrmsDdC1GQ4CtBdCgIJeCrpxi2DM8O5hBuhqAKFOvv0 X-Received: by 10.159.198.148 with SMTP id g20mr18430167plo.89.1512486690863; Tue, 05 Dec 2017 07:11:30 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512486690; cv=none; d=google.com; s=arc-20160816; b=Q11vNLU1Tl0vTz7PB60Y4Yqy1oOWP2Y45g051g5q3uLaDHXpvlf8SA8t7Q2X7o6Yyv RPiU6VgvB1k4gNFAn80q73Rz7L37PPwnABcVSHb4dpE11XHlvUhm96O77Wl3KF6i2/gy EVQj0RQnoYiBLkauCpwJ6haFIo2QRCbazkG/Rpl5MSvjGIli8ez/PoIYP8opOC3Upv+7 CWs1IfzEzx41h+wh58Le8k+iqzzEb64P+HDBbPQo+19EQerVXjBWb4GC6Mqs1Hc12njZ 5AkFVT5cP5eQE7ZzSJANDFOogo6ony7EK9mSMtWpLOI9b/12dTusphlYhZnBpns0l6jR 6wQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=GFijbjOXkyLMwgN0kkXRkmLD2rUuyKHJmlF6LdopYp8=; b=GwIaygkMYw9K8noOSAnS94XXoWMi5Py0S00bytc9h37qLfkix7MPu5kYZ3ppbxWSNT 4wjb87KI7uZSyp+uhMz/xeuzW8X47c00idHSifkvp6y1i+zYdbc5/wVhmWQqNWBK1NYz vFDIuMy4/ZuoEEf0L4inWLnkzMXM4cY7cpmU143T2o0k9i68PdOf8Jz2kzwi+rolHkBD 6oF8Z4JzhtFkzAKnt5hTj+Zypeg20WWY6Mgs4YP2GLwWitOJWKTqh0QajTir9Vrg0thN fNK/1PeQiCrMaqrYXV9p0cnPCyXoMi2/Fed3lB+VwPZSh5+EH2MpxKo35SADenDjwvOv RYmw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b4si216158plb.2.2017.12.05.07.11.30; Tue, 05 Dec 2017 07:11:30 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753161AbdLEPL2 (ORCPT + 28 others); Tue, 5 Dec 2017 10:11:28 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:56224 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752979AbdLEPKs (ORCPT ); Tue, 5 Dec 2017 10:10:48 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id 9779A209E9; Tue, 5 Dec 2017 16:10:46 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id 66991203A2; Tue, 5 Dec 2017 16:10:46 +0100 (CET) From: Maxime Ripard To: Daniel Vetter , David Airlie , Chen-Yu Tsai , Maxime Ripard Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Mark Rutland , Rob Herring , linux-arm-kernel@lists.infradead.org, plaes@plaes.org, icenowy@aosc.io, Thomas Petazzoni , jernej.skrabec@siol.net, devicetree@vger.kernel.org Subject: [PATCH v3 15/15] ARM: dts: sun8i: a711: Enable the LCD Date: Tue, 5 Dec 2017 16:10:27 +0100 Message-Id: <3cd7410e37b1f93350872f5472e37e68da6d082d.1512486553.git-series.maxime.ripard@free-electrons.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The A711 has 1024x600 LVDS panel, with a PWM-based backlight. Add it to our DT. Reviewed-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 61 ++++++++++++++++++++++++- 1 file changed, 61 insertions(+) -- git-series 0.9.1 diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts index a021ee6da396..511fca491fe8 100644 --- a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts +++ b/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts @@ -45,6 +45,7 @@ #include "sun8i-a83t.dtsi" #include +#include / { model = "TBS A711 Tablet"; @@ -59,6 +60,44 @@ stdout-path = "serial0:115200n8"; }; + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>; + enable-gpios = <&pio 3 29 GPIO_ACTIVE_HIGH>; + + brightness-levels = <0 1 2 4 8 16 32 64 128 255>; + default-brightness-level = <9>; + }; + + panel { + compatible = "tbs,a711-panel", "panel-lvds"; + backlight = <&backlight>; + power-supply = <®_sw>; + + width-mm = <153>; + height-mm = <90>; + data-mapping = "vesa-24"; + + panel-timing { + /* 1024x600 @60Hz */ + clock-frequency = <52000000>; + hactive = <1024>; + vactive = <600>; + hsync-len = <20>; + hfront-porch = <180>; + hback-porch = <160>; + vfront-porch = <12>; + vback-porch = <23>; + vsync-len = <5>; + }; + + port { + panel_input: endpoint { + remote-endpoint = <&tcon0_out_lcd>; + }; + }; + }; + reg_vbat: reg-vbat { compatible = "regulator-fixed"; regulator-name = "vbat"; @@ -89,6 +128,10 @@ }; }; +&de { + status = "okay"; +}; + /* * An USB-2 hub is connected here, which also means we don't need to * enable the OHCI controller. @@ -142,6 +185,12 @@ status = "okay"; }; +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pin>; + status = "okay"; +}; + &r_rsb { status = "okay"; @@ -323,6 +372,18 @@ regulator-name = "vcc-lcd"; }; +&tcon0 { + pinctrl-names = "default"; + pinctrl-0 = <&lcd_lvds_pins>; +}; + +&tcon0_out { + tcon0_out_lcd: endpoint@0 { + reg = <0>; + remote-endpoint = <&panel_input>; + }; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>;