From patchwork Thu Dec 7 22:43:21 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 121106 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp8953387qgn; Thu, 7 Dec 2017 14:43:38 -0800 (PST) X-Google-Smtp-Source: AGs4zMad3qdZJeQz4MExnhBikFFPbdXoCSL7Jy5MOf1X+vlRHh4JDdkh1aQfOaveLCDWq5cyYtC4 X-Received: by 10.99.188.2 with SMTP id q2mr23872894pge.332.1512686618013; Thu, 07 Dec 2017 14:43:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512686618; cv=none; d=google.com; s=arc-20160816; b=l+M45xZDmNHId3Ji6x/Zizwa+XLvLj7mWoCVSNTbortmwP40N9pyUjdcOTv7ShTsMH mlna37OaXbGlON9d7mTPYGGIg8vjzrMG77YnlMS4o27W8h3HuK9c9Zvm1xydiKrb0plF uEupblTuaDuNcRfGfOqMUEWYUUZS3cXwTxvFFNvikhJ8beLxJDmGHt6uSQhtxSVL3OYp iNFQzoL9eq0mc3jTr8r8s5dMrIoSHvyXepBWAoENTy5oJjz7QqqgHaoUSa2r4dc2LGGl O0LPYKUPdXrStgZlwprOcP+/7NaXli2qyQp9DwLlLeKGUuZBOg37kDRcCsk6HoAiZuZi VXug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=FZxZ2/gkT2yHJZwrRGpEmA1Dw3AHz7rQ3PFOQTzXj8c=; b=i6n+Gk3NauUCN5JcW1sV9ojWPOrfO0IWRqYBADPiGLQu6aQxIPWCeWuE5fxLTBV06V 9vv6oPTW5GGcaUOI2My/C9kTPsUPtddkdXqawj+/7vX5yxXtT4UDDPIoppWmueqt81Ie h9PJlWrkkZxzk1oLYQNmoj/DOM59dGEvDroBSw6DAHtkp3oxmON5AIdzjQlIRKFdz/ST KEyGDWBBZSy9RrvFS3n8XHdSCKe6EWh+SVRpgr++vUsjgxSLc6eI3akJTfJD89ZBGxOE A4NcdphU48cx/9nuDNdnRB1kfAmHsHHSgn5n+MuTooQiUZu/KgMbSh2cGjv/kB5vMixI F7xg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HHOAj0RM; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id q17si4843698pfj.31.2017.12.07.14.43.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Dec 2017 14:43:37 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HHOAj0RM; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id C01E521B02824; Thu, 7 Dec 2017 14:39:03 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::244; helo=mail-wm0-x244.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7FB1A21B02820 for ; Thu, 7 Dec 2017 14:39:01 -0800 (PST) Received: by mail-wm0-x244.google.com with SMTP id g75so541795wme.0 for ; Thu, 07 Dec 2017 14:43:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=j3lH2l7wuywbS5P9qbLRAnMvM1DUDCOJcF7b+b3ob4Q=; b=HHOAj0RMjU85qj6SJMkWCuBu13eeKvQqbIKs7wkISkqTrL3l6T3bkxTqV7N9Y5HuUb xZF/doUz3wGIKI8ylmGjyDne2f3U/fbE7c49VUAxLm4iexQAz8G4QOtJU4LeaAmdxpT9 +AwxCjkJ+6OcgJHxX4xwVuAbeuvNZswUqgZbA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=j3lH2l7wuywbS5P9qbLRAnMvM1DUDCOJcF7b+b3ob4Q=; b=MyXvpjPkbCJZR7ah1w/usWbgvgAAz4y8DLeFp1PDOiS/+IGiQ0GfObHjvmPfGe5nqK AdsKcMHvklag5Dou+B0aJbOkRtz5xYMVh9HOu8TQOZECuhfTyunpBziUnMCPIRMJfDFn j+fX50pmKq7rUJdB+fOP3fEwkaEc2jlTjpiu+sZrYuF2DXLoLYIC8m7nsmzz6FGm551R 6aa+nVRPgsaGjNQiiC+CHVwRIDEvELLqIy3ppTTsJtBcuQJmBpsH5riKtO6bv7N47I9w uXEueeED1LdHC+jvPZDGop0BUjn4b6vAPe3TyqDTzWd3VYPwzR9BZjtLMM1W3hqP70Da HPvQ== X-Gm-Message-State: AKGB3mKdX1EG8xD/Nebq3ITzspHaz4fjSd+2i6ET3tF7EeHkAAlfGvNc xkfxqigUwb+nPUToTxwvx0Y+IvH464s= X-Received: by 10.28.220.67 with SMTP id t64mr2375600wmg.150.1512686613451; Thu, 07 Dec 2017 14:43:33 -0800 (PST) Received: from localhost.localdomain ([160.171.158.223]) by smtp.gmail.com with ESMTPSA id g7sm7974314wra.38.2017.12.07.14.43.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Dec 2017 14:43:32 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Thu, 7 Dec 2017 22:43:21 +0000 Message-Id: <20171207224322.20362-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171207224322.20362-1-ard.biesheuvel@linaro.org> References: <20171207224322.20362-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH v4 1/2] MdeModulePkg: introduce SD/MMC override protocol X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ruiyu.ni@intel.com, feng.tian@intel.com, Ard Biesheuvel , hao.a.wu@intel.com, leif.lindholm@linaro.org, michael.d.kinney@intel.com, star.zeng@intel.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Many ARM based SoCs have integrated SDHCI controllers, and often, these implementations deviate in subtle ways from the pertinent specifications. On the one hand, these deviations are quite easy to work around, but on the other hand, having a collection of SoC specific workarounds in the generic driver stack is undesirable. So let's introduce an optional SD/MMC override protocol that we can invoke at the appropriate moments in the device initialization. That way, the workaround itself remains platform specific, but we can still use the generic driver stack on such platforms. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- MdeModulePkg/Include/Protocol/SdMmcOverride.h | 97 ++++++++++++++++++++ MdeModulePkg/MdeModulePkg.dec | 3 + 2 files changed, 100 insertions(+) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/MdeModulePkg/Include/Protocol/SdMmcOverride.h b/MdeModulePkg/Include/Protocol/SdMmcOverride.h new file mode 100644 index 000000000000..0d070023f9d3 --- /dev/null +++ b/MdeModulePkg/Include/Protocol/SdMmcOverride.h @@ -0,0 +1,97 @@ +/** @file + Protocol to describe overrides required to support non-standard SDHCI + implementations + + Copyright (c) 2017, Linaro, Ltd. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __SD_MMC_OVERRIDE_H__ +#define __SD_MMC_OVERRIDE_H__ + +#include + +#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_GUID \ + { 0xeaf9e3c1, 0xc9cd, 0x46db, { 0xa5, 0xe5, 0x5a, 0x12, 0x4c, 0x83, 0x23, 0x23 } } + +#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION 0x1 + +typedef struct _EDKII_SD_MMC_OVERRIDE EDKII_SD_MMC_OVERRIDE; + +typedef enum { + EdkiiSdMmcResetPre, + EdkiiSdMmcResetPost, + EdkiiSdMmcInitHostPre, + EdkiiSdMmcInitHostPost, +} EDKII_SD_MMC_PHASE_TYPE; + +/** + + Override function for SDHCI capability bits + + @param[in] ControllerHandle The EFI_HANDLE of the controller. + @param[in] Slot The 0 based slot index. + @param[in,out] SdMmcHcSlotCapability The SDHCI capability structure. + + @retval EFI_SUCCESS The override function completed successfully. + @retval EFI_NOT_FOUND The specified controller or slot does not exist. + @retval EFI_INVALID_PARAMETER SdMmcHcSlotCapability is NULL + +**/ +typedef +EFI_STATUS +(EFIAPI * EDKII_SD_MMC_CAPABILITY) ( + IN EFI_HANDLE ControllerHandle, + IN UINT8 Slot, + IN OUT VOID *SdMmcHcSlotCapability + ); + +/** + + Override function for SDHCI controller operations + + @param[in] ControllerHandle The EFI_HANDLE of the controller. + @param[in] Slot The 0 based slot index. + @param[in] PhaseType The type of operation and whether the + hook is invoked right before (pre) or + right after (post) + + @retval EFI_SUCCESS The override function completed successfully. + @retval EFI_NOT_FOUND The specified controller or slot does not exist. + @retval EFI_INVALID_PARAMETER PhaseType is invalid + +**/ +typedef +EFI_STATUS +(EFIAPI * EDKII_SD_MMC_NOTIFY_PHASE) ( + IN EFI_HANDLE ControllerHandle, + IN UINT8 Slot, + IN EDKII_SD_MMC_PHASE_TYPE PhaseType + ); + +struct _EDKII_SD_MMC_OVERRIDE { + // + // Protocol version of this implementation + // + UINTN Version; + // + // Callback to override SD/MMC host controller capability bits + // + EDKII_SD_MMC_CAPABILITY Capability; + // + // Callback to invoke SD/MMC override hooks + // + EDKII_SD_MMC_NOTIFY_PHASE NotifyPhase; +}; + +extern EFI_GUID gEdkiiSdMmcOverrideProtocolGuid; + +#endif diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 856d67aceb21..64ceea029f94 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -562,6 +562,9 @@ [Protocols] ## Include/Protocol/SmmMemoryAttribute.h gEdkiiSmmMemoryAttributeProtocolGuid = { 0x69b792ea, 0x39ce, 0x402d, { 0xa2, 0xa6, 0xf7, 0x21, 0xde, 0x35, 0x1d, 0xfe } } + ## Include/Protocol/SdMmcOverride.h + gEdkiiSdMmcOverrideProtocolGuid = { 0xeaf9e3c1, 0xc9cd, 0x46db, { 0xa5, 0xe5, 0x5a, 0x12, 0x4c, 0x83, 0x23, 0x23 } } + # # [Error.gEfiMdeModulePkgTokenSpaceGuid] # 0x80000001 | Invalid value provided. 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[198.145.21.10]) by mx.google.com with ESMTPS id w9si4409506pge.298.2017.12.07.14.43.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Dec 2017 14:43:40 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=LG6l/ExR; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 0BD9821B02845; Thu, 7 Dec 2017 14:39:06 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c09::241; helo=mail-wm0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wm0-x241.google.com (mail-wm0-x241.google.com [IPv6:2a00:1450:400c:c09::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 823B821B02820 for ; Thu, 7 Dec 2017 14:39:04 -0800 (PST) Received: by mail-wm0-x241.google.com with SMTP id n138so527400wmg.2 for ; Thu, 07 Dec 2017 14:43:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9Jn92z4LY1HxIRUSvyWFlGB8F0hCs8dD1HeNDEb4eo8=; b=LG6l/ExRI8IO+bZVZNgYdx837mq/FhWuQ/UCDxGp+3LgtwP20YSfNhyW1pJ7SoZ/ED bNoY6L+teM7CMGSwd1bj1EwFxU0I22puQL/iduh3/AfLjItzDIenTVGNv6ByyLf2n0DL 20xtC8QAC9g1gucas0ZFtwR7/kUpaw+sPjkAY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9Jn92z4LY1HxIRUSvyWFlGB8F0hCs8dD1HeNDEb4eo8=; b=lcjY8o9y/sFT68eX33RM71tjZkBu6VRwmVUtWPPDh1LgvvYACsQHFC5tMTDjqxk8Vb MyENDEipxNBiBMc4j5gW0XVgNTigNinJV2HFcWaU9+aMIIq/gfFJyD6Ff7V3WCKuoXf9 OIO76QzUt2gmUxYzIIAcphW5+2GPIhs69F2QYXs0rY/QYtXipkVPAYOo7jf6h6p/OFH7 8XAZhS8Z4UVolb1bI59XLikIONIfXmbGOTXYbUSLGz2rWOGCLkabLmKk++lgZB5/+mLZ AkVB5m8pOcAsCQ4wMCu4CANmgjc03ctCoE+MePpqk1V+sWCYkKreQGxhyzuC3XnP0ATI M4ow== X-Gm-Message-State: AKGB3mJY23VcHbkhdAllkdRsYDNfiqnPcRz+gytQnuLmTiYqO0d7eXtb tHHq96LHAZCiK/7vBFIsE7OiMuHOZGc= X-Received: by 10.28.139.144 with SMTP id n138mr2484746wmd.78.1512686616301; Thu, 07 Dec 2017 14:43:36 -0800 (PST) Received: from localhost.localdomain ([160.171.158.223]) by smtp.gmail.com with ESMTPSA id g7sm7974314wra.38.2017.12.07.14.43.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 Dec 2017 14:43:35 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Thu, 7 Dec 2017 22:43:22 +0000 Message-Id: <20171207224322.20362-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171207224322.20362-1-ard.biesheuvel@linaro.org> References: <20171207224322.20362-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH v4 2/2] MdeModulePkg/SdMmcPciHcDxe: allow HC capabilities to be overridden X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ruiyu.ni@intel.com, feng.tian@intel.com, Ard Biesheuvel , hao.a.wu@intel.com, leif.lindholm@linaro.org, michael.d.kinney@intel.com, star.zeng@intel.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Invoke the newly introduced SD/MMC override protocol to override the capabilities register after reading it from the device registers, and to call the pre/post host init and reset hooks at the appropriate times. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c | 35 +++++++- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 36 ++++++++ MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf | 2 + MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 95 ++++++++++++++++++-- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h | 35 -------- 5 files changed, 157 insertions(+), 46 deletions(-) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c index 0be8828abfcc..f923930bbae9 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.c @@ -17,6 +17,8 @@ #include "SdMmcPciHcDxe.h" +EDKII_SD_MMC_OVERRIDE *mOverride; + // // Driver Global Variables // @@ -281,14 +283,14 @@ SdMmcPciHcEnumerateDevice ( // // Reset the specified slot of the SD/MMC Pci Host Controller // - Status = SdMmcHcReset (Private->PciIo, Slot); + Status = SdMmcHcReset (Private, Slot); if (EFI_ERROR (Status)) { continue; } // // Reinitialize slot and restart identification process for the new attached device // - Status = SdMmcHcInitHost (Private->PciIo, Slot, Private->Capability[Slot]); + Status = SdMmcHcInitHost (Private, Slot); if (EFI_ERROR (Status)) { continue; } @@ -601,6 +603,20 @@ SdMmcPciHcDriverBindingStart ( goto Done; } + // + // Attempt to locate the singleton instance of the SD/MMC override protocol, + // which implements platform specific workarounds for non-standard SDHCI + // implementations. + // + if (mOverride == NULL) { + Status = gBS->LocateProtocol (&gEdkiiSdMmcOverrideProtocolGuid, NULL, + (VOID **)&mOverride); + if (!EFI_ERROR (Status)) { + DEBUG ((DEBUG_INFO, "%a: found SD/MMC override protocol\n", + __FUNCTION__)); + } + } + Support64BitDma = TRUE; for (Slot = FirstBar; Slot < (FirstBar + SlotNum); Slot++) { Private->Slot[Slot].Enable = TRUE; @@ -609,6 +625,17 @@ SdMmcPciHcDriverBindingStart ( if (EFI_ERROR (Status)) { continue; } + if (mOverride != NULL && mOverride->Capability != NULL) { + Status = mOverride->Capability ( + Controller, + Slot, + &Private->Capability[Slot]); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, "%a: Failed to override capability - %r\n", + __FUNCTION__, Status)); + continue; + } + } DumpCapabilityReg (Slot, &Private->Capability[Slot]); Support64BitDma &= Private->Capability[Slot].SysBus64; @@ -627,7 +654,7 @@ SdMmcPciHcDriverBindingStart ( // // Reset the specified slot of the SD/MMC Pci Host Controller // - Status = SdMmcHcReset (PciIo, Slot); + Status = SdMmcHcReset (Private, Slot); if (EFI_ERROR (Status)) { continue; } @@ -642,7 +669,7 @@ SdMmcPciHcDriverBindingStart ( continue; } - Status = SdMmcHcInitHost (PciIo, Slot, Private->Capability[Slot]); + Status = SdMmcHcInitHost (Private, Slot); if (EFI_ERROR (Status)) { continue; } diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h index 6a2a27969936..c683600f2ef2 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h @@ -35,6 +35,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include #include #include +#include #include #include "SdMmcPciHci.h" @@ -43,6 +44,8 @@ extern EFI_COMPONENT_NAME_PROTOCOL gSdMmcPciHcComponentName; extern EFI_COMPONENT_NAME2_PROTOCOL gSdMmcPciHcComponentName2; extern EFI_DRIVER_BINDING_PROTOCOL gSdMmcPciHcDriverBinding; +extern EDKII_SD_MMC_OVERRIDE *mOverride; + #define SD_MMC_HC_PRIVATE_SIGNATURE SIGNATURE_32 ('s', 'd', 't', 'f') #define SD_MMC_HC_PRIVATE_FROM_THIS(a) \ @@ -782,4 +785,37 @@ SdCardIdentification ( IN UINT8 Slot ); +/** + Software reset the specified SD/MMC host controller. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Slot The slot number of the SD card to send the command to. + + @retval EFI_SUCCESS The software reset executes successfully. + @retval Others The software reset fails. + +**/ +EFI_STATUS +SdMmcHcReset ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN UINT8 Slot + ); + +/** + Initial SD/MMC host controller with lowest clock frequency, max power and max timeout value + at initialization. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Slot The slot number of the SD card to send the command to. + + @retval EFI_SUCCESS The host controller is initialized successfully. + @retval Others The host controller isn't initialized successfully. + +**/ +EFI_STATUS +SdMmcHcInitHost ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN UINT8 Slot + ); + #endif diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf index e26e6a098c17..154ce45d8223 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf @@ -48,6 +48,7 @@ [Sources] [Packages] MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec [LibraryClasses] DevicePathLib @@ -61,6 +62,7 @@ [LibraryClasses] DebugLib [Protocols] + gEdkiiSdMmcOverrideProtocolGuid ## SOMETIMES_CONSUMES gEfiDevicePathProtocolGuid ## TO_START gEfiPciIoProtocolGuid ## TO_START gEfiSdMmcPassThruProtocolGuid ## BY_START diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index aa75aa8d2434..385a50b12079 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -419,7 +419,7 @@ SdMmcHcWaitMmioSet ( /** Software reset the specified SD/MMC host controller and enable all interrupts. - @param[in] PciIo The PCI IO protocol instance. + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. @param[in] Slot The slot number of the SD card to send the command to. @retval EFI_SUCCESS The software reset executes successfully. @@ -428,13 +428,32 @@ SdMmcHcWaitMmioSet ( **/ EFI_STATUS SdMmcHcReset ( - IN EFI_PCI_IO_PROTOCOL *PciIo, + IN SD_MMC_HC_PRIVATE_DATA *Private, IN UINT8 Slot ) { EFI_STATUS Status; UINT8 SwReset; + EFI_PCI_IO_PROTOCOL *PciIo; + + // + // Notify the SD/MMC override protocol that we are about to reset + // the SD/MMC host controller. + // + if (mOverride != NULL && mOverride->NotifyPhase != NULL) { + Status = mOverride->NotifyPhase ( + Private->ControllerHandle, + Slot, + EdkiiSdMmcResetPre); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, + "%a: SD/MMC pre reset notifier callback failed - %r\n", + __FUNCTION__, Status)); + return Status; + } + } + PciIo = Private->PciIo; SwReset = 0xFF; Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_SW_RST, FALSE, sizeof (SwReset), &SwReset); @@ -456,10 +475,32 @@ SdMmcHcReset ( DEBUG ((DEBUG_INFO, "SdMmcHcReset: reset done with %r\n", Status)); return Status; } + // // Enable all interrupt after reset all. // Status = SdMmcHcEnableInterrupt (PciIo, Slot); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_INFO, "SdMmcHcReset: SdMmcHcEnableInterrupt done with %r\n", + Status)); + return Status; + } + + // + // Notify the SD/MMC override protocol that we have just reset + // the SD/MMC host controller. + // + if (mOverride != NULL && mOverride->NotifyPhase != NULL) { + Status = mOverride->NotifyPhase ( + Private->ControllerHandle, + Slot, + EdkiiSdMmcResetPost); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, + "%a: SD/MMC post reset notifier callback failed - %r\n", + __FUNCTION__, Status)); + } + } return Status; } @@ -1021,7 +1062,7 @@ SdMmcHcInitTimeoutCtrl ( Initial SD/MMC host controller with lowest clock frequency, max power and max timeout value at initialization. - @param[in] PciIo The PCI IO protocol instance. + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. @param[in] Slot The slot number of the SD card to send the command to. @param[in] Capability The capability of the slot. @@ -1031,12 +1072,33 @@ SdMmcHcInitTimeoutCtrl ( **/ EFI_STATUS SdMmcHcInitHost ( - IN EFI_PCI_IO_PROTOCOL *PciIo, - IN UINT8 Slot, - IN SD_MMC_HC_SLOT_CAP Capability + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN UINT8 Slot ) { - EFI_STATUS Status; + EFI_STATUS Status; + EFI_PCI_IO_PROTOCOL *PciIo; + SD_MMC_HC_SLOT_CAP Capability; + + // + // Notify the SD/MMC override protocol that we are about to initialize + // the SD/MMC host controller. + // + if (mOverride != NULL && mOverride->NotifyPhase != NULL) { + Status = mOverride->NotifyPhase ( + Private->ControllerHandle, + Slot, + EdkiiSdMmcInitHostPre); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, + "%a: SD/MMC pre init notifier callback failed - %r\n", + __FUNCTION__, Status)); + return Status; + } + } + + PciIo = Private->PciIo; + Capability = Private->Capability[Slot]; Status = SdMmcHcInitClockFreq (PciIo, Slot, Capability); if (EFI_ERROR (Status)) { @@ -1049,6 +1111,25 @@ SdMmcHcInitHost ( } Status = SdMmcHcInitTimeoutCtrl (PciIo, Slot); + if (EFI_ERROR (Status)) { + return Status; + } + + // + // Notify the SD/MMC override protocol that we are have just initialized + // the SD/MMC host controller. + // + if (mOverride != NULL && mOverride->NotifyPhase != NULL) { + Status = mOverride->NotifyPhase ( + Private->ControllerHandle, + Slot, + EdkiiSdMmcInitHostPost); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, + "%a: SD/MMC post init notifier callback failed - %r\n", + __FUNCTION__, Status)); + } + } return Status; } diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h index fb627586022c..e389d52184f4 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.h @@ -298,22 +298,6 @@ SdMmcHcWaitMmioSet ( ); /** - Software reset the specified SD/MMC host controller. - - @param[in] PciIo The PCI IO protocol instance. - @param[in] Slot The slot number of the SD card to send the command to. - - @retval EFI_SUCCESS The software reset executes successfully. - @retval Others The software reset fails. - -**/ -EFI_STATUS -SdMmcHcReset ( - IN EFI_PCI_IO_PROTOCOL *PciIo, - IN UINT8 Slot - ); - -/** Set all interrupt status bits in Normal and Error Interrupt Status Enable register. @@ -524,23 +508,4 @@ SdMmcHcInitTimeoutCtrl ( IN UINT8 Slot ); -/** - Initial SD/MMC host controller with lowest clock frequency, max power and max timeout value - at initialization. - - @param[in] PciIo The PCI IO protocol instance. - @param[in] Slot The slot number of the SD card to send the command to. - @param[in] Capability The capability of the slot. - - @retval EFI_SUCCESS The host controller is initialized successfully. - @retval Others The host controller isn't initialized successfully. - -**/ -EFI_STATUS -SdMmcHcInitHost ( - IN EFI_PCI_IO_PROTOCOL *PciIo, - IN UINT8 Slot, - IN SD_MMC_HC_SLOT_CAP Capability - ); - #endif