From patchwork Mon Dec 11 08:54:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 121342 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp2535212qgn; Mon, 11 Dec 2017 00:56:02 -0800 (PST) X-Google-Smtp-Source: AGs4zMZs+TAG3vJh/Idwgns0Oouk0W/f25m6BnsiFWsw6VBTaaV072EsirK+628KuleV1fcdFvdx X-Received: by 10.84.130.39 with SMTP id 36mr8531017plc.268.1512982562033; Mon, 11 Dec 2017 00:56:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512982562; cv=none; d=google.com; s=arc-20160816; b=qjWRHdWCt+Nn4BVZeMEz0obWzT2OBxRm2oIhyJSe4iP9Eq6SEwbXL+zIR8+p+pWCVz FWDnQO0r71wUZuU0MdDlBdWrNQ9ctiHhB8UzAa+5aj9JH/Zj+/8Sz43kIVYB0TgR++Lx KG+ijjunFsJXOTnHX/zM5gbizXGNy7Jkr4H88paYPn7jbzr5gysjbCBV48bNOMAloFgf 9zYCi4ZV0YmONS9hw0T9bBiq15Wquwnj8bFP8HVLG0/LFPvoGNwTzm9zuql5e1yAO5HD hurgrBcAmMXlTmJ2FS+ZKHk9TdfSfyqDBVdg77GBPQn2zHVSOKFLxi0O8wXntc+XkRSg aWPA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=kTXs1zvIkpNlqMT9boDV6zTh881l3DFHeLtDsPIQi3c=; b=jt2o8epZWvyNCgc9pgAtGTk7kwxJdrJ6DajBUV5xdoVhCxNFQQaYAv8z8Rmy6Pk6fF 04gN861MLrkDP13pFSYki+t/8MlYsGIY/8If39HaUx+eMZuXwmy3q90/MSxAUSNmtc4A jhoLfk3wCh4ueu4oJNWubPtTc+G4bY8rsTCZtIYUec2ypzMZVkS4sURXagdDXwk3vvdb 5iU2GRlPrTuDRqwpB3i+97Kq9XnjydefFbZMEid3lEQGj9w4EYEycmc7MQBZSy9BvSyx h0Tu6WsNGN6r3cUGNmdIQEP/gjvqwynhggtesIqH5IaAIIaQo0dIRNMLl+aQ/h+PIMxE XAfw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i10si9557088pgc.159.2017.12.11.00.56.01; Mon, 11 Dec 2017 00:56:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752584AbdLKI4A (ORCPT + 25 others); Mon, 11 Dec 2017 03:56:00 -0500 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:46593 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752367AbdLKIzr (ORCPT ); Mon, 11 Dec 2017 03:55:47 -0500 Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vBB8rcoY025232; Mon, 11 Dec 2017 09:54:53 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 2er660rmcb-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 11 Dec 2017 09:54:53 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 97CC648; Mon, 11 Dec 2017 08:54:51 +0000 (GMT) Received: from Webmail-eu.st.com (gpxdag3node5.st.com [10.75.127.72]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id EA83924AA; Mon, 11 Dec 2017 08:54:50 +0000 (GMT) Received: from localhost (10.75.127.48) by GPXDAG3NODE5.st.com (10.75.127.72) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 11 Dec 2017 09:54:50 +0100 From: Alexandre Torgue To: Maxime Coquelin , Linus Walleij , Rob Herring , Mark Rutland , Jonathan Corbet , Russell King CC: , , Subject: [PATCH 3/5] ARM: mach-stm32: Kconfig: introduce MACH_STM32F769 flag Date: Mon, 11 Dec 2017 09:54:33 +0100 Message-ID: <1512982475-32661-4-git-send-email-alexandre.torgue@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1512982475-32661-2-git-send-email-alexandre.torgue@st.com> References: <1512982475-32661-2-git-send-email-alexandre.torgue@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.48] X-ClientProxiedBy: SFHDAG7NODE2.st.com (10.75.127.20) To GPXDAG3NODE5.st.com (10.75.127.72) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-12-11_03:, , signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch introduces the MACH_STM32F769 to make possible to only select STM32F769 pinctrl driver. By default, all the MACH_STM32Fxxx flags will be set with STM32 defconfig. Signed-off-by: Alexandre Torgue -- 2.7.4 diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig index 0d1889b..33b07db3 100644 --- a/arch/arm/mach-stm32/Kconfig +++ b/arch/arm/mach-stm32/Kconfig @@ -25,6 +25,11 @@ config MACH_STM32F746 depends on ARCH_STM32 default y +config MACH_STM32F769 + bool "STMicroelectronics STM32F769" + depends on ARCH_STM32 + default y + config MACH_STM32H743 bool "STMicrolectronics STM32H743" depends on ARCH_STM32 From patchwork Mon Dec 11 08:54:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 121341 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp2535172qgn; Mon, 11 Dec 2017 00:55:59 -0800 (PST) X-Google-Smtp-Source: AGs4zMaaR5F3K4Xgc4vufQPz1Mc0DC79J0M73tB1XEEgK50936rOLa/tiarV29J/VsCiqXMBnp/y X-Received: by 10.101.80.197 with SMTP id s5mr36691031pgp.399.1512982559212; Mon, 11 Dec 2017 00:55:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512982559; cv=none; d=google.com; s=arc-20160816; b=pt/E66P1NP73GKhFc+In+VXQekzBmxag2v0UCTf7XtAhi1oDZRvhFrb4oIIVFLkYHg mcKMNoR8pFpZefdJq+kr3adfWojXgX9H/N/sJu7vN/MZo2bCGwKHAxvAZvleSF5okfjy WamHrhiRpJuzUJ5IWUNB1bVv2LjxAw3KPm5NYWEX4AdSCl0GQN29xHI727oOc7mP/Psx XdXvqUAUUJcOcRH0CDdUi/k34P7yARjDyVgvJxgfJexl7SYB1fpiYLkk/G37U0rQ2Ia0 ipMLYoShM8+fj6Qve7VroUE176W8JapdF1hv6y64MyYTwY08dgCxv0MFbqLudkRwKlEA CHQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=Nf1ZpUmAp4Zud64e5iC3P5IG6GB4rcS1EcO+pwgf5xo=; b=EgoSBjPoAJGa7Syk7gkVH6j4mP6I7Obe09FnrWnMfqXnFxgaWXzctMxQW4+wM9eqWa 8Svm4evB08TlM67ye6QcOkCY+UEV7KWRm73z3iQ9v6Vc3XOF0LtZmuIzWVKEWnZ4zlES b2GEOQaITsUKPHKYWJnWF06RFkogPgThFaG6QEBhcozNFyd9dhTrpkSnZmo/4fFWHkW4 KlOP80kwnOGmmql3Qw77kbMjNUo/qdtxq28ceyvvKdGpMFxFxRrHjMDee8elDQRYvvJ6 UcvmLFFrX7JOpTg/ZOF0T5UUIzmCUIwRL7t3rPZQME4CE3ceNM4HdDy6xWFDjG3SuLnX ILuw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k11si9742085pgr.18.2017.12.11.00.55.58; Mon, 11 Dec 2017 00:55:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752562AbdLKIz5 (ORCPT + 25 others); Mon, 11 Dec 2017 03:55:57 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:54744 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751433AbdLKIzq (ORCPT ); Mon, 11 Dec 2017 03:55:46 -0500 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vBB8sOI4022110; Mon, 11 Dec 2017 09:54:54 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2er7kg8hhr-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Mon, 11 Dec 2017 09:54:54 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id D1D5A4A; Mon, 11 Dec 2017 08:54:51 +0000 (GMT) Received: from Webmail-eu.st.com (gpxdag3node5.st.com [10.75.127.72]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id AB5A524A1; Mon, 11 Dec 2017 08:54:51 +0000 (GMT) Received: from localhost (10.75.127.47) by GPXDAG3NODE5.st.com (10.75.127.72) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 11 Dec 2017 09:54:51 +0100 From: Alexandre Torgue To: Maxime Coquelin , Linus Walleij , Rob Herring , Mark Rutland , Jonathan Corbet , Russell King CC: , , Subject: [PATCH 4/5] ARM: mach-stm32: add new STM32F769 MCU Date: Mon, 11 Dec 2017 09:54:34 +0100 Message-ID: <1512982475-32661-5-git-send-email-alexandre.torgue@st.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1512982475-32661-2-git-send-email-alexandre.torgue@st.com> References: <1512982475-32661-2-git-send-email-alexandre.torgue@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG1NODE1.st.com (10.75.127.1) To GPXDAG3NODE5.st.com (10.75.127.72) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-12-11_03:, , signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add new st,stm32f769 compatible machine name for STM32F769 MCU and update documentation. Signed-off-by: Alexandre Torgue -- 2.7.4 diff --git a/Documentation/arm/stm32/stm32f769-overview.txt b/Documentation/arm/stm32/stm32f769-overview.txt new file mode 100644 index 0000000..9ab7e60 --- /dev/null +++ b/Documentation/arm/stm32/stm32f769-overview.txt @@ -0,0 +1,36 @@ + STM32F769 Overview + ================== + + Introduction + ------------ + The STM32F769 is a Cortex-M7 MCU aimed at various applications. + It features: + - Cortex-M7 core running up to @216MHz + - 2MB internal flash, 512KBytes internal RAM (+4KB of backup SRAM) + - FMC controller to connect SDRAM, NOR and NAND memories + - Dual mode QSPI + - SD/MMC/SDIO support*2 + - Ethernet controller + - USB OTFG FS & HS controllers + - I2C*4, SPI*6, CAN*3 busses support + - Several 16 & 32 bits general purpose timers + - Serial Audio interface *2 + - LCD controller + - HDMI-CEC + - DSI + - SPDIFRX + - MDIO salave interface + + Resources + --------- + Datasheet and reference manual are publicly available on ST website: + - http://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32-high-performance-mcus/stm32f7-series/stm32f7x9/stm32f769ni.html + + Document Author + --------------- + Alexandre Torgue + + + + + diff --git a/arch/arm/mach-stm32/board-dt.c b/arch/arm/mach-stm32/board-dt.c index e918686..4824632 100644 --- a/arch/arm/mach-stm32/board-dt.c +++ b/arch/arm/mach-stm32/board-dt.c @@ -12,6 +12,7 @@ static const char *const stm32_compat[] __initconst = { "st,stm32f429", "st,stm32f469", "st,stm32f746", + "st,stm32f769", "st,stm32h743", NULL };