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[209.132.180.67]) by mx.google.com with ESMTP id s64si3245725pfj.279.2017.12.14.05.42.15; Thu, 14 Dec 2017 05:42:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Br4j2i6H; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752638AbdLNNmL (ORCPT + 20 others); Thu, 14 Dec 2017 08:42:11 -0500 Received: from fllnx210.ext.ti.com ([198.47.19.17]:51754 "EHLO fllnx210.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751029AbdLNNmG (ORCPT ); Thu, 14 Dec 2017 08:42:06 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBEDfFGx009603; Thu, 14 Dec 2017 07:41:15 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513258875; bh=GVbubBue37yS8h3n7c0u6Zy5RGy2346pl9lvN5bvm2g=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Br4j2i6H5E8mO39SL66uOtaarV8bWbbMg1WZAT0pdcGOHtJ3z/hSG65Cs7qy0Oj1M cGdJnIKHpfJl4ZhiqTXOWXlcvrVBu2ah88Ti3aT6wCbb1319CJijvLCJUm8R0cA6QO VySHbklemMuPEB9n75zHXOy1xCqmWcPR1+JYdk/M= Received: from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDfEjh029519; Thu, 14 Dec 2017 07:41:15 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.845.34; Thu, 14 Dec 2017 07:41:14 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Thu, 14 Dec 2017 07:41:14 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDewBG009855; Thu, 14 Dec 2017 07:41:11 -0600 From: Kishon Vijay Abraham I To: Tony Lindgren , , Santosh Shilimkar CC: Rob Herring , Mark Rutland , Russell King , , , , , , , Subject: [PATCH 03/14] ARM: configs: keystone: Enable CONFIG_MMC_SDHCI_OMAP Date: Thu, 14 Dec 2017 19:10:43 +0530 Message-ID: <20171214134054.7749-4-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171214134054.7749-1-kishon@ti.com> References: <20171214134054.7749-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable CONFIG_MMC_SDHCI_OMAP so that TI's k2g SoC can use sdhci-omap driver for MMC/SD controller. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/configs/keystone_defconfig | 3 +++ 1 file changed, 3 insertions(+) -- 2.11.0 diff --git a/arch/arm/configs/keystone_defconfig b/arch/arm/configs/keystone_defconfig index f710c192b33a..264260a9b1be 100644 --- a/arch/arm/configs/keystone_defconfig +++ b/arch/arm/configs/keystone_defconfig @@ -170,7 +170,10 @@ CONFIG_USB_DWC3=y CONFIG_NOP_USB_XCEIV=y CONFIG_KEYSTONE_USB_PHY=y CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_OMAP_HS=y +CONFIG_MMC_SDHCI_OMAP=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_LEDS_GPIO=y From patchwork Thu Dec 14 13:40:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 121950 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp6821745qgn; Thu, 14 Dec 2017 05:43:27 -0800 (PST) X-Google-Smtp-Source: ACJfBouaQbldDerlnG6R2p20o+A0Xbf6yAS149jcAxhXY9joyBQ4bHuBhFtw8eb6h/Oll2DCvlPq X-Received: by 10.98.18.88 with SMTP id a85mr9546699pfj.141.1513259007219; Thu, 14 Dec 2017 05:43:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513259007; cv=none; d=google.com; s=arc-20160816; b=E3E0avRxNMkteZjYm/Gtoc8cTnRFyHV4AOQdjzkG07xywqTDSrP1rHR5sODKAT80TG sMjTlk4Zto7NSaNZ2N26On/NwDMQLeKudrIYxOIQlz0YKl3xsZ7TcFqKX8RerWzUDbai YF4zpjhdjDFZ+RMmtuwHq9XNlW4RN5Q+G6/Uj79I3NmjSEE2pnzRL2+C4tovxpToCJ1c 9VKIriYycjJe8K1Mat7EQgDNfsms5q/U1lgG/GtucrIR40QLuasHsdYz3xEy4KJfH5qo uNAxAKuM9LfWD9YeRoz1oW1XTTkYdFer2pssJ6NU9vOBu8fOetR5jwwD2Ct1rZlRm3T7 f/NQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=d3Kc1N8mbkDKFu0TCeKjCyjCpiWN03Rt6l67FV0HmbU=; b=Jd8uVD7vAO0YqXaT14tyTuVe7LaxDMMLj00mTK6mwf9T/ooGWB/weim/tlJTzPZpnX x40jNecgOiATJnGbO8JyE8GbR771ZlRdl5piXGSfobdrgTemHBeKutoBbDU6wM/YoOf8 2QtQXPmA79JexhVJ2pOIxV3YXueRR1B9XYCrYd/AnQrc7+rOOmzobWOwaNIxA9UizDAh b5P4SDCKkI2WZ//ipQ+FWKqObJe0fqFV2X96hhb6VqLG/MzICnwDrXpE4PxFMttEqaIq KBq0zldx/8wBR2bIDpBmAn/vG3GSKRjU4RQBIBspl8rwNZ7Be7H3TX1ZQbETyKaATtvH Cmpw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=km9arQk6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u131si2940937pgc.145.2017.12.14.05.43.26; Thu, 14 Dec 2017 05:43:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=km9arQk6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753071AbdLNNnY (ORCPT + 20 others); Thu, 14 Dec 2017 08:43:24 -0500 Received: from fllnx209.ext.ti.com ([198.47.19.16]:23237 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752483AbdLNNnU (ORCPT ); Thu, 14 Dec 2017 08:43:20 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBEDfR6V026839; Thu, 14 Dec 2017 07:41:27 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513258887; bh=3sM7hpddXUIUFt/ivB7gJaXdvctFMFxwrgsYYiHJ+UA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=km9arQk635AWOr2mvvfU3MSVOIg0sXYhx4gLzOPiwOZG5dSLwIW3WXDY8Y+3NgL1v 4n8cJMJgkR2dlXHaHeqaP84aVg8AuyzzO1LKEA+EbmD69R8psnoHnUaA/ghN1zv6AJ eo4InLyrhiXs3m6bKhEY1JxmnafKDHnbGvDLO/VU= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDfMj0002813; Thu, 14 Dec 2017 07:41:22 -0600 Received: from DFLE102.ent.ti.com (10.64.6.23) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 14 Dec 2017 07:41:22 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 14 Dec 2017 07:41:22 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDewBI009855; Thu, 14 Dec 2017 07:41:18 -0600 From: Kishon Vijay Abraham I To: Tony Lindgren , , Santosh Shilimkar CC: Rob Herring , Mark Rutland , Russell King , , , , , , , Subject: [PATCH 05/14] ARM: dts: dra76-evm: Shift to using common IOdelay data Date: Thu, 14 Dec 2017 19:10:45 +0530 Message-ID: <20171214134054.7749-6-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171214134054.7749-1-kishon@ti.com> References: <20171214134054.7749-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sekhar Nori Now that we have a device-tree include file with common MMC/SD IOdelay data for DRA76x SoC, shift the EVM device-tree file to using that. Tested-by: Jean-Jacques Hiblot Signed-off-by: Sekhar Nori Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra76-evm.dts | 41 +---------------------------------------- 1 file changed, 1 insertion(+), 40 deletions(-) -- 2.11.0 diff --git a/arch/arm/boot/dts/dra76-evm.dts b/arch/arm/boot/dts/dra76-evm.dts index b024a65c6e27..2770f6d3e1cb 100644 --- a/arch/arm/boot/dts/dra76-evm.dts +++ b/arch/arm/boot/dts/dra76-evm.dts @@ -9,6 +9,7 @@ #include "dra76x.dtsi" #include "dra7-evm-common.dtsi" +#include "dra76x-mmc-iodelay.dtsi" #include / { @@ -100,46 +101,6 @@ }; }; -&dra7_pmx_core { - mmc1_pins_default: mmc1_pins_default { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */ - DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ - DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ - DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ - DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ - DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ - DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ - >; - }; - - mmc1_pins_sdr12: pinmux_mmc1_sdr12_pins { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ - DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ - DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ - DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ - DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ - DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ - >; - }; - - mmc2_pins_default: mmc2_pins_default { - pinctrl-single,pins = < - DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ - DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ - DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ - DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ - DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ - DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ - DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ - DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ - DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ - DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ - >; - }; -}; - &i2c1 { status = "okay"; clock-frequency = <400000>; From patchwork Thu Dec 14 13:40:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 121952 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp6823024qgn; Thu, 14 Dec 2017 05:44:41 -0800 (PST) X-Google-Smtp-Source: ACJfBovnCSIwrFHfC7+8tUvSIrlCh/OTZvDfuXyrQqFJg2dF7B6nFQJFFh8+tjU9JHLoqwzTv+/g X-Received: by 10.159.241.149 with SMTP id s21mr9411459plr.248.1513259081163; Thu, 14 Dec 2017 05:44:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513259081; cv=none; d=google.com; s=arc-20160816; b=zwhrALBePHrre3Ti5c76kKJAKp87I+GdB8Jk/FchE0AVF9N2E3QJtui4GkxQDPuwQS sFvCXiF7AQrRV5lTAH8wvygLfvt2c3KqTgLrQmyXdtVsobGB4lMACAlaJDMy3DAqG9dR dEXihjhsvZ7CN7b8dJTYYPbfhs+0S8o0+FiNOpkKIDRvc/4AJ1Vl99f9JUbtN6djJshs Dr9Kc33huHqKVU/s4xkbqyD/3zZ+nBa1icfKZw25q6DouFHPALkOFVwi+ifsdg9xx7s3 ozQX4PsVPuRBhVDp5ykPSI3EUC9en0zqqztZr0CL3iwqH9IMW+q4PQNCgWJNgCvlK7jJ qDqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=QGKzXsk8qXl2opB57nZp8RNY2N91uce9z4owcufYWIs=; b=ojVXqHzLtFu+7H2We0JqyeprTkpKbsZGRSPWriL3F46qoGwlXCBUNs7qXnysReDfJP W0aup5zAfwWqyx7i5Hy3Mt72Uv8UztiuHau6A6sdcy6PdFYk8BheGFvJ+6CU1FdEXwV7 TDX+ycrAl24jhPC5uiBeTJ0nh/1Z/zNZW2w+4LOvyyQS/1lFyyOal8N7QytlOqsGvfRt jODN276Ye3fkrplL563BA+EKsqb5Wh+GL7MwJFQWQ6xbmh49sJ3q1OxOo46qPiI4DJA0 rVHSP97xWpe1jYe/CNX0KPQ7mHM8vTJCXMBwzFT8gouttzpuRRS7TBF6NQ8mVKPP2NRw PFKA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=F1X9i8gv; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 1 + 1 file changed, 1 insertion(+) -- 2.11.0 diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi index 49aeecd312b4..50e7c3c0d111 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi @@ -442,6 +442,7 @@ pinctrl-0 = <&mmc2_pins_default>; vmmc-supply = <&vdd_3v3>; + vqmmc-supply = <&vdd_3v3>; bus-width = <8>; ti,non-removable; cap-mmc-dual-data-rate; From patchwork Thu Dec 14 13:40:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 121954 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp6824015qgn; Thu, 14 Dec 2017 05:45:34 -0800 (PST) X-Google-Smtp-Source: ACJfBosCirsKaIWOFuZ9ulO8PVnVbdyNa5hFUHJN8XHLIsDLUrAHkUweivD7Vw5Sk4iINk8J+5hM X-Received: by 10.101.70.196 with SMTP id n4mr8527566pgr.353.1513259134315; Thu, 14 Dec 2017 05:45:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513259134; cv=none; d=google.com; s=arc-20160816; b=UeS4ZOa2k5ySh5S/HVEJUKR91S7HRMAQjD5ekbpe45+wPeKGTOESHhk8St34SBhUQG Y8zPMy/M6nDooZWoKBDqoP74+u1R6h+I0iGjZJGro3SNPE28CLIGECHs0ADPgMsGqwfe JlcGruhSprFnQHQszCPrxis9yjQQ5EDdjeC+MsYEOxpvQWcxDp/rRBqxzM9lqvqYNk9U 8V7mYvowxT6BoqDdmB8nYQ3dRNDvAqP48ij9FREI474Il2KGeuRjkcK2094aj9mY499A XPvVkzxcBQhedPfWkM9WJMIj7Qq4zCu/9CU+tgnDzLLO11YAoW7u4KFcUy40WkWvJh+b Dryw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=aKRJSgs0kDkXZaiKv8fIoUdkjYwI8gAUOfZWORUvqEM=; b=TMyfPoGY/8iyHlgeaIm+SYWKHa037WHvKTTdgkgIyNMBXDRhgRfoT4NSIIVD3nnSTh miqFjIaT2HjMiunSxDtah4zvaU0DYdZEgSmAcpTJ42HLvaQzUeKaCdZiyMdrrTjivhNO Xzic1dei5B8EoCFj5FUaaSMexDHWQnxrjdi2xNzKHhRnxC7GyNhUQYKKjIVHkJ97Q54/ VY0Fr/0qIGcmaEJu7a5QPocVRIdq05nrmk9dauwPGl7unKo12yxEQjuCWGqVHyPbN5BI kFbLqTXDoF9W6cLPA/yUbtQgQtAkw5N0ygSuKxPRXnuo605kfrY8NuXwVFLaNdlUzzNk +qRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=xOClpm5Q; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra76-evm.dts | 1 + 1 file changed, 1 insertion(+) -- 2.11.0 diff --git a/arch/arm/boot/dts/dra76-evm.dts b/arch/arm/boot/dts/dra76-evm.dts index ec8af5841061..4dd8a5ac8fae 100644 --- a/arch/arm/boot/dts/dra76-evm.dts +++ b/arch/arm/boot/dts/dra76-evm.dts @@ -321,6 +321,7 @@ &mmc2 { status = "okay"; vmmc-supply = <&vio_1v8>; + vqmmc-supply = <&vio_1v8>; bus-width = <8>; pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; pinctrl-0 = <&mmc2_pins_default>; From patchwork Thu Dec 14 13:40:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 121953 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp6823700qgn; Thu, 14 Dec 2017 05:45:16 -0800 (PST) X-Google-Smtp-Source: ACJfBote2H+WP0saDl6w6kaRgovOu22NImXUZ2yFkf5DUAb2q7u1qu0d9w+r7BaaxNt/yd5OyqUo X-Received: by 10.159.252.133 with SMTP id bb5mr1774228plb.287.1513259116203; Thu, 14 Dec 2017 05:45:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513259116; cv=none; d=google.com; s=arc-20160816; b=TOUuDaRlK1+nYUDD9Ba10losm9rjLBkhssBH+KoK/lNpB6tUO1wxbFmr4l2W0lB1Sy Vx686OBZaZ/bdW76jSqnbI/30V+o+qBrAhfU0XOvfWpOxZYf9F9XePNU5l1Ly3GuV2p/ X2k+HfkrUpm+EcCjtBiSn3Wsrd5MiLx1Z9nQhGVHVi3Uba1o/W3A6Y8coUYSndtLBPcn zfVvyNLPKJS1J62/mHecZV/CwGCt8qTy6tuK3QmmkONmhmlYuOkcFJbvNUWD0FjOKYrC PIH8+XGY+aucpXWeEzYqRsAlLHwcONXeucVIdhvkeoVBFHFjfiFpyorYB0yTxIPr7W/e IVAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=xCUqj7htHXs6Z5XGalMnlvAE3n0M2vOH0LkIyotS1ZE=; b=S5UF4ZEO7ZuL0IrCEV6LXCiwsf9+gHkYG4LBrhfr6m2+a1NUCJPIaaGL36UQ1RBiHH FOJ+l1ri0jVMdtv91eCqHzgYIXmfAFQ7xgLlSpNmkYDNXC/omv/uqPRXPCZs4ZgWL0px UmhaNd0/kNlQDiaIYA7VKrmoiceeT4/mr71lhyKzkwL4iVVO1XSZ5TlSUNmCJ2xHJkHt KRi4QoXj/j3RQVdK0xPhG5WrBpgPBwomin3iBLEWrMWvCjyqUzTDEIqUBKvybYedpOlw 8y+20u5OcpkYGD5RV+x3SLPsSwJljRM+O3EcTvmXPZOltTY+ZiA73g919hwMtZdGqjdM qOSw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=Z45Xf+Kn; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Thu, 14 Dec 2017 07:41:38 -0600 From: Kishon Vijay Abraham I To: Tony Lindgren , , Santosh Shilimkar CC: Rob Herring , Mark Rutland , Russell King , , , , , , , , Ravikumar Kattekola Subject: [PATCH 10/14] ARM: dts: dra71-evm: Correct evm_sd regulator max voltage Date: Thu, 14 Dec 2017 19:10:50 +0530 Message-ID: <20171214134054.7749-11-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171214134054.7749-1-kishon@ti.com> References: <20171214134054.7749-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ravikumar Kattekola Correct vpo_sd_1v8_3v3 regulator max voltage to 3.3V Fixes: 9868bc585ae2 ("ARM: dts: Add support for dra718-evm") Signed-off-by: Ravikumar Kattekola Signed-off-by: Sekhar Nori Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra71-evm.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.11.0 diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts index 41c9132eb550..64363f75c01a 100644 --- a/arch/arm/boot/dts/dra71-evm.dts +++ b/arch/arm/boot/dts/dra71-evm.dts @@ -24,13 +24,13 @@ regulator-name = "vddshv8"; regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3000000>; + regulator-max-microvolt = <3300000>; regulator-boot-on; vin-supply = <&evm_5v0>; gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; states = <1800000 0x0 - 3000000 0x1>; + 3300000 0x1>; }; evm_1v8_sw: fixedregulator-evm_1v8 { From patchwork Thu Dec 14 13:40:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 121949 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp6821614qgn; Thu, 14 Dec 2017 05:43:19 -0800 (PST) X-Google-Smtp-Source: ACJfBos94JzkC97qoGdB+3OAg90neUzoCgOTQFNAPFKRdGapDBQrSRMKfVdQqtTG5q7vU989vumX X-Received: by 10.98.102.74 with SMTP id a71mr9591897pfc.184.1513258999803; Thu, 14 Dec 2017 05:43:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513258999; cv=none; d=google.com; s=arc-20160816; b=pNcEujjQCTm/9UPWXP0/PY0HEszNB/TrKqGXJ/l8Odgx9MpVIg9IsvPlkbcRgKJBi0 DJrP+TEw2EOWbnDWurR10yZITGbQgFA095Eq28sFolBUgSpRYd/2NaDz/C0rWwUqYGMN kKBJPVBMbI7Zj2jEhPDMIFtifOLnylNyTMV8KyURKWR26TKQe3PQChl4UuHWGMA25lmF sKakqfiRY1mX51Ho4tSiA1ME5tquOH3ads7aPA/A3L741MtwXihu4K3ntN+XihWFaPDj 7YGDd65Ud9modyXg1HeIoFZJ/qeQPsVGZA6OFfsAkIiS8bzDFIDeCEmVRx5cm2d0neoK wwHQ== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id u131si2940937pgc.145.2017.12.14.05.43.19; Thu, 14 Dec 2017 05:43:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=VpWAVwn6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753039AbdLNNnQ (ORCPT + 20 others); Thu, 14 Dec 2017 08:43:16 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:29536 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752780AbdLNNm0 (ORCPT ); Thu, 14 Dec 2017 08:42:26 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBEDfksE012776; Thu, 14 Dec 2017 07:41:46 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1513258906; bh=phxvtFZQQ5B1oFMZyXAflWCP8CaVqk32ik+t02RngWo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=VpWAVwn6edeQAbW0jCiuy6QxRv+BqmvbMCG4bMOuHKfI//EYvMncIsmAXUvIVhyya 7yTonJF7XBmxCYxGp9Io6zLGB45TIEgP/VlI1zqJkmD4KpPdnpKzOQ2OKH7PSgv5wC BZT2uOFs3lvYppmgXyfxiIseYMpfOgxiim4gfBlk= Received: from DLEE109.ent.ti.com (dlee109.ent.ti.com [157.170.170.41]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDfjcW003212; Thu, 14 Dec 2017 07:41:45 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Thu, 14 Dec 2017 07:41:45 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Thu, 14 Dec 2017 07:41:45 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBEDewBO009855; Thu, 14 Dec 2017 07:41:42 -0600 From: Kishon Vijay Abraham I To: Tony Lindgren , , Santosh Shilimkar CC: Rob Herring , Mark Rutland , Russell King , , , , , , , Subject: [PATCH 11/14] ARM: dts: dra71-evm: Select pull down for mmc1_clk line in default mode Date: Thu, 14 Dec 2017 19:10:51 +0530 Message-ID: <20171214134054.7749-12-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171214134054.7749-1-kishon@ti.com> References: <20171214134054.7749-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org During a short period when the bus voltage is switched from 3.3v to 1.8v, (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines are kept in a state according to the programmed pad mux pull type. According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the host should hold CLK low for at least 5ms. In order to keep the card line low during voltage switch, the pad mux of mmc1_clk line should be configured to pull down. This is specific only to dra71-evm (and not all dra72 based boards) since mmc1_clk line in dra71-evm is not connected to an external pullup. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra71-evm.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.11.0 diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts index 64363f75c01a..ebc4bbae981e 100644 --- a/arch/arm/boot/dts/dra71-evm.dts +++ b/arch/arm/boot/dts/dra71-evm.dts @@ -50,6 +50,19 @@ }; }; +&dra7_pmx_core { + mmc1_pins_default: mmc1_pins_default { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */ + DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ + DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ + DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ + DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ + DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ + >; + }; +}; + &i2c1 { status = "okay"; clock-frequency = <400000>; From patchwork Thu Dec 14 13:40:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 121947 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp6820906qgn; Thu, 14 Dec 2017 05:42:41 -0800 (PST) X-Google-Smtp-Source: ACJfBosx0BoG4LSTXmule9/DlWT9X/zmCYjszyirg5wRqHWS2XYrW3kpLaNtg80MTzwu/d2Anm4q X-Received: by 10.159.196.135 with SMTP id c7mr1839855plo.197.1513258961738; Thu, 14 Dec 2017 05:42:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513258961; cv=none; d=google.com; s=arc-20160816; b=sCIQFw9uN34uDchaU8OO5jgpmxPtXWAK0XCUFSTZK+x7h93tZAhYbEpccO6WB+NFEs akxIkMo7lflEwVS+IW5ycCcmWDapa+7TqWmpjaS+JUT12xo7R7ugdkvp0+4whKVa0M8J M7bvvjIWBjxbzvcEOKukHQjP304pRRUIMAzS9eKY8YFAsCvM4U5Ixrvp1PvKf8Ul+VT0 Hexi7NaFiI73cZbNuEiQNltLndWUjZpaGephKpZ8GlBlskO2wJND2w9bnODONPq+Q/OM vgC39k7OqpQ7BriWiF6eNIipb1sOCBka2q03NOgSkpC8RDTZlYWb3OFVNG6QlQ3OyeM7 sYOg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=b6Tope3GF3bREZ4bkBrEHplUha06K7pv2qchT8wZRC0=; b=CcdgWyRCyCN0aAcf91sf0IjYmfefpL/myBVMg89FcpM3ZHISQoSQYwNHd/vqO9FSsZ npJp5Q4ODTb0yBND/yCQOg6Gvw5XwY9Psn6KCvEd7vaQUpV8f0V23JeKk+fs6mAi+vEu VoyPXp+jycRy4aJLiGFTkN2KW238FQ7zGoNCTRMABCEUIKj3jbVUNsMDoQFtb4lrQbEb tzcQDkjMqDR9ETYh1MJCYNfg6sgpy4LVtIdpvaBIxRCYNpGFMNSwIVc/k+QMkPu0nPcQ 6JQbFjeCgrLPWyjsSNztMv+WoECeZH0BjuSYvU2114t6fd8ABoOO4hztecD7fXmmjoMD zgKg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=GFIQ1NXg; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 3 +-- arch/arm/boot/dts/am57xx-idk-common.dtsi | 2 +- arch/arm/boot/dts/dra7-evm.dts | 1 + arch/arm/boot/dts/dra7.dtsi | 25 ++++++++++++++++--------- arch/arm/boot/dts/dra72-evm-common.dtsi | 2 +- arch/arm/boot/dts/dra76-evm.dts | 3 ++- 6 files changed, 22 insertions(+), 14 deletions(-) -- 2.11.0 diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi index 50e7c3c0d111..44e6720bc939 100644 --- a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi @@ -444,8 +444,7 @@ vmmc-supply = <&vdd_3v3>; vqmmc-supply = <&vdd_3v3>; bus-width = <8>; - ti,non-removable; - cap-mmc-dual-data-rate; + non-removable; }; &sata { diff --git a/arch/arm/boot/dts/am57xx-idk-common.dtsi b/arch/arm/boot/dts/am57xx-idk-common.dtsi index 43cdf523a8a0..855c130afc69 100644 --- a/arch/arm/boot/dts/am57xx-idk-common.dtsi +++ b/arch/arm/boot/dts/am57xx-idk-common.dtsi @@ -423,7 +423,7 @@ vmmc-supply = <&v3_3d>; vqmmc-supply = <&v3_3d>; bus-width = <8>; - ti,non-removable; + non-removable; max-frequency = <96000000>; }; diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index ef9c90daa74b..b5ec42f16efc 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -351,6 +351,7 @@ status = "okay"; vmmc-supply = <&evm_1v8_sw>; bus-width = <8>; + non-removable; pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index ac9216293b7c..1acd77f29d0b 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -1057,17 +1057,21 @@ }; mmc1: mmc@4809c000 { - compatible = "ti,omap4-hsmmc"; + compatible = "ti,dra7-sdhci"; reg = <0x4809c000 0x400>; interrupts = ; ti,hwmods = "mmc1"; - ti,dual-volt; - ti,needs-special-reset; - dmas = <&sdma_xbar 61>, <&sdma_xbar 62>; - dma-names = "tx", "rx"; status = "disabled"; pbias-supply = <&pbias_mmc_reg>; max-frequency = <192000000>; + sd-uhs-sdr104; + sd-uhs-sdr50; + sd-uhs-ddr50; + sd-uhs-sdr25; + sd-uhs-sdr12; + cap-sd-highspeed; + mmc-ddr-1_8v; + cap-mmc-highspeed; }; hdqw1w: 1w@480b2000 { @@ -1078,15 +1082,18 @@ }; mmc2: mmc@480b4000 { - compatible = "ti,omap4-hsmmc"; + compatible = "ti,dra7-sdhci"; reg = <0x480b4000 0x400>; interrupts = ; ti,hwmods = "mmc2"; - ti,needs-special-reset; - dmas = <&sdma_xbar 47>, <&sdma_xbar 48>; - dma-names = "tx", "rx"; status = "disabled"; max-frequency = <192000000>; + cap-sd-highspeed; + sd-uhs-sdr25; + sd-uhs-sdr12; + mmc-hs200-1_8v; + mmc-ddr-1_8v; + cap-mmc-highspeed; }; mmc3: mmc@480ad000 { diff --git a/arch/arm/boot/dts/dra72-evm-common.dtsi b/arch/arm/boot/dts/dra72-evm-common.dtsi index 2e485a13dfd7..4f48f97c9c47 100644 --- a/arch/arm/boot/dts/dra72-evm-common.dtsi +++ b/arch/arm/boot/dts/dra72-evm-common.dtsi @@ -421,7 +421,7 @@ pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins_default>; bus-width = <8>; - ti,non-removable; + non-removable; max-frequency = <192000000>; }; diff --git a/arch/arm/boot/dts/dra76-evm.dts b/arch/arm/boot/dts/dra76-evm.dts index 4dd8a5ac8fae..02c01cecc417 100644 --- a/arch/arm/boot/dts/dra76-evm.dts +++ b/arch/arm/boot/dts/dra76-evm.dts @@ -306,7 +306,7 @@ &mmc1 { status = "okay"; vmmc-supply = <&vio_3v3_sd>; - vmmc_aux-supply = <&ldo4_reg>; + vqmmc-supply = <&ldo4_reg>; bus-width = <4>; /* * SDCD signal is not being used here - using the fact that GPIO mode @@ -323,6 +323,7 @@ vmmc-supply = <&vio_1v8>; vqmmc-supply = <&vio_1v8>; bus-width = <8>; + non-removable; pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>;