From patchwork Wed Oct 28 12:33:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 319323 Delivered-To: patch@linaro.org Received: by 2002:a92:7b12:0:0:0:0:0 with SMTP id w18csp35773ilc; Wed, 28 Oct 2020 18:05:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxDPgnLmh7wHF3pRL0n0Ln9H5H6qwMjnOkXDS+KLh1qY1feYriEgv21vYCA7pxWxpcqnqC8 X-Received: by 2002:aa7:d843:: with SMTP id f3mr1682561eds.354.1603933523639; Wed, 28 Oct 2020 18:05:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1603933523; cv=none; d=google.com; s=arc-20160816; b=zsv/7GYIxNQNGr7rcwrONY/S7kfHTiC5YQJArRv01UhcAGwOCQwf7hhAsgivHWa3tP U1n1i/Pst0w1Xw/IjpBQ5W8efuFXOK/1VRyXk5EC30G1T3DqQAZh+UMOVqS8clhfRabt ZgjRmhz0B58nh220rx/piutFRtdDWxykqF3kI3KtOP5H7nhOLTX6kBp/A0mglcO6DqLN p3iqcofg24LXN6wb56LWXNNihyn5emXmaIg6OEtpxGEiTAJxtXBJAWx8AqbnB0fuWzd5 ruHcETDDVYwaJ1tS1w+efbpCLqnthVyyQSLXVS+WRVCVNEC086X3XGLpLAOO9QbjWcq+ uL3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=7KJCSHdCx0eOjsnKEiQeTaBPZJRcHmBtR/m/GYHM5D8=; b=tBp55zhg98ODewaMM1NuESSPbt4GqLdEuwIw60r72YjkTyjPYq2RwnxWH6FkH2v0/4 fTJ1vrTTjLxOJZTNgQT5AHGqjWPq9Ngjq7++ATCbjD4/EVjmzXbV8/YhkNcgkKA5h8gN 2XorVRHsTRsnQLJwqBzA6rgkLd9cc4KhyU6CTmA1nVcnNCQFvBJfbEAHf7m0YnLih7QO r+P8E9rJszIHl6Ly35UUWzz4z1wmeMfJvsQZ4W4bO8Q6Svuhp7TvIz/p8b3pm/rbhoER XMCB0fWYmcz5a5klb/SvKxeg5/p8/z5RNpT9cktsxSaodKMPjYiCplhrvH0h4vERelgz 1G1Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a2si949045edf.60.2020.10.28.18.05.23 for ; Wed, 28 Oct 2020 18:05:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730865AbgJ2BFM (ORCPT ); Wed, 28 Oct 2020 21:05:12 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:6982 "EHLO szxga06-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730036AbgJ1WFo (ORCPT ); Wed, 28 Oct 2020 18:05:44 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga06-in.huawei.com (SkyGuard) with ESMTP id 4CLp3x39q2zhbW6; Wed, 28 Oct 2020 20:37:01 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.487.0; Wed, 28 Oct 2020 20:36:47 +0800 From: John Garry To: , , , , CC: , , , , John Garry Subject: [PATCH v2 1/3] genirq/affinity: Add irq_update_affinity_desc() Date: Wed, 28 Oct 2020 20:33:05 +0800 Message-ID: <1603888387-52499-2-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1603888387-52499-1-git-send-email-john.garry@huawei.com> References: <1603888387-52499-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Add a function to allow the affinity of an interrupt be switched to managed, such that interrupts allocated for platform devices may be managed. Suggested-by: Thomas Gleixner Signed-off-by: John Garry --- include/linux/interrupt.h | 8 ++++++++ kernel/irq/manage.c | 19 +++++++++++++++++++ 2 files changed, 27 insertions(+) -- 2.26.2 diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index ee8299eb1f52..870b3251e174 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -352,6 +352,8 @@ extern int irq_can_set_affinity(unsigned int irq); extern int irq_select_affinity(unsigned int irq); extern int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m); +extern int irq_update_affinity_desc(unsigned int irq, + struct irq_affinity_desc *affinity); extern int irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify); @@ -387,6 +389,12 @@ static inline int irq_set_affinity_hint(unsigned int irq, return -EINVAL; } +static inline int irq_update_affinity_desc(unsigned int irq, + struct irq_affinity_desc *affinity) +{ + return -EINVAL; +} + static inline int irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) { diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c index c460e0496006..b96af4cde4bc 100644 --- a/kernel/irq/manage.c +++ b/kernel/irq/manage.c @@ -371,6 +371,25 @@ int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask, return ret; } +int irq_update_affinity_desc(unsigned int irq, + struct irq_affinity_desc *affinity) +{ + unsigned long flags; + struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); + + if (!desc) + return -EINVAL; + + if (affinity->is_managed) { + irqd_set(&desc->irq_data, IRQD_AFFINITY_MANAGED); + irqd_set(&desc->irq_data, IRQD_MANAGED_SHUTDOWN); + } + + cpumask_copy(desc->irq_common_data.affinity, &affinity->mask); + irq_put_desc_unlock(desc, flags); + return 0; +} + int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force) { struct irq_desc *desc = irq_to_desc(irq); From patchwork Wed Oct 28 12:33:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 319325 Delivered-To: patch@linaro.org Received: by 2002:a92:7b12:0:0:0:0:0 with SMTP id w18csp45071ilc; Wed, 28 Oct 2020 18:22:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy3o3peqeoPbFKtr8iUhhfsKNHZpF3m9iM2l4Gyl6FZGk3Si8BpFGgxdSUVUk9vJQGxAY2o X-Received: by 2002:aa7:cfc1:: with SMTP id r1mr1742503edy.138.1603934545199; Wed, 28 Oct 2020 18:22:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1603934545; cv=none; d=google.com; s=arc-20160816; b=i0/3PqatHQUPfPemau+ou1VHqYh69r0ajPmwfXPVZJMNgEVX/hRP6ZhrYjozEoeRsG fq2lEMuxh1eQjcdbtTuta2loyQ7N282KHZWqK3kdRrv+NkX5pKgix5ta1mAgxTn3SkpO MkoYZDqLEdykZjtAlaWUF0y8jdwKH5QYR9UPLwU6U46rNIOqeITlqSio7sP8mnnmsLoL T4t2rsaErbwnymReLM3dKCgCnsy8Xa7oEaGSWSgiXpTMHsEEZjUE8nxANx4rU+qtbg8n vMKHGXiJ2w7JEwbcKuSOW/ej3hPc7DzeSzzgjua8jpI8Zfie0O3IEzz2asY/BrgK/6ur oH8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from; bh=wAHb5kadjJRL6mW5h4QqywjqmkGghAtBuSuyOdd/KKE=; b=yO//jjjpXu1YUqEMRREZ38j8op5j9YAo+6mYZbSQTZhxKIssrzfVsgu4W+/b/N3XqV /qvIqzZuDsDf6iCk07NrdgjYDqOTkzc0c6GW3xPuvHRa/c3w39wnE1Ux7Y0gLlU2cvL5 rsZN/mjQOXMm4QuaybRLdDc3hjhR6MslMs0C/9Blj+NbGt779PIaOy/F1FV7CCef3YPH dscS8Q3EKr0+wf4i2T7qQr/wm9letvpidlF9XsuHLLMOu/0B4PXRMK2e3a4NKOzuHxW8 SGdx51hJG9JjVQapSONLS/p7/KFycAJSgdZW6gW0L/3puj1D5RR45qCqwqjTGehkuS2/ FJuA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id yl23si849427ejb.441.2020.10.28.18.22.25 for ; Wed, 28 Oct 2020 18:22:25 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-scsi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-scsi-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729602AbgJ1WEx (ORCPT ); Wed, 28 Oct 2020 18:04:53 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:7075 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728221AbgJ1WCN (ORCPT ); Wed, 28 Oct 2020 18:02:13 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4CLp3v5KtTzLqWJ; Wed, 28 Oct 2020 20:36:59 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.487.0; Wed, 28 Oct 2020 20:36:47 +0800 From: John Garry To: , , , , CC: , , , , John Garry Subject: [PATCH v2 2/3] Driver core: platform: Add platform_get_irqs_affinity() Date: Wed, 28 Oct 2020 20:33:06 +0800 Message-ID: <1603888387-52499-3-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1603888387-52499-1-git-send-email-john.garry@huawei.com> References: <1603888387-52499-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org Drivers for multi-queue platform devices may also want managed interrupts for handling HW queue completion interrupts, so add support. The function accepts an affinity descriptor pointer, which covers all IRQs expected for the device. The platform device driver is expected to hold all the IRQ numbers, as there is no point in holding these in the common platform_device structure. Signed-off-by: John Garry --- drivers/base/platform.c | 58 +++++++++++++++++++++++++++++++++ include/linux/platform_device.h | 5 +++ 2 files changed, 63 insertions(+) -- 2.26.2 diff --git a/drivers/base/platform.c b/drivers/base/platform.c index 88aef93eb4dd..c110b35469d6 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c @@ -269,6 +269,64 @@ int platform_get_irq(struct platform_device *dev, unsigned int num) } EXPORT_SYMBOL_GPL(platform_get_irq); +/** + * platform_get_irqs_affinity - get all IRQs for a device using an affinity + * descriptor + * @dev: platform device pointer + * @affd: affinity descriptor, must be set + * @count: pointer to count of IRQS + * @irqs: pointer holder for IRQ numbers + * + * Gets a full set of IRQs for a platform device, and updates IRQ afffinty + * according to the passed affinity descriptor + * + * Return: 0 on success, negative error number on failure. + */ +int platform_get_irqs_affinity(struct platform_device *dev, + struct irq_affinity *affd, + unsigned int *count, + int **irqs) +{ + struct irq_affinity_desc *desc; + int i, *pirqs; + + if (!affd) + return -EPERM; + + *count = platform_irq_count(dev); + + if (*count <= affd->pre_vectors + affd->post_vectors) + return -EIO; + + pirqs = kcalloc(*count, sizeof(int), GFP_KERNEL); + if (!pirqs) + return -ENOMEM; + + for (i = 0; i < *count; i++) { + int irq = platform_get_irq(dev, i); + if (irq < 0) { + kfree(pirqs); + return irq; + } + pirqs[i] = irq; + } + + desc = irq_create_affinity_masks(*count, affd); + if (!desc) { + kfree(pirqs); + return -ENOMEM; + } + + for (i = 0; i < *count; i++) + irq_update_affinity_desc(pirqs[i], &desc[i]); + + kfree(desc); + *irqs = pirqs; + + return 0; +} +EXPORT_SYMBOL_GPL(platform_get_irqs_affinity); + /** * platform_irq_count - Count the number of IRQs a platform device uses * @dev: platform device diff --git a/include/linux/platform_device.h b/include/linux/platform_device.h index 77a2aada106d..c3f4fc5a76b9 100644 --- a/include/linux/platform_device.h +++ b/include/linux/platform_device.h @@ -11,6 +11,7 @@ #define _PLATFORM_DEVICE_H_ #include +#include #define PLATFORM_DEVID_NONE (-1) #define PLATFORM_DEVID_AUTO (-2) @@ -70,6 +71,10 @@ devm_platform_ioremap_resource_byname(struct platform_device *pdev, extern int platform_get_irq(struct platform_device *, unsigned int); extern int platform_get_irq_optional(struct platform_device *, unsigned int); extern int platform_irq_count(struct platform_device *); +extern int platform_get_irqs_affinity(struct platform_device *dev, + struct irq_affinity *affd, + unsigned int *count, + int **irqs); extern struct resource *platform_get_resource_byname(struct platform_device *, unsigned int, const char *); From patchwork Wed Oct 28 12:33:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Garry X-Patchwork-Id: 311113 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED730C388F7 for ; Thu, 29 Oct 2020 01:22:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A74E02064C for ; Thu, 29 Oct 2020 01:22:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729475AbgJ1WEx (ORCPT ); Wed, 28 Oct 2020 18:04:53 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:7076 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729338AbgJ1WCN (ORCPT ); Wed, 28 Oct 2020 18:02:13 -0400 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4CLp3v577DzLqVv; Wed, 28 Oct 2020 20:36:59 +0800 (CST) Received: from localhost.localdomain (10.69.192.58) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.487.0; Wed, 28 Oct 2020 20:36:47 +0800 From: John Garry To: , , , , CC: , , , , John Garry Subject: [PATCH v2 3/3] scsi: hisi_sas: Expose HW queues for v2 hw Date: Wed, 28 Oct 2020 20:33:07 +0800 Message-ID: <1603888387-52499-4-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1603888387-52499-1-git-send-email-john.garry@huawei.com> References: <1603888387-52499-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.58] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-scsi@vger.kernel.org As a performance enhancement, make the completion queue interrupts managed. In addition, in commit bf0beec0607d ("blk-mq: drain I/O when all CPUs in a hctx are offline"), CPU hotplug for MQ devices using managed interrupts is made safe. So expose HW queues to blk-mq to take advantage of this. Flag Scsi_host.host_tagset is also set to ensure that the HBA is not sent more commands than it can handle. However the driver still does not use request tag for IPTT as there are many HW bugs which means that special rules apply for IPTT allocation. Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas.h | 4 ++ drivers/scsi/hisi_sas/hisi_sas_main.c | 11 ++++ drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 71 ++++++++++++++++++++++---- 3 files changed, 75 insertions(+), 11 deletions(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas.h b/drivers/scsi/hisi_sas/hisi_sas.h index a25cfc11c96d..33c4fb45dd99 100644 --- a/drivers/scsi/hisi_sas/hisi_sas.h +++ b/drivers/scsi/hisi_sas/hisi_sas.h @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -312,6 +313,7 @@ enum { struct hisi_sas_hw { int (*hw_init)(struct hisi_hba *hisi_hba); + int (*interrupt_preinit)(struct hisi_hba *hisi_hba); void (*setup_itct)(struct hisi_hba *hisi_hba, struct hisi_sas_device *device); int (*slot_index_alloc)(struct hisi_hba *hisi_hba, @@ -418,6 +420,8 @@ struct hisi_hba { u32 refclk_frequency_mhz; u8 sas_addr[SAS_ADDR_SIZE]; + int irq_map[128]; /* v2 hw */ + int n_phy; spinlock_t lock; struct semaphore sem; diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c index 128583dfccf2..56f914203679 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_main.c +++ b/drivers/scsi/hisi_sas/hisi_sas_main.c @@ -2614,6 +2614,13 @@ static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev, return NULL; } +static int hisi_sas_interrupt_preinit(struct hisi_hba *hisi_hba) +{ + if (hisi_hba->hw->interrupt_preinit) + return hisi_hba->hw->interrupt_preinit(hisi_hba); + return 0; +} + int hisi_sas_probe(struct platform_device *pdev, const struct hisi_sas_hw *hw) { @@ -2671,6 +2678,10 @@ int hisi_sas_probe(struct platform_device *pdev, sha->sas_port[i] = &hisi_hba->port[i].sas_port; } + rc = hisi_sas_interrupt_preinit(hisi_hba); + if (rc) + goto err_out_ha; + rc = scsi_add_host(shost, &pdev->dev); if (rc) goto err_out_ha; diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c index b57177b52fac..d6b933c3d0a2 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c +++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c @@ -3302,6 +3302,37 @@ static irq_handler_t fatal_interrupts[HISI_SAS_FATAL_INT_NR] = { fatal_axi_int_v2_hw }; +static int hisi_sas_v2_interrupt_preinit(struct hisi_hba *hisi_hba) +{ + struct platform_device *pdev = hisi_hba->platform_dev; + struct Scsi_Host *shost = hisi_hba->shost; + int rc, i, *irqs, count; + struct irq_affinity desc = { + .pre_vectors = 96, /* base of completion queue interrupts */ + .post_vectors = 16, + }; + + rc = platform_get_irqs_affinity(pdev, &desc, &count, &irqs); + if (rc < 0) + return rc; + + /* 128 interrupts are always expected */ + if (count != 128) { + kfree(irqs); + return -EIO; + } + + /* Store the IRQ numbers in the driver */ + for (i = 0; i < 128; i++) + hisi_hba->irq_map[i] = irqs[i]; + + shost->nr_hw_queues = hisi_hba->cq_nvecs = hisi_hba->queue_count; + + kfree(irqs); + + return 0; +} + /* * There is a limitation in the hip06 chipset that we need * to map in all mbigen interrupts, even if they are not used. @@ -3310,14 +3341,11 @@ static int interrupt_init_v2_hw(struct hisi_hba *hisi_hba) { struct platform_device *pdev = hisi_hba->platform_dev; struct device *dev = &pdev->dev; - int irq, rc = 0, irq_map[128]; + int irq, rc = 0; int i, phy_no, fatal_no, queue_no; - for (i = 0; i < 128; i++) - irq_map[i] = platform_get_irq(pdev, i); - for (i = 0; i < HISI_SAS_PHY_INT_NR; i++) { - irq = irq_map[i + 1]; /* Phy up/down is irq1 */ + irq = hisi_hba->irq_map[i + 1]; /* Phy up/down is irq1 */ rc = devm_request_irq(dev, irq, phy_interrupts[i], 0, DRV_NAME " phy", hisi_hba); if (rc) { @@ -3331,7 +3359,7 @@ static int interrupt_init_v2_hw(struct hisi_hba *hisi_hba) for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { struct hisi_sas_phy *phy = &hisi_hba->phy[phy_no]; - irq = irq_map[phy_no + 72]; + irq = hisi_hba->irq_map[phy_no + 72]; rc = devm_request_irq(dev, irq, sata_int_v2_hw, 0, DRV_NAME " sata", phy); if (rc) { @@ -3343,7 +3371,7 @@ static int interrupt_init_v2_hw(struct hisi_hba *hisi_hba) } for (fatal_no = 0; fatal_no < HISI_SAS_FATAL_INT_NR; fatal_no++) { - irq = irq_map[fatal_no + 81]; + irq = hisi_hba->irq_map[fatal_no + 81]; rc = devm_request_irq(dev, irq, fatal_interrupts[fatal_no], 0, DRV_NAME " fatal", hisi_hba); if (rc) { @@ -3357,7 +3385,7 @@ static int interrupt_init_v2_hw(struct hisi_hba *hisi_hba) for (queue_no = 0; queue_no < hisi_hba->queue_count; queue_no++) { struct hisi_sas_cq *cq = &hisi_hba->cq[queue_no]; - cq->irq_no = irq_map[queue_no + 96]; + cq->irq_no = hisi_hba->irq_map[queue_no + 96]; rc = devm_request_threaded_irq(dev, cq->irq_no, cq_interrupt_v2_hw, cq_thread_v2_hw, IRQF_ONESHOT, @@ -3368,10 +3396,8 @@ static int interrupt_init_v2_hw(struct hisi_hba *hisi_hba) rc = -ENOENT; goto err_out; } + cq->irq_mask = irq_get_affinity_mask(cq->irq_no); } - - hisi_hba->cq_nvecs = hisi_hba->queue_count; - err_out: return rc; } @@ -3529,6 +3555,26 @@ static struct device_attribute *host_attrs_v2_hw[] = { NULL }; +static int map_queues_v2_hw(struct Scsi_Host *shost) +{ + struct hisi_hba *hisi_hba = shost_priv(shost); + struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT]; + const struct cpumask *mask; + unsigned int queue, cpu; + + for (queue = 0; queue < qmap->nr_queues; queue++) { + mask = irq_get_affinity_mask(hisi_hba->irq_map[96 + queue]); + if (!mask) + continue; + + for_each_cpu(cpu, mask) + qmap->mq_map[cpu] = qmap->queue_offset + queue; + } + + return 0; + +} + static struct scsi_host_template sht_v2_hw = { .name = DRV_NAME, .proc_name = DRV_NAME, @@ -3553,10 +3599,13 @@ static struct scsi_host_template sht_v2_hw = { #endif .shost_attrs = host_attrs_v2_hw, .host_reset = hisi_sas_host_reset, + .map_queues = map_queues_v2_hw, + .host_tagset = 1, }; static const struct hisi_sas_hw hisi_sas_v2_hw = { .hw_init = hisi_sas_v2_init, + .interrupt_preinit = hisi_sas_v2_interrupt_preinit, .setup_itct = setup_itct_v2_hw, .slot_index_alloc = slot_index_alloc_quirk_v2_hw, .alloc_dev = alloc_dev_quirk_v2_hw,