From patchwork Tue Oct 20 07:32:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 318759 Delivered-To: patch@linaro.org Received: by 2002:a92:d1d1:0:0:0:0:0 with SMTP id u17csp1044181ilg; Tue, 20 Oct 2020 00:32:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxJhRXQYsQVDoefiwKz9rB5ERKBcQ3zbbhBHg/5NR1LJP1JyTSdKdZADgPHVVXNqXfgF5s1 X-Received: by 2002:a50:9ec6:: with SMTP id a64mr1389322edf.382.1603179150488; Tue, 20 Oct 2020 00:32:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1603179150; cv=none; d=google.com; s=arc-20160816; b=FILTaeJJwggUOzuGaFgrNU1L2Y/c/tTrvab7kkvhEcRXl0NINrDSjPJNCTVs4o2L0O McEOzuIwVTGZVhgoh+GxkkbNXrsULorU/Y58KYeAoeEUjzyJlMOW7lFxXEKkIIVa27+c YngotaLgErP7SH1v5MVZc7QZNeihQyPzynSNh3uZe8Plv0AT9Bua/eQVkxFUmH0NUP8p gMr1tG4YiTNK2wxuhjre2rEld+eSDgVrZpvy7Xky02E7RC47C2GF/7bFevzIDpnNA/gZ 4L6ih96Fw1+McLt1AQRR8Ik42IorWydWfZEqeTLg9jf7tZpId75nzo+3WcJFAa3YpPeG kAnw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4NPm+f2JwROmY0jcGX6zDh7AfDuMzQF7QjzVLDyH9hY=; b=KrzDrQy7a0efpTpqjubfu5W+W+TSWAOHLvR4R+N8RXtms9jyPbAWWKeuCLvUgrwmXa vJmZV2GjZ3NZnSCUOIIU7bzmwF2zCq4hUNIkYQJY/4FWk3uLWD097e34aBOKuvOnhOO5 isWEFmo+5znF4STuAHEE60Q8nm8KwdZ3ZXP2XWbZl8HGMTUu89A/f2+KjMn9pa/aMnFq FW8AZDGoPAOrUY9BqUFurHxWa/2ewbFzHYZ5OcwbkV2S21HGWWkAotas/6fVmbwQbZoL 4x+J4MoKcODNeNnDsvYDyiHNRoNhQQfBXni25wZja6v92yPpC+QCggyW5TyEo6DNpOoW VMxw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hHay811T; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t24si642549edw.20.2020.10.20.00.32.30; Tue, 20 Oct 2020 00:32:30 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hHay811T; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405121AbgJTHc3 (ORCPT + 6 others); Tue, 20 Oct 2020 03:32:29 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:38056 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2405114AbgJTHc3 (ORCPT ); Tue, 20 Oct 2020 03:32:29 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 09K7WJAA036886; Tue, 20 Oct 2020 02:32:19 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1603179139; bh=4NPm+f2JwROmY0jcGX6zDh7AfDuMzQF7QjzVLDyH9hY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hHay811TZqoELS9VAfloKy4n1C0uhOkzZMqJaFoy7uAFohbV1mC4fP4G/yk0YXr86 GrAFkGfcIhc9RcEl74ZRPRXH8MGF4FXxB1dxwfi8VUAbO7SbSEOwJVzisIimg0sKg3 NK/cuHFcxmSiNmaCCwEroC9TlWBmhKYoLLeuPESY= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 09K7WJ6L028640 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 20 Oct 2020 02:32:19 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 20 Oct 2020 02:32:18 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 20 Oct 2020 02:32:18 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 09K7WCic069455; Tue, 20 Oct 2020 02:32:16 -0500 From: Peter Ujfalusi To: , , , , , , , CC: , , Subject: [PATCH v3 1/2] dt-bindings: irqchip: ti, sci-inta: Update for unmapped event handling Date: Tue, 20 Oct 2020 10:32:42 +0300 Message-ID: <20201020073243.19255-2-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201020073243.19255-1-peter.ujfalusi@ti.com> References: <20201020073243.19255-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The new DMA architecture introduced with AM64 introduced new event types: unampped events. These events are mapped within INTA in contrast to other K3 devices where the events with similar function was originating from the UDMAP or ringacc. The ti,unmapped-event-sources should contain phandle array to the devices in the system (typically DMA controllers) from where the unmapped events originate. Signed-off-by: Peter Ujfalusi Reviewed-by: Rob Herring --- .../bindings/interrupt-controller/ti,sci-inta.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml index c7cd05656a3e..cc795498488f 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml @@ -32,6 +32,11 @@ description: | | | vint | bit | | 0 |.....|63| vintx | | +--------------+ +------------+ | | | + | Unmap | + | +--------------+ | + Unmapped events ----->| | umapidx |-------------------------> Globalevents + | +--------------+ | + | | +-----------------------------------------+ Configuration of these Intmap registers that maps global events to vint is @@ -70,6 +75,11 @@ properties: - description: | "limit" specifies the limit for translation + ti,unmapped-event-sources: + $ref: /schemas/types.yaml#definitions/phandle-array + description: + Array of phandles to DMA controllers where the unmapped events originate. + required: - compatible - reg From patchwork Tue Oct 20 07:32:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 318761 Delivered-To: patch@linaro.org Received: by 2002:a92:d1d1:0:0:0:0:0 with SMTP id u17csp1044612ilg; Tue, 20 Oct 2020 00:33:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzE/dLs1CgudDez6S54MHabZfJxJtwQAyHVY/dxYzRnr0T6dsgMBo+3yo7X6u1OgOJMuk2J X-Received: by 2002:a05:6402:1cbb:: with SMTP id cz27mr1373027edb.38.1603179194928; Tue, 20 Oct 2020 00:33:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1603179194; cv=none; d=google.com; s=arc-20160816; b=GyFA9s0mNm8ldftw4NjJNsMZEOv+t1Sua5MEOAn0ZU25j2zyG8sF+OaLhh0cP7hR1e ipY4zr5x8+PyMva39KsXTwL9N70alLe4X1WoAaZ2JPwDnECcsfoXzpTg69GFXQSYBHTg o21j7kmzm5MWKhfHb/pcl737qjSUmPlyYIL1HYs+azyKDXvHs2fvf6d/8D5YZLstHfLl d5EtKT2dn3R1wUze+O32zyaGbkAhLHpY1m99zQ9+Xmxzorhw5lji+MTCyO4q6PNlOUs8 We1TqUNaXxqdaYW4JrkfwmWetsvDjm4WyFdQip2SkEkEvhfRC4KPHJ8ejB+LS49rUw6K jyPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=8VCLbjZNFvQajYb9DjyRzVeIPKJ6kvSBGwv/2GfPNfA=; b=pF+ywnO8aTxdfmtDdrwPgRY0LZQ9KA8GbKxE/9A7yqAEx6/KiPj04sJfNnEtcHJrb4 F5tebePzhil5eRRTkxRBNZpfswHUmNMrBPgrZK2VrvMmp+G/xuRDJlgQAEsXdKFsDErI KRuLxWdbCPjg+n/mZSDOR1nfBghDoFqKRn6SVIhPZjRpb55qUGWwlRivwpxI0/rjXt8Q 17rGrOKM81crM5ry/UV832FbGgS00gtFlTtBPHKutJT2QLSp61y/H/5M54EPRLOEUKc5 vwbqLMhtgpgYG4wYjEaIuwy7at985WFphX9tCcL4i4HHucgOIUVHG9Gdl8kU1xTlzji9 uDMQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=J9V6hRl8; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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In order to keep the current SW stack working, the INTA driver must replace the dev_id with it's own when a request comes for BCDMA or PKTDMA resources. Implement parsing of the optional "ti,unmapped-event-sources" phandle array to get the sci-dev-ids of the devices where the unmapped events originate. Signed-off-by: Peter Ujfalusi --- drivers/irqchip/irq-ti-sci-inta.c | 83 +++++++++++++++++++++++++++++-- 1 file changed, 80 insertions(+), 3 deletions(-) -- Peter Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki diff --git a/drivers/irqchip/irq-ti-sci-inta.c b/drivers/irqchip/irq-ti-sci-inta.c index e0cceb81c648..b2ab8db439d9 100644 --- a/drivers/irqchip/irq-ti-sci-inta.c +++ b/drivers/irqchip/irq-ti-sci-inta.c @@ -85,6 +85,17 @@ struct ti_sci_inta_vint_desc { * @base: Base address of the memory mapped IO registers * @pdev: Pointer to platform device. * @ti_sci_id: TI-SCI device identifier + * @unmapped_cnt: Number of @unmapped_dev_ids entries + * @unmapped_dev_ids: Pointer to an array of TI-SCI device identifiers of + * unmapped event sources. + * Unmapped Events are not part of the Global Event Map and + * they are converted to Global event within INTA to be + * received by the same INTA to generate an interrupt. + * In case an interrupt request comes for a device which is + * generating Unmapped Event, we must use the INTA's TI-SCI + * device identifier in place of the source device + * identifier to let sysfw know where it has to program the + * Global Event number. */ struct ti_sci_inta_irq_domain { const struct ti_sci_handle *sci; @@ -96,11 +107,37 @@ struct ti_sci_inta_irq_domain { void __iomem *base; struct platform_device *pdev; u32 ti_sci_id; + + int unmapped_cnt; + u16 *unmapped_dev_ids; }; #define to_vint_desc(e, i) container_of(e, struct ti_sci_inta_vint_desc, \ events[i]) +static u16 ti_sci_inta_get_dev_id(struct ti_sci_inta_irq_domain *inta, u32 hwirq) +{ + u16 dev_id = HWIRQ_TO_DEVID(hwirq); + int i; + + if (inta->unmapped_cnt == 0) + return dev_id; + + /* + * For devices sending Unmapped Events we must use the INTA's TI-SCI + * device identifier number to be able to convert it to a Global Event + * and map it to an interrupt. + */ + for (i = 0; i < inta->unmapped_cnt; i++) { + if (dev_id == inta->unmapped_dev_ids[i]) { + dev_id = inta->ti_sci_id; + break; + } + } + + return dev_id; +} + /** * ti_sci_inta_irq_handler() - Chained IRQ handler for the vint irqs * @desc: Pointer to irq_desc corresponding to the irq @@ -251,7 +288,7 @@ static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_event(struct ti_sci_inta u16 dev_id, dev_index; int err; - dev_id = HWIRQ_TO_DEVID(hwirq); + dev_id = ti_sci_inta_get_dev_id(inta, hwirq); dev_index = HWIRQ_TO_IRQID(hwirq); event_desc = &vint_desc->events[free_bit]; @@ -352,14 +389,15 @@ static void ti_sci_inta_free_irq(struct ti_sci_inta_event_desc *event_desc, { struct ti_sci_inta_vint_desc *vint_desc; struct ti_sci_inta_irq_domain *inta; + u16 dev_id; vint_desc = to_vint_desc(event_desc, event_desc->vint_bit); inta = vint_desc->domain->host_data; + dev_id = ti_sci_inta_get_dev_id(inta, hwirq); /* free event irq */ mutex_lock(&inta->vint_mutex); inta->sci->ops.rm_irq_ops.free_event_map(inta->sci, - HWIRQ_TO_DEVID(hwirq), - HWIRQ_TO_IRQID(hwirq), + dev_id, HWIRQ_TO_IRQID(hwirq), inta->ti_sci_id, vint_desc->vint_id, event_desc->global_event, @@ -574,6 +612,41 @@ static struct msi_domain_info ti_sci_inta_msi_domain_info = { .chip = &ti_sci_inta_msi_irq_chip, }; +static int ti_sci_inta_get_unmapped_sources(struct ti_sci_inta_irq_domain *inta) +{ + struct device *dev = &inta->pdev->dev; + struct device_node *node = dev_of_node(dev); + struct of_phandle_iterator it; + int count, err, ret, i; + + count = of_count_phandle_with_args(node, "ti,unmapped-event-sources", NULL); + if (count <= 0) + return 0; + + inta->unmapped_dev_ids = devm_kcalloc(dev, count, + sizeof(*inta->unmapped_dev_ids), + GFP_KERNEL); + if (!inta->unmapped_dev_ids) + return -ENOMEM; + + i = 0; + of_for_each_phandle(&it, err, node, "ti,unmapped-event-sources", NULL, 0) { + u32 dev_id; + + ret = of_property_read_u32(it.node, "ti,sci-dev-id", &dev_id); + if (ret) { + dev_err(dev, "ti,sci-dev-id read failure for %pOFf\n", it.node); + of_node_put(it.node); + return ret; + } + inta->unmapped_dev_ids[i++] = dev_id; + } + + inta->unmapped_cnt = count; + + return 0; +} + static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev) { struct irq_domain *parent_domain, *domain, *msi_domain; @@ -629,6 +702,10 @@ static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev) if (IS_ERR(inta->base)) return PTR_ERR(inta->base); + ret = ti_sci_inta_get_unmapped_sources(inta); + if (ret) + return ret; + domain = irq_domain_add_linear(dev_of_node(dev), ti_sci_get_num_resources(inta->vint), &ti_sci_inta_irq_domain_ops, inta);