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[23.128.96.18]) by mx.google.com with ESMTP id u20si3713663edr.287.2020.11.12.05.03.23; Thu, 12 Nov 2020 05:03:23 -0800 (PST) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PFcVzw9c; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728251AbgKLNDS (ORCPT + 7 others); Thu, 12 Nov 2020 08:03:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45702 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727739AbgKLNDR (ORCPT ); Thu, 12 Nov 2020 08:03:17 -0500 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DCEACC0613D4 for ; Thu, 12 Nov 2020 05:03:16 -0800 (PST) Received: by mail-wr1-x443.google.com with SMTP id c17so5872373wrc.11 for ; Thu, 12 Nov 2020 05:03:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xTMMX1Pvjrqo3g92TeWy/MVRmSEOT3mZNLGRmeCzu6U=; b=PFcVzw9c4IleobHYPZy7OVt9MV2fDkJIx8ArG94I9OiXBXpTpGTx2Joy/6NaaXrC1S lsEhim/0YR672yuxYcWchojQRZLyMo+iZTmf1HWCy5fatUgAY4fuiuxW5rnJualsqLN8 cX2ysyiSAk3vo0jUTLoLXQef+ZExMHIZ0NoQWtCMKot8fyZRM60Obc7nL7Rl0pqZkonx Xp/jrSId+YmykyRMeu1UqqizhN4hbEMbhJoLGyU1SsATG9rmIzDKZ3k+XmL6yvLocYKE XofSoudFCCtckSvPTpkHM4z3yDENT2NoeLjUYY8WCrdwsRANwBLubfZm5gs3ryp2wjyj lB1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xTMMX1Pvjrqo3g92TeWy/MVRmSEOT3mZNLGRmeCzu6U=; b=UXPRUnx2blUvMHktulgKIdZqNbFBBgl5zb6l2BC8vhLzZPFmqsZhSkTqCWGLvLA5Sb D2Ri0+0p8lE7YeoF3sPxU1voHeORwu//RETeghDKjQxIkw8aiKX13nlhVJjDX/rQ1M08 5NF4QF9N1f1DiHXXUpx7Bt6frr9vhS21NQS58f0hr05a+nOvz1th6/eU02l7DplyjKrZ 5z4AfclWw/XGpTso498g91Ei3ZEU6/UC+g6N037NINCmiZePQ5dqRlIvvlhBesB9Exw9 Lz1VXyLtvv3t8HY4VdF46jwZFU3fj9t9GpfOLSALH6Vv5xxsfHG2gfrwYrgGHtB6CrLp VoYg== X-Gm-Message-State: AOAM531zh9stOWgMVdmPBfnyhlU3H7hWl/C/73kjw15di2ukIK+GFoUI 5QCQMSvrCFV/ZdtE03pwUSz33Q== X-Received: by 2002:adf:fa82:: with SMTP id h2mr14646338wrr.24.1605186195453; Thu, 12 Nov 2020 05:03:15 -0800 (PST) Received: from localhost.localdomain ([2001:1715:4e26:a7e0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id m22sm6877508wrb.97.2020.11.12.05.03.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Nov 2020 05:03:14 -0800 (PST) From: Jean-Philippe Brucker To: joro@8bytes.org, will@kernel.org, lorenzo.pieralisi@arm.com, robh+dt@kernel.org Cc: guohanjun@huawei.com, sudeep.holla@arm.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, bhelgaas@google.com, Jonathan.Cameron@huawei.com, eric.auger@redhat.com, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, baolu.lu@linux.intel.com, zhangfei.gao@linaro.org, shameerali.kolothum.thodi@huawei.com, vivek.gautam@arm.com, Jean-Philippe Brucker Subject: [PATCH v8 1/9] iommu: Add a page fault handler Date: Thu, 12 Nov 2020 13:55:13 +0100 Message-Id: <20201112125519.3987595-2-jean-philippe@linaro.org> X-Mailer: git-send-email 2.29.1 In-Reply-To: <20201112125519.3987595-1-jean-philippe@linaro.org> References: <20201112125519.3987595-1-jean-philippe@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Some systems allow devices to handle I/O Page Faults in the core mm. For example systems implementing the PCIe PRI extension or Arm SMMU stall model. Infrastructure for reporting these recoverable page faults was added to the IOMMU core by commit 0c830e6b3282 ("iommu: Introduce device fault report API"). Add a page fault handler for host SVA. IOMMU driver can now instantiate several fault workqueues and link them to IOPF-capable devices. Drivers can choose between a single global workqueue, one per IOMMU device, one per low-level fault queue, one per domain, etc. When it receives a fault event, supposedly in an IRQ handler, the IOMMU driver reports the fault using iommu_report_device_fault(), which calls the registered handler. The page fault handler then calls the mm fault handler, and reports either success or failure with iommu_page_response(). When the handler succeeded, the IOMMU retries the access. The iopf_param pointer could be embedded into iommu_fault_param. But putting iopf_param into the iommu_param structure allows us not to care about ordering between calls to iopf_queue_add_device() and iommu_register_device_fault_handler(). Signed-off-by: Jean-Philippe Brucker --- v8: * Re-use CONFIG_IOMMU_SVA_LIB and move definitions to iommu-sva-lib.h, since this is an API internal to IOMMU drivers. * Fix typos. --- drivers/iommu/Makefile | 1 + drivers/iommu/iommu-sva-lib.h | 53 ++++ include/linux/iommu.h | 2 + drivers/iommu/io-pgfault.c | 462 ++++++++++++++++++++++++++++++++++ 4 files changed, 518 insertions(+) create mode 100644 drivers/iommu/io-pgfault.c -- 2.29.1 diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile index 61bd30cd8369..60fafc23dee6 100644 --- a/drivers/iommu/Makefile +++ b/drivers/iommu/Makefile @@ -28,3 +28,4 @@ obj-$(CONFIG_S390_IOMMU) += s390-iommu.o obj-$(CONFIG_HYPERV_IOMMU) += hyperv-iommu.o obj-$(CONFIG_VIRTIO_IOMMU) += virtio-iommu.o obj-$(CONFIG_IOMMU_SVA_LIB) += iommu-sva-lib.o +obj-$(CONFIG_IOMMU_SVA_LIB) += io-pgfault.o diff --git a/drivers/iommu/iommu-sva-lib.h b/drivers/iommu/iommu-sva-lib.h index b40990aef3fd..031155010ca8 100644 --- a/drivers/iommu/iommu-sva-lib.h +++ b/drivers/iommu/iommu-sva-lib.h @@ -12,4 +12,57 @@ int iommu_sva_alloc_pasid(struct mm_struct *mm, ioasid_t min, ioasid_t max); void iommu_sva_free_pasid(struct mm_struct *mm); struct mm_struct *iommu_sva_find(ioasid_t pasid); +/* I/O Page fault */ +struct device; +struct iommu_fault; +struct iopf_queue; + +#ifdef CONFIG_IOMMU_SVA_LIB +int iommu_queue_iopf(struct iommu_fault *fault, void *cookie); + +int iopf_queue_add_device(struct iopf_queue *queue, struct device *dev); +int iopf_queue_remove_device(struct iopf_queue *queue, + struct device *dev); +int iopf_queue_flush_dev(struct device *dev); +struct iopf_queue *iopf_queue_alloc(const char *name); +void iopf_queue_free(struct iopf_queue *queue); +int iopf_queue_discard_partial(struct iopf_queue *queue); + +#else /* CONFIG_IOMMU_SVA_LIB */ +static inline int iommu_queue_iopf(struct iommu_fault *fault, void *cookie) +{ + return -ENODEV; +} + +static inline int iopf_queue_add_device(struct iopf_queue *queue, + struct device *dev) +{ + return -ENODEV; +} + +static inline int iopf_queue_remove_device(struct iopf_queue *queue, + struct device *dev) +{ + return -ENODEV; +} + +static inline int iopf_queue_flush_dev(struct device *dev) +{ + return -ENODEV; +} + +static inline struct iopf_queue *iopf_queue_alloc(const char *name) +{ + return NULL; +} + +static inline void iopf_queue_free(struct iopf_queue *queue) +{ +} + +static inline int iopf_queue_discard_partial(struct iopf_queue *queue) +{ + return -ENODEV; +} +#endif /* CONFIG_IOMMU_SVA_LIB */ #endif /* _IOMMU_SVA_LIB_H */ diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 047480a19997..a1c78c4cdeb1 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -350,6 +350,7 @@ struct iommu_fault_param { * struct dev_iommu - Collection of per-device IOMMU data * * @fault_param: IOMMU detected device fault reporting data + * @iopf_param: I/O Page Fault queue and data * @fwspec: IOMMU fwspec data * @iommu_dev: IOMMU device this device is linked to * @priv: IOMMU Driver private data @@ -360,6 +361,7 @@ struct iommu_fault_param { struct dev_iommu { struct mutex lock; struct iommu_fault_param *fault_param; + struct iopf_device_param *iopf_param; struct iommu_fwspec *fwspec; struct iommu_device *iommu_dev; void *priv; diff --git a/drivers/iommu/io-pgfault.c b/drivers/iommu/io-pgfault.c new file mode 100644 index 000000000000..fc1d5d29ac37 --- /dev/null +++ b/drivers/iommu/io-pgfault.c @@ -0,0 +1,462 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Handle device page faults + * + * Copyright (C) 2020 ARM Ltd. + */ + +#include +#include +#include +#include +#include + +#include "iommu-sva-lib.h" + +/** + * struct iopf_queue - IO Page Fault queue + * @wq: the fault workqueue + * @devices: devices attached to this queue + * @lock: protects the device list + */ +struct iopf_queue { + struct workqueue_struct *wq; + struct list_head devices; + struct mutex lock; +}; + +/** + * struct iopf_device_param - IO Page Fault data attached to a device + * @dev: the device that owns this param + * @queue: IOPF queue + * @queue_list: index into queue->devices + * @partial: faults that are part of a Page Request Group for which the last + * request hasn't been submitted yet. + */ +struct iopf_device_param { + struct device *dev; + struct iopf_queue *queue; + struct list_head queue_list; + struct list_head partial; +}; + +struct iopf_fault { + struct iommu_fault fault; + struct list_head list; +}; + +struct iopf_group { + struct iopf_fault last_fault; + struct list_head faults; + struct work_struct work; + struct device *dev; +}; + +static int iopf_complete_group(struct device *dev, struct iopf_fault *iopf, + enum iommu_page_response_code status) +{ + struct iommu_page_response resp = { + .version = IOMMU_PAGE_RESP_VERSION_1, + .pasid = iopf->fault.prm.pasid, + .grpid = iopf->fault.prm.grpid, + .code = status, + }; + + if ((iopf->fault.prm.flags & IOMMU_FAULT_PAGE_REQUEST_PASID_VALID) && + (iopf->fault.prm.flags & IOMMU_FAULT_PAGE_RESPONSE_NEEDS_PASID)) + resp.flags = IOMMU_PAGE_RESP_PASID_VALID; + + return iommu_page_response(dev, &resp); +} + +static enum iommu_page_response_code +iopf_handle_single(struct iopf_fault *iopf) +{ + vm_fault_t ret; + struct mm_struct *mm; + struct vm_area_struct *vma; + unsigned int access_flags = 0; + unsigned int fault_flags = FAULT_FLAG_REMOTE; + struct iommu_fault_page_request *prm = &iopf->fault.prm; + enum iommu_page_response_code status = IOMMU_PAGE_RESP_INVALID; + + if (!(prm->flags & IOMMU_FAULT_PAGE_REQUEST_PASID_VALID)) + return status; + + mm = iommu_sva_find(prm->pasid); + if (IS_ERR_OR_NULL(mm)) + return status; + + mmap_read_lock(mm); + + vma = find_extend_vma(mm, prm->addr); + if (!vma) + /* Unmapped area */ + goto out_put_mm; + + if (prm->perm & IOMMU_FAULT_PERM_READ) + access_flags |= VM_READ; + + if (prm->perm & IOMMU_FAULT_PERM_WRITE) { + access_flags |= VM_WRITE; + fault_flags |= FAULT_FLAG_WRITE; + } + + if (prm->perm & IOMMU_FAULT_PERM_EXEC) { + access_flags |= VM_EXEC; + fault_flags |= FAULT_FLAG_INSTRUCTION; + } + + if (!(prm->perm & IOMMU_FAULT_PERM_PRIV)) + fault_flags |= FAULT_FLAG_USER; + + if (access_flags & ~vma->vm_flags) + /* Access fault */ + goto out_put_mm; + + ret = handle_mm_fault(vma, prm->addr, fault_flags, NULL); + status = ret & VM_FAULT_ERROR ? IOMMU_PAGE_RESP_INVALID : + IOMMU_PAGE_RESP_SUCCESS; + +out_put_mm: + mmap_read_unlock(mm); + mmput(mm); + + return status; +} + +static void iopf_handle_group(struct work_struct *work) +{ + struct iopf_group *group; + struct iopf_fault *iopf, *next; + enum iommu_page_response_code status = IOMMU_PAGE_RESP_SUCCESS; + + group = container_of(work, struct iopf_group, work); + + list_for_each_entry_safe(iopf, next, &group->faults, list) { + /* + * For the moment, errors are sticky: don't handle subsequent + * faults in the group if there is an error. + */ + if (status == IOMMU_PAGE_RESP_SUCCESS) + status = iopf_handle_single(iopf); + + if (!(iopf->fault.prm.flags & + IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE)) + kfree(iopf); + } + + iopf_complete_group(group->dev, &group->last_fault, status); + kfree(group); +} + +/** + * iommu_queue_iopf - IO Page Fault handler + * @fault: fault event + * @cookie: struct device, passed to iommu_register_device_fault_handler. + * + * Add a fault to the device workqueue, to be handled by mm. + * + * This module doesn't handle PCI PASID Stop Marker; IOMMU drivers must discard + * them before reporting faults. A PASID Stop Marker (LRW = 0b100) doesn't + * expect a response. It may be generated when disabling a PASID (issuing a + * PASID stop request) by some PCI devices. + * + * The PASID stop request is issued by the device driver before unbind(). Once + * it completes, no page request is generated for this PASID anymore and + * outstanding ones have been pushed to the IOMMU (as per PCIe 4.0r1.0 - 6.20.1 + * and 10.4.1.2 - Managing PASID TLP Prefix Usage). Some PCI devices will wait + * for all outstanding page requests to come back with a response before + * completing the PASID stop request. Others do not wait for page responses, and + * instead issue this Stop Marker that tells us when the PASID can be + * reallocated. + * + * It is safe to discard the Stop Marker because it is an optimization. + * a. Page requests, which are posted requests, have been flushed to the IOMMU + * when the stop request completes. + * b. The IOMMU driver flushes all fault queues on unbind() before freeing the + * PASID. + * + * So even though the Stop Marker might be issued by the device *after* the stop + * request completes, outstanding faults will have been dealt with by the time + * the PASID is freed. + * + * Return: 0 on success and <0 on error. + */ +int iommu_queue_iopf(struct iommu_fault *fault, void *cookie) +{ + int ret; + struct iopf_group *group; + struct iopf_fault *iopf, *next; + struct iopf_device_param *iopf_param; + + struct device *dev = cookie; + struct dev_iommu *param = dev->iommu; + + lockdep_assert_held(¶m->lock); + + if (fault->type != IOMMU_FAULT_PAGE_REQ) + /* Not a recoverable page fault */ + return -EOPNOTSUPP; + + /* + * As long as we're holding param->lock, the queue can't be unlinked + * from the device and therefore cannot disappear. + */ + iopf_param = param->iopf_param; + if (!iopf_param) + return -ENODEV; + + if (!(fault->prm.flags & IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE)) { + iopf = kzalloc(sizeof(*iopf), GFP_KERNEL); + if (!iopf) + return -ENOMEM; + + iopf->fault = *fault; + + /* Non-last request of a group. Postpone until the last one */ + list_add(&iopf->list, &iopf_param->partial); + + return 0; + } + + group = kzalloc(sizeof(*group), GFP_KERNEL); + if (!group) { + /* + * The caller will send a response to the hardware. But we do + * need to clean up before leaving, otherwise partial faults + * will be stuck. + */ + ret = -ENOMEM; + goto cleanup_partial; + } + + group->dev = dev; + group->last_fault.fault = *fault; + INIT_LIST_HEAD(&group->faults); + list_add(&group->last_fault.list, &group->faults); + INIT_WORK(&group->work, iopf_handle_group); + + /* See if we have partial faults for this group */ + list_for_each_entry_safe(iopf, next, &iopf_param->partial, list) { + if (iopf->fault.prm.grpid == fault->prm.grpid) + /* Insert *before* the last fault */ + list_move(&iopf->list, &group->faults); + } + + queue_work(iopf_param->queue->wq, &group->work); + return 0; + +cleanup_partial: + list_for_each_entry_safe(iopf, next, &iopf_param->partial, list) { + if (iopf->fault.prm.grpid == fault->prm.grpid) { + list_del(&iopf->list); + kfree(iopf); + } + } + return ret; +} +EXPORT_SYMBOL_GPL(iommu_queue_iopf); + +/** + * iopf_queue_flush_dev - Ensure that all queued faults have been processed + * @dev: the endpoint whose faults need to be flushed. + * + * The IOMMU driver calls this before releasing a PASID, to ensure that all + * pending faults for this PASID have been handled, and won't hit the address + * space of the next process that uses this PASID. The driver must make sure + * that no new fault is added to the queue. In particular it must flush its + * low-level queue before calling this function. + * + * Return: 0 on success and <0 on error. + */ +int iopf_queue_flush_dev(struct device *dev) +{ + int ret = 0; + struct iopf_device_param *iopf_param; + struct dev_iommu *param = dev->iommu; + + if (!param) + return -ENODEV; + + mutex_lock(¶m->lock); + iopf_param = param->iopf_param; + if (iopf_param) + flush_workqueue(iopf_param->queue->wq); + else + ret = -ENODEV; + mutex_unlock(¶m->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(iopf_queue_flush_dev); + +/** + * iopf_queue_discard_partial - Remove all pending partial fault + * @queue: the queue whose partial faults need to be discarded + * + * When the hardware queue overflows, last page faults in a group may have been + * lost and the IOMMU driver calls this to discard all partial faults. The + * driver shouldn't be adding new faults to this queue concurrently. + * + * Return: 0 on success and <0 on error. + */ +int iopf_queue_discard_partial(struct iopf_queue *queue) +{ + struct iopf_fault *iopf, *next; + struct iopf_device_param *iopf_param; + + if (!queue) + return -EINVAL; + + mutex_lock(&queue->lock); + list_for_each_entry(iopf_param, &queue->devices, queue_list) { + list_for_each_entry_safe(iopf, next, &iopf_param->partial, + list) { + list_del(&iopf->list); + kfree(iopf); + } + } + mutex_unlock(&queue->lock); + return 0; +} +EXPORT_SYMBOL_GPL(iopf_queue_discard_partial); + +/** + * iopf_queue_add_device - Add producer to the fault queue + * @queue: IOPF queue + * @dev: device to add + * + * Return: 0 on success and <0 on error. + */ +int iopf_queue_add_device(struct iopf_queue *queue, struct device *dev) +{ + int ret = -EBUSY; + struct iopf_device_param *iopf_param; + struct dev_iommu *param = dev->iommu; + + if (!param) + return -ENODEV; + + iopf_param = kzalloc(sizeof(*iopf_param), GFP_KERNEL); + if (!iopf_param) + return -ENOMEM; + + INIT_LIST_HEAD(&iopf_param->partial); + iopf_param->queue = queue; + iopf_param->dev = dev; + + mutex_lock(&queue->lock); + mutex_lock(¶m->lock); + if (!param->iopf_param) { + list_add(&iopf_param->queue_list, &queue->devices); + param->iopf_param = iopf_param; + ret = 0; + } + mutex_unlock(¶m->lock); + mutex_unlock(&queue->lock); + + if (ret) + kfree(iopf_param); + + return ret; +} +EXPORT_SYMBOL_GPL(iopf_queue_add_device); + +/** + * iopf_queue_remove_device - Remove producer from fault queue + * @queue: IOPF queue + * @dev: device to remove + * + * Caller makes sure that no more faults are reported for this device. + * + * Return: 0 on success and <0 on error. + */ +int iopf_queue_remove_device(struct iopf_queue *queue, struct device *dev) +{ + int ret = 0; + struct iopf_fault *iopf, *next; + struct iopf_device_param *iopf_param; + struct dev_iommu *param = dev->iommu; + + if (!param || !queue) + return -EINVAL; + + mutex_lock(&queue->lock); + mutex_lock(¶m->lock); + iopf_param = param->iopf_param; + if (iopf_param && iopf_param->queue == queue) { + list_del(&iopf_param->queue_list); + param->iopf_param = NULL; + } else { + ret = -EINVAL; + } + mutex_unlock(¶m->lock); + mutex_unlock(&queue->lock); + if (ret) + return ret; + + /* Just in case some faults are still stuck */ + list_for_each_entry_safe(iopf, next, &iopf_param->partial, list) + kfree(iopf); + + kfree(iopf_param); + + return 0; +} +EXPORT_SYMBOL_GPL(iopf_queue_remove_device); + +/** + * iopf_queue_alloc - Allocate and initialize a fault queue + * @name: a unique string identifying the queue (for workqueue) + * + * Return: the queue on success and NULL on error. + */ +struct iopf_queue *iopf_queue_alloc(const char *name) +{ + struct iopf_queue *queue; + + queue = kzalloc(sizeof(*queue), GFP_KERNEL); + if (!queue) + return NULL; + + /* + * The WQ is unordered because the low-level handler enqueues faults by + * group. PRI requests within a group have to be ordered, but once + * that's dealt with, the high-level function can handle groups out of + * order. + */ + queue->wq = alloc_workqueue("iopf_queue/%s", WQ_UNBOUND, 0, name); + if (!queue->wq) { + kfree(queue); + return NULL; + } + + INIT_LIST_HEAD(&queue->devices); + mutex_init(&queue->lock); + + return queue; +} +EXPORT_SYMBOL_GPL(iopf_queue_alloc); + +/** + * iopf_queue_free - Free IOPF queue + * @queue: queue to free + * + * Counterpart to iopf_queue_alloc(). The driver must not be queuing faults or + * adding/removing devices on this queue anymore. + */ +void iopf_queue_free(struct iopf_queue *queue) +{ + struct iopf_device_param *iopf_param, *next; + + if (!queue) + return; + + list_for_each_entry_safe(iopf_param, next, &queue->devices, queue_list) + iopf_queue_remove_device(queue, iopf_param->dev); + + destroy_workqueue(queue->wq); + kfree(queue); +} +EXPORT_SYMBOL_GPL(iopf_queue_free); From patchwork Thu Nov 12 12:55:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 324184 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:5ce:0:0:0:0 with SMTP id l14csp313472ils; Thu, 12 Nov 2020 05:03:36 -0800 (PST) X-Google-Smtp-Source: ABdhPJwLwOC0McWwU3abPCrOuWP/rlbf2fq2fJwC8H4+pNLG0SB0VtA38ZzbYh/++BxPoJovqWZZ X-Received: by 2002:a17:906:260a:: with SMTP id h10mr29374566ejc.159.1605186216574; Thu, 12 Nov 2020 05:03:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605186216; cv=none; d=google.com; s=arc-20160816; b=YGE41FPf81SC8shWcQf19oZzG7geTP17ah85Q31ab0nIH9z9Un3pm4XCUeOR26OtgP uR4c81h77UwidbYn/Ed36PPqMsmdYNeEE9TD+IhYeXP0lEt0BT9SgoMzJV/3cUWMyiJX qR52+SKfpTPHCpN30ZGu29OBRcw/GBBLDKjcjhYIkjnqSBtmRjemjTCW4yyRcnR9RgsM YMc+7PUtJVmDKcHoENkc4QFAMCUIAI+Y3ZTBUO7+QxAM8WO5g/hBqVVjyAsRjB8jWzaq eiGbelRDHVflj5F8jwVLRO25dcOqbCkNnax4TRhO9Wienk6u+6xciF05UYG6KmZv9K67 s6Xw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4JGD+U5wzrPrHuAbcShPgq/7SS7eVhaJGMY13GukQwc=; b=kMWzzzf8l1k6GM0NJjODJDUDs4ktULzfloSTbVjYwvVsKCoBOuhQU70zT0k1zU1ZOW g9CnFkzA6trCXBJG6ZLifw/K+PI4PfZDw6ygdbyB98UMGk4V259zIO2Mvpo2Qyc2BS8w az9v4R5u6Z8Ryh7fzH67HPImP1/A5Q/EW2wIsPFD9ufb4UVOx/rGS+YZUY4ctwHzYULB rgvLfqH1ddw2lV0jdgHoABNQz9b31wNtfB58PiMcXnOTAJflCv7RLwojik86coCLhXqd ufl1bKA6MQ/aj7MYttKSLlRoNzxMakUCqvLm96QoJ64wT6iGgO3QRw1brr70zGM2w6IO onWQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=L+UnK8b6; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Jean-Philippe Brucker --- drivers/acpi/arm64/iort.c | 1 + 1 file changed, 1 insertion(+) -- 2.29.1 diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c index 70df1ecba7fe..3e39b2212388 100644 --- a/drivers/acpi/arm64/iort.c +++ b/drivers/acpi/arm64/iort.c @@ -968,6 +968,7 @@ static void iort_named_component_init(struct device *dev, nc = (struct acpi_iort_named_component *)node->node_data; fwspec->num_pasid_bits = FIELD_GET(ACPI_IORT_NC_PASID_BITS, nc->node_flags); + fwspec->can_stall = (nc->node_flags & ACPI_IORT_NC_STALL_SUPPORTED); } static int iort_nc_iommu_map(struct device *dev, struct acpi_iort_node *node) From patchwork Thu Nov 12 12:55:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 324186 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:5ce:0:0:0:0 with SMTP id l14csp313530ils; Thu, 12 Nov 2020 05:03:40 -0800 (PST) X-Google-Smtp-Source: ABdhPJxJmhqa8ZJSB05x/Jr4o0O/tHmxS5UKfnkQRGLmW1v/k2tYk10TD6ER8eR/QUhzi8y5il0d X-Received: by 2002:a17:906:329a:: with SMTP id 26mr2321902ejw.227.1605186220358; Thu, 12 Nov 2020 05:03:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605186220; cv=none; d=google.com; s=arc-20160816; b=Rz7tRhTkZonzFo22QIBgcNGA3nrD3ndp5nkBVJU0KKJBtnffktzu3kZH6F0YX9QDFL 78XbNSGxOq9V40wcjf+tBSsj+YGkyvSU5lVHanTpfVFGOrcmf1O6qr8b2S2+c6VU4MPg o8d89fGjBanWlAoH1KJa30Jh2EYLIkP5N0/DZ7xqG9ludi8vyh724c7PpVemfms4jdVP 0bXpZPV4szgGIV1xHYbrxmpx0yWDKWayb82Ivp/LU9MfbvKOwmxhP6L6Kv1hyNBvhrU8 t//3TGl+N80q5hpQJH0BWIagQ16ZpAUJD9J4j8GLENhbOb19WjOiSh+8NanTNu5ku8AC Stbg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=YNIotbOC7bka5Z9BLnFVmsCtOLB6kJ/rhFA9CsCNoBU=; b=ZABYc/fxgi5d/2WQN5JJe3PorBsDFp44djQBhSscLj5hV5J5Tb13lCiV92GXDBW2vH rqbEeT9LWi9lsgBpeSeAOwvGsYD6DbTMRcfwbwcezS1+2lgQ/h2RYrwU2mgCtSRXAi/P RaDx3S2HThGjDQ8khrWpGH0ZLBe+apgogV5nNeq2lK3lFzW27LqMiq4WYJr3d3jyo2D2 N07B71cLQsMsT4A2qNjrvfnIbDcSFqIVlE7/ondQ/4KDNWcAKxcKlbiBf6m2XEfS0ECi e4KeXOew8XLeyyJjCctiw31bY3RkNph+LgLnr7NSgqvCNrK4vuEiC1khVe9R/WKtovqX OE2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QZfgK97B; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u20si3713663edr.287.2020.11.12.05.03.39; Thu, 12 Nov 2020 05:03:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QZfgK97B; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727796AbgKLNDd (ORCPT + 7 others); Thu, 12 Nov 2020 08:03:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728228AbgKLND0 (ORCPT ); Thu, 12 Nov 2020 08:03:26 -0500 Received: from mail-wm1-x342.google.com (mail-wm1-x342.google.com [IPv6:2a00:1450:4864:20::342]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B2C7FC061A49 for ; Thu, 12 Nov 2020 05:03:25 -0800 (PST) Received: by mail-wm1-x342.google.com with SMTP id a65so5457383wme.1 for ; Thu, 12 Nov 2020 05:03:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YNIotbOC7bka5Z9BLnFVmsCtOLB6kJ/rhFA9CsCNoBU=; b=QZfgK97B8RvBj1vgMXgdtAlJTXGErNY2MHWaYeZJYcihAKpzxznX+f3QupErxyW+y7 vl5dFcj/SwiTM7AoiBl8Ekh/VI2I+MV6RRDXOcrbDCGTkeMw66SFzS1DgJvxjcaDuKjk 2bmfttuRd5KL3r+eSvLlVqZxie8jGCaK6VIEInNDm+bzEK1xUWxTL3t2xMOYv4Bass5p gBiBnUXUjVBFvCB1BrWOR56d6TtjFa2TYTFOwxI7fDliFlDQVEIWqgTYl5sIlbDUR1ej iCxbPa+0gIBZXHXjDH2ssbGlbO7TSEgUjnx9UYgYtW9ALf/I+qK3xCqik9HnPlfBcF/J Vzrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YNIotbOC7bka5Z9BLnFVmsCtOLB6kJ/rhFA9CsCNoBU=; b=LCWt2+wIzmTizZbMKjPeYDx7TZ5/GYKPgJCuRlIO1r+2S+5zsA22dH66sl1a253hY2 CaLGWl3/y8jbQXx6Gol7TGKdwIMfAOyixWARWWPhkr7/eaKKb/ldovnTHyLD2LJADFyu CteKoY4P3oLXip+jVx+SE7qSHefSMtjYvTXRQePAo02IUymHTNJ1kyaMTRN7pzouowPk OH7tTLvMspl3dz4HiBdsPUrlyPChaReVi6Iekt3Cjhw8VmYDv8qI4SJEDt1c1qaMsylG xUJWmOjJz9yXTa41exEdMy9NReiPb/gKrVeBoiNWPygA2W0FQG16rBfipAEOMZLosrZ1 pPLA== X-Gm-Message-State: AOAM531ezwZjl1guBmqKeDvIjKIo5dJWR8tij0okZACMtMpc4qA6gPmp E0M0UBf/0RxWmdLlUMfe86SPby+zRHsCnA== X-Received: by 2002:a1c:2586:: with SMTP id l128mr9104219wml.149.1605186204490; Thu, 12 Nov 2020 05:03:24 -0800 (PST) Received: from localhost.localdomain ([2001:1715:4e26:a7e0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id m22sm6877508wrb.97.2020.11.12.05.03.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Nov 2020 05:03:23 -0800 (PST) From: Jean-Philippe Brucker To: joro@8bytes.org, will@kernel.org, lorenzo.pieralisi@arm.com, robh+dt@kernel.org Cc: guohanjun@huawei.com, sudeep.holla@arm.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, bhelgaas@google.com, Jonathan.Cameron@huawei.com, eric.auger@redhat.com, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, baolu.lu@linux.intel.com, zhangfei.gao@linaro.org, shameerali.kolothum.thodi@huawei.com, vivek.gautam@arm.com, Jean-Philippe Brucker , Kuppuswamy Sathyanarayanan Subject: [PATCH v8 7/9] PCI/ATS: Add PRI stubs Date: Thu, 12 Nov 2020 13:55:19 +0100 Message-Id: <20201112125519.3987595-8-jean-philippe@linaro.org> X-Mailer: git-send-email 2.29.1 In-Reply-To: <20201112125519.3987595-1-jean-philippe@linaro.org> References: <20201112125519.3987595-1-jean-philippe@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org The SMMUv3 driver, which can be built without CONFIG_PCI, will soon gain support for PRI. Partially revert commit c6e9aefbf9db ("PCI/ATS: Remove unused PRI and PASID stubs") to re-introduce the PRI stubs, and avoid adding more #ifdefs to the SMMU driver. Acked-by: Bjorn Helgaas Reviewed-by: Kuppuswamy Sathyanarayanan Signed-off-by: Jean-Philippe Brucker --- include/linux/pci-ats.h | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.29.1 diff --git a/include/linux/pci-ats.h b/include/linux/pci-ats.h index df54cd5b15db..ccfca09fd232 100644 --- a/include/linux/pci-ats.h +++ b/include/linux/pci-ats.h @@ -30,6 +30,13 @@ int pci_reset_pri(struct pci_dev *pdev); int pci_prg_resp_pasid_required(struct pci_dev *pdev); bool pci_pri_supported(struct pci_dev *pdev); #else +static inline int pci_enable_pri(struct pci_dev *pdev, u32 reqs) +{ return -ENODEV; } +static inline void pci_disable_pri(struct pci_dev *pdev) { } +static inline int pci_reset_pri(struct pci_dev *pdev) +{ return -ENODEV; } +static inline int pci_prg_resp_pasid_required(struct pci_dev *pdev) +{ return 0; } static inline bool pci_pri_supported(struct pci_dev *pdev) { return false; } #endif /* CONFIG_PCI_PRI */ From patchwork Thu Nov 12 12:55:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 324188 Delivered-To: patch@linaro.org Received: by 2002:a92:cc8a:0:0:0:0:0 with SMTP id x10csp323778ilo; Thu, 12 Nov 2020 05:03:53 -0800 (PST) X-Google-Smtp-Source: ABdhPJy3ND1J2tp5EYx824X4d9BnuuPpJCOed6YwNRDnc8saEI6DuhLTUJsKahPxwNVUKP7porD8 X-Received: by 2002:a1c:bcc1:: with SMTP id m184mr9273347wmf.132.1605186233459; Thu, 12 Nov 2020 05:03:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605186233; cv=none; d=google.com; s=arc-20160816; b=ubOIwhubra6/GM9omxHojZI4+V6zRotkLTYzgtVKj5f3uRnO2HuWHorRlq5UD+uADA CtMaezBdFmF78+1cmCBGtCGiQn0pHHo0ozGNsxl/mYdUO0DosJthPL5HxEVJSen0P2xR EiPN5+PH86qVjmteoa31q8Uc0wNHuRAVQgIRvpO3gx+HXQXeT5Q3Zgg0HISTlDGpd6YP +EPH9PSz2MaUduXKhPqJx5KwxMQ8fywEPD6s8QorcVzHOxuPNoWhTNnMe6TWxpImhkAG BgXanJR9H8vgJ94j5116T+6qmvVeVhKR4DH6bE/3nKTj/yeuhn8HzSsHUV99Yz4mbhvV TMCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qVbQfn+wW1FJTP9+IaoEjGKkOhoG1CH1YVgrdlNJ6Sw=; b=RGNGfB/PTN0eIhEXOK+at0fALMit1ocHU9AUTQ5jELI9BPrszQY/AwUXmoBOWzWCRZ Ed0V6+Reps4mjp5CqX3hlAupqX/104e4g3C5k0x1TKutY6xbjDHem5sQbnvcrkVFezCL Nv0/OE6Lj6qoSMY9BHtU1WKK4rZWxM6rS81wRChfvIo5tEk8ZobCAHwbLnzl75AOSnh1 REu2x8LyWXMo/On29T6VWyH8jer3a5agGaQ56wqHsB+k9gqSomB00BbaKewk5S1Z9bGz 1YpH8NtclNO091b+tiCl8y7Ij5nx6QmPfudb7zEQgdDCgB1qoMw3Hh3ZbSq4k2TQSjmt DfFQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="AJNFqP/Z"; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u20si3713663edr.287.2020.11.12.05.03.53; Thu, 12 Nov 2020 05:03:53 -0800 (PST) Received-SPF: pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="AJNFqP/Z"; spf=pass (google.com: domain of linux-acpi-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-acpi-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728089AbgKLNDl (ORCPT + 7 others); Thu, 12 Nov 2020 08:03:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728319AbgKLNDa (ORCPT ); Thu, 12 Nov 2020 08:03:30 -0500 Received: from mail-wm1-x344.google.com (mail-wm1-x344.google.com [IPv6:2a00:1450:4864:20::344]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8210CC0613D1 for ; Thu, 12 Nov 2020 05:03:28 -0800 (PST) Received: by mail-wm1-x344.google.com with SMTP id a3so5425908wmb.5 for ; Thu, 12 Nov 2020 05:03:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qVbQfn+wW1FJTP9+IaoEjGKkOhoG1CH1YVgrdlNJ6Sw=; b=AJNFqP/ZKhk6objxUUtP+6tvikca2WaZ6jTYQcqn0yvFmq93hZ3lVQHYyK7f33pXgE LMPNyvQtw49zSsYAQyGirgOmAjeKMdajdiJVAvrB0xvcpLKnNUh1Z8ZszvxyGNv+yFWO jRyaMPOhhzNbE3/mz7+lXJ3IhlCs6H3xrg7kN1+ZuHmW+evNoDn1JYTAFeNTCQVfBP6C UDXzfEZDz9yBRbmmCKA8RPN03ITbdvYu314gLJxyyi+H6Vek4EQpQ+DnwUjWmEWZQ4P7 ecl6SKlD8ae4yC6bXIaFUH6JgCSMUZFZyPJSzMPNHa1vLYEGIy0ojNDIzjqoS0ABNNt4 JmSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qVbQfn+wW1FJTP9+IaoEjGKkOhoG1CH1YVgrdlNJ6Sw=; b=fUNVzhcLLa4kByZg/qmAtHOW81XCgxDHcPemId0puEpv9EL5zTcsG3JJ0rU7Bxru8m 0w8JHPs0PLmdEeRoHMlVUYzMQ4r9icaVz8W3kK2GQCAOLptDsMo2doY4el8MsEPOZGUu 01qPh+1XBd+TO/rR3B0NQ2HHJfhkuXmwUeIIs1EbhuXOaAvG5EuVAXLylYm6mjvYQq2w qLCtpwffjgWinnaZgXmToUwZmbN/VnbSvYGjukWz6fYNtysdTvwz6L8OMglkumdFTNii tRZ5ne/J9ebusPsLi09XjzySQVi/5t26PbGadlxk8Dfck75Lv/tLmceyoqioxakooTKM sLSw== X-Gm-Message-State: AOAM533eBwipoOwus7m9f+XpNCgup0nU3ZcogSQWzqOhGKTQreRyrjet YSHwGz4uIHYVCq1ZWkOWiPEZWw== X-Received: by 2002:a7b:c05a:: with SMTP id u26mr10063043wmc.159.1605186207268; Thu, 12 Nov 2020 05:03:27 -0800 (PST) Received: from localhost.localdomain ([2001:1715:4e26:a7e0:116c:c27a:3e7f:5eaf]) by smtp.gmail.com with ESMTPSA id m22sm6877508wrb.97.2020.11.12.05.03.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Nov 2020 05:03:26 -0800 (PST) From: Jean-Philippe Brucker To: joro@8bytes.org, will@kernel.org, lorenzo.pieralisi@arm.com, robh+dt@kernel.org Cc: guohanjun@huawei.com, sudeep.holla@arm.com, rjw@rjwysocki.net, lenb@kernel.org, robin.murphy@arm.com, bhelgaas@google.com, Jonathan.Cameron@huawei.com, eric.auger@redhat.com, iommu@lists.linux-foundation.org, devicetree@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, baolu.lu@linux.intel.com, zhangfei.gao@linaro.org, shameerali.kolothum.thodi@huawei.com, vivek.gautam@arm.com, Jean-Philippe Brucker , Kuppuswamy Sathyanarayanan Subject: [PATCH v8 8/9] PCI/ATS: Export PRI functions Date: Thu, 12 Nov 2020 13:55:20 +0100 Message-Id: <20201112125519.3987595-9-jean-philippe@linaro.org> X-Mailer: git-send-email 2.29.1 In-Reply-To: <20201112125519.3987595-1-jean-philippe@linaro.org> References: <20201112125519.3987595-1-jean-philippe@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org The SMMUv3 driver uses pci_{enable,disable}_pri() and related functions. Export those functions to allow the driver to be built as a module. Acked-by: Bjorn Helgaas Reviewed-by: Kuppuswamy Sathyanarayanan Signed-off-by: Jean-Philippe Brucker --- drivers/pci/ats.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.29.1 diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c index 46bc7f31fb4d..e36d601015d9 100644 --- a/drivers/pci/ats.c +++ b/drivers/pci/ats.c @@ -191,6 +191,7 @@ void pci_pri_init(struct pci_dev *pdev) if (status & PCI_PRI_STATUS_PASID) pdev->pasid_required = 1; } +EXPORT_SYMBOL_GPL(pci_pri_init); /** * pci_enable_pri - Enable PRI capability @@ -238,6 +239,7 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs) return 0; } +EXPORT_SYMBOL_GPL(pci_enable_pri); /** * pci_disable_pri - Disable PRI capability @@ -317,6 +319,7 @@ int pci_reset_pri(struct pci_dev *pdev) return 0; } +EXPORT_SYMBOL_GPL(pci_reset_pri); /** * pci_prg_resp_pasid_required - Return PRG Response PASID Required bit @@ -332,6 +335,7 @@ int pci_prg_resp_pasid_required(struct pci_dev *pdev) return pdev->pasid_required; } +EXPORT_SYMBOL_GPL(pci_prg_resp_pasid_required); /** * pci_pri_supported - Check if PRI is supported.