From patchwork Fri Nov 20 03:26:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcin Wojtas X-Patchwork-Id: 330190 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4380CC63798 for ; Fri, 20 Nov 2020 03:27:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DF36C22267 for ; Fri, 20 Nov 2020 03:27:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=semihalf-com.20150623.gappssmtp.com header.i=@semihalf-com.20150623.gappssmtp.com header.b="Dw6QGdv1" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727186AbgKTD1G (ORCPT ); Thu, 19 Nov 2020 22:27:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42722 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726385AbgKTD1G (ORCPT ); Thu, 19 Nov 2020 22:27:06 -0500 Received: from mail-lj1-x243.google.com (mail-lj1-x243.google.com [IPv6:2a00:1450:4864:20::243]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F810C061A04 for ; Thu, 19 Nov 2020 19:27:04 -0800 (PST) Received: by mail-lj1-x243.google.com with SMTP id 11so8584675ljf.2 for ; Thu, 19 Nov 2020 19:27:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XrHwQaCMJh08ONMTBH+6V1+tkj13F2Y4HGn4qByhl4o=; b=Dw6QGdv1TxRcj9yj9vdmXtAeUrBVvjYfYF3eN9OkYR7IXJIVwxjf/2f6FBtM2fafbp 1m+r3p2mFUML7g3LrECuTYf6KHE+qer0o5CpfPZUXUNicCVMCmnNxQ063MWV6dULykDs Ip7g/ke9/U2pwaWFd0pa+6dmNluwFFFSTF8rueZj30CVl0g1+y4KsgXS9Oe66D6Mnglr iPv1x5JwnVQO5q2mYmewFvFmhDeFXmgKA7iJOhpJLbEnmrpp9EFF4+vVqeTOQ7YPIVUp nYSyVJITLGb6MKrcvYFgZ7wjpO+mhvMWYc48pAUE2Jdykkk3qPOTvbOEqilKARw9dJjj ijgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XrHwQaCMJh08ONMTBH+6V1+tkj13F2Y4HGn4qByhl4o=; b=j0x9OWby5VvBfeoqQjAjWZE1fr+bVKzPuX8Cm/Ch8TkMybQ7yMCAGCS6ZFSYLp5Y5H G6SwIc5ZSJn1m7WnVH0RtKRdrx08+brsGge7FNL42apQdpxPc/sj9CLrIYUN6Eb5BHzh ixiT0w7zrdqrBZrB/v1puhC8t/dszhHsvN3BKmJMrqcWwJNMKh8UcKehAb/MHGf6L0vJ AwNEG8sMrYr7qkkJHMccDOxQQJQtum3G8q5HjHLluvMN81bSZtk2WXqQe1UXrTYHe3kR tr2DsoS7b1HsdmlSzmdmwXcsSDJcUGqxpciXykQwGzhG9g1QuOzB0DyrnDpohfJgOWDW MaDg== X-Gm-Message-State: AOAM530/Mco6aDCxi9PoslmeaIhxJ0EYh1I+XQPkk86y6vkAAH7dn2X7 y3t2P1VyvCwS1uSCsx2P6/tD5Q== X-Google-Smtp-Source: ABdhPJwSyP09EmgyW4eJinnn1yMoCmTQN5FucXntVXk0ESXiz61GfqqYhD3PLBO/doujPjtJLmVGww== X-Received: by 2002:a2e:854a:: with SMTP id u10mr7541204ljj.443.1605842822844; Thu, 19 Nov 2020 19:27:02 -0800 (PST) Received: from gilgamesh.semihalf.com (193-106-246-138.noc.fibertech.net.pl. [193.106.246.138]) by smtp.gmail.com with ESMTPSA id s26sm153647lji.31.2020.11.19.19.27.01 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Nov 2020 19:27:02 -0800 (PST) From: Marcin Wojtas To: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Cc: ulf.hansson@linaro.org, huziji@marvell.com, adrian.hunter@intel.com, jaz@semihalf.com, tn@semihalf.com, ard.biesheuvel@arm.com, kostap@marvell.com, Marcin Wojtas Subject: [PATCH v2 1/4] mmc: sdhci-xenon: use match data for controllers variants Date: Fri, 20 Nov 2020 04:26:36 +0100 Message-Id: <20201120032639.24386-2-mw@semihalf.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20201120032639.24386-1-mw@semihalf.com> References: <20201120032639.24386-1-mw@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org As a part of the ACPI support preparation resign from checking compatible strings in the driver. Instead of that use a new enum and assign the values to match data accordingly. Signed-off-by: Marcin Wojtas --- drivers/mmc/host/sdhci-xenon.h | 8 ++++++++ drivers/mmc/host/sdhci-xenon-phy.c | 4 +++- drivers/mmc/host/sdhci-xenon.c | 10 ++++++---- 3 files changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/host/sdhci-xenon.h b/drivers/mmc/host/sdhci-xenon.h index 593b82d7b68a..39e898605937 100644 --- a/drivers/mmc/host/sdhci-xenon.h +++ b/drivers/mmc/host/sdhci-xenon.h @@ -53,6 +53,13 @@ #define XENON_CTRL_HS200 0x5 #define XENON_CTRL_HS400 0x6 +enum xenon_variant { + XENON_A3700, + XENON_AP806, + XENON_AP807, + XENON_CP110 +}; + struct xenon_priv { unsigned char tuning_count; /* idx of SDHC */ @@ -90,6 +97,7 @@ struct xenon_priv { void *phy_params; struct xenon_emmc_phy_regs *emmc_phy_regs; bool restore_needed; + enum xenon_variant hw_version; }; int xenon_phy_adj(struct sdhci_host *host, struct mmc_ios *ios); diff --git a/drivers/mmc/host/sdhci-xenon-phy.c b/drivers/mmc/host/sdhci-xenon-phy.c index 03ce57ef4585..c33e0cddc81a 100644 --- a/drivers/mmc/host/sdhci-xenon-phy.c +++ b/drivers/mmc/host/sdhci-xenon-phy.c @@ -651,11 +651,13 @@ static int get_dt_pad_ctrl_data(struct sdhci_host *host, struct device_node *np, struct xenon_emmc_phy_params *params) { + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct xenon_priv *priv = sdhci_pltfm_priv(pltfm_host); int ret = 0; const char *name; struct resource iomem; - if (of_device_is_compatible(np, "marvell,armada-3700-sdhci")) + if (priv->hw_version == XENON_A3700) params->pad_ctrl.set_soc_pad = armada_3700_soc_pad_voltage_set; else return 0; diff --git a/drivers/mmc/host/sdhci-xenon.c b/drivers/mmc/host/sdhci-xenon.c index 24c978de2a3f..1e7ce9b1a143 100644 --- a/drivers/mmc/host/sdhci-xenon.c +++ b/drivers/mmc/host/sdhci-xenon.c @@ -418,7 +418,7 @@ static int xenon_probe_dt(struct platform_device *pdev) u32 tuning_count; /* Disable HS200 on Armada AP806 */ - if (of_device_is_compatible(np, "marvell,armada-ap806-sdhci")) + if (priv->hw_version == XENON_AP806) host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200; sdhc_id = 0x0; @@ -495,6 +495,8 @@ static int xenon_probe(struct platform_device *pdev) pltfm_host = sdhci_priv(host); priv = sdhci_pltfm_priv(pltfm_host); + priv->hw_version = (unsigned long)device_get_match_data(&pdev->dev); + /* * Link Xenon specific mmc_host_ops function, * to replace standard ones in sdhci_ops. @@ -667,9 +669,9 @@ static const struct dev_pm_ops sdhci_xenon_dev_pm_ops = { }; static const struct of_device_id sdhci_xenon_dt_ids[] = { - { .compatible = "marvell,armada-ap806-sdhci",}, - { .compatible = "marvell,armada-cp110-sdhci",}, - { .compatible = "marvell,armada-3700-sdhci",}, + { .compatible = "marvell,armada-ap806-sdhci", .data = (void *)XENON_AP806}, + { .compatible = "marvell,armada-cp110-sdhci", .data = (void *)XENON_CP110}, + { .compatible = "marvell,armada-3700-sdhci", .data = (void *)XENON_A3700}, {} }; MODULE_DEVICE_TABLE(of, sdhci_xenon_dt_ids); From patchwork Fri Nov 20 03:26:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcin Wojtas X-Patchwork-Id: 329538 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80823C64E7A for ; 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[193.106.246.138]) by smtp.gmail.com with ESMTPSA id s26sm153647lji.31.2020.11.19.19.27.02 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Nov 2020 19:27:03 -0800 (PST) From: Marcin Wojtas To: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Cc: ulf.hansson@linaro.org, huziji@marvell.com, adrian.hunter@intel.com, jaz@semihalf.com, tn@semihalf.com, ard.biesheuvel@arm.com, kostap@marvell.com, Marcin Wojtas Subject: [PATCH v2 2/4] mmc: sdhci-xenon: switch to device_* API Date: Fri, 20 Nov 2020 04:26:37 +0100 Message-Id: <20201120032639.24386-3-mw@semihalf.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20201120032639.24386-1-mw@semihalf.com> References: <20201120032639.24386-1-mw@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org In order to support both ACPI and DT, modify the driver to use device_* routines for obtaining the properties values. Signed-off-by: Marcin Wojtas --- drivers/mmc/host/sdhci-xenon.h | 4 +-- drivers/mmc/host/sdhci-xenon-phy.c | 36 +++++++++++--------- drivers/mmc/host/sdhci-xenon.c | 18 +++++----- 3 files changed, 30 insertions(+), 28 deletions(-) diff --git a/drivers/mmc/host/sdhci-xenon.h b/drivers/mmc/host/sdhci-xenon.h index 39e898605937..3e9c6c908a79 100644 --- a/drivers/mmc/host/sdhci-xenon.h +++ b/drivers/mmc/host/sdhci-xenon.h @@ -101,8 +101,8 @@ struct xenon_priv { }; int xenon_phy_adj(struct sdhci_host *host, struct mmc_ios *ios); -int xenon_phy_parse_dt(struct device_node *np, - struct sdhci_host *host); +int xenon_phy_parse_params(struct device *dev, + struct sdhci_host *host); void xenon_soc_pad_ctrl(struct sdhci_host *host, unsigned char signal_voltage); #endif diff --git a/drivers/mmc/host/sdhci-xenon-phy.c b/drivers/mmc/host/sdhci-xenon-phy.c index c33e0cddc81a..8cf3a375de65 100644 --- a/drivers/mmc/host/sdhci-xenon-phy.c +++ b/drivers/mmc/host/sdhci-xenon-phy.c @@ -691,35 +691,37 @@ static int get_dt_pad_ctrl_data(struct sdhci_host *host, return ret; } -static int xenon_emmc_phy_parse_param_dt(struct sdhci_host *host, - struct device_node *np, - struct xenon_emmc_phy_params *params) +static int xenon_emmc_phy_parse_params(struct sdhci_host *host, + struct device *dev, + struct xenon_emmc_phy_params *params) { u32 value; params->slow_mode = false; - if (of_property_read_bool(np, "marvell,xenon-phy-slow-mode")) + if (device_property_read_bool(dev, "marvell,xenon-phy-slow-mode")) params->slow_mode = true; params->znr = XENON_ZNR_DEF_VALUE; - if (!of_property_read_u32(np, "marvell,xenon-phy-znr", &value)) + if (!device_property_read_u32(dev, "marvell,xenon-phy-znr", &value)) params->znr = value & XENON_ZNR_MASK; params->zpr = XENON_ZPR_DEF_VALUE; - if (!of_property_read_u32(np, "marvell,xenon-phy-zpr", &value)) + if (!device_property_read_u32(dev, "marvell,xenon-phy-zpr", &value)) params->zpr = value & XENON_ZPR_MASK; params->nr_tun_times = XENON_TUN_CONSECUTIVE_TIMES; - if (!of_property_read_u32(np, "marvell,xenon-phy-nr-success-tun", - &value)) + if (!device_property_read_u32(dev, "marvell,xenon-phy-nr-success-tun", + &value)) params->nr_tun_times = value & XENON_TUN_CONSECUTIVE_TIMES_MASK; params->tun_step_divider = XENON_TUNING_STEP_DIVIDER; - if (!of_property_read_u32(np, "marvell,xenon-phy-tun-step-divider", - &value)) + if (!device_property_read_u32(dev, "marvell,xenon-phy-tun-step-divider", + &value)) params->tun_step_divider = value & 0xFF; - return get_dt_pad_ctrl_data(host, np, params); + if (dev->of_node) + return get_dt_pad_ctrl_data(host, dev->of_node, params); + return 0; } /* Set SoC PHY Voltage PAD */ @@ -813,7 +815,7 @@ int xenon_phy_adj(struct sdhci_host *host, struct mmc_ios *ios) return ret; } -static int xenon_add_phy(struct device_node *np, struct sdhci_host *host, +static int xenon_add_phy(struct device *dev, struct sdhci_host *host, const char *phy_name) { struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -832,15 +834,15 @@ static int xenon_add_phy(struct device_node *np, struct sdhci_host *host, if (ret) return ret; - return xenon_emmc_phy_parse_param_dt(host, np, priv->phy_params); + return xenon_emmc_phy_parse_params(host, dev, priv->phy_params); } -int xenon_phy_parse_dt(struct device_node *np, struct sdhci_host *host) +int xenon_phy_parse_params(struct device *dev, struct sdhci_host *host) { const char *phy_type = NULL; - if (!of_property_read_string(np, "marvell,xenon-phy-type", &phy_type)) - return xenon_add_phy(np, host, phy_type); + if (!device_property_read_string(dev, "marvell,xenon-phy-type", &phy_type)) + return xenon_add_phy(dev, host, phy_type); - return xenon_add_phy(np, host, "emmc 5.1 phy"); + return xenon_add_phy(dev, host, "emmc 5.1 phy"); } diff --git a/drivers/mmc/host/sdhci-xenon.c b/drivers/mmc/host/sdhci-xenon.c index 1e7ce9b1a143..bfc76b0e3eaa 100644 --- a/drivers/mmc/host/sdhci-xenon.c +++ b/drivers/mmc/host/sdhci-xenon.c @@ -407,9 +407,9 @@ static void xenon_replace_mmc_host_ops(struct sdhci_host *host) * Refer to XENON_SYS_CFG_INFO register * tun-count: the interval between re-tuning */ -static int xenon_probe_dt(struct platform_device *pdev) +static int xenon_probe_params(struct platform_device *pdev) { - struct device_node *np = pdev->dev.of_node; + struct device *dev = &pdev->dev; struct sdhci_host *host = platform_get_drvdata(pdev); struct mmc_host *mmc = host->mmc; struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); @@ -422,7 +422,7 @@ static int xenon_probe_dt(struct platform_device *pdev) host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200; sdhc_id = 0x0; - if (!of_property_read_u32(np, "marvell,xenon-sdhc-id", &sdhc_id)) { + if (!device_property_read_u32(dev, "marvell,xenon-sdhc-id", &sdhc_id)) { nr_sdhc = sdhci_readl(host, XENON_SYS_CFG_INFO); nr_sdhc &= XENON_NR_SUPPORTED_SLOT_MASK; if (unlikely(sdhc_id > nr_sdhc)) { @@ -434,8 +434,8 @@ static int xenon_probe_dt(struct platform_device *pdev) priv->sdhc_id = sdhc_id; tuning_count = XENON_DEF_TUNING_COUNT; - if (!of_property_read_u32(np, "marvell,xenon-tun-count", - &tuning_count)) { + if (!device_property_read_u32(dev, "marvell,xenon-tun-count", + &tuning_count)) { if (unlikely(tuning_count >= XENON_TMR_RETUN_NO_PRESENT)) { dev_err(mmc_dev(mmc), "Wrong Re-tuning Count. Set default value %d\n", XENON_DEF_TUNING_COUNT); @@ -444,7 +444,7 @@ static int xenon_probe_dt(struct platform_device *pdev) } priv->tuning_count = tuning_count; - return xenon_phy_parse_dt(np, host); + return xenon_phy_parse_params(dev, host); } static int xenon_sdhc_prepare(struct sdhci_host *host) @@ -528,12 +528,12 @@ static int xenon_probe(struct platform_device *pdev) if (err) goto err_clk_axi; - sdhci_get_of_property(pdev); + sdhci_get_property(pdev); xenon_set_acg(host, false); - /* Xenon specific dt parse */ - err = xenon_probe_dt(pdev); + /* Xenon specific parameters parse */ + err = xenon_probe_params(pdev); if (err) goto err_clk_axi; From patchwork Fri Nov 20 03:26:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcin Wojtas X-Patchwork-Id: 329539 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4D41C6379D for ; Fri, 20 Nov 2020 03:27:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 55B7722267 for ; Fri, 20 Nov 2020 03:27:27 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=semihalf-com.20150623.gappssmtp.com header.i=@semihalf-com.20150623.gappssmtp.com header.b="cMaBZWzT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727216AbgKTD1J (ORCPT ); Thu, 19 Nov 2020 22:27:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42730 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727300AbgKTD1I (ORCPT ); Thu, 19 Nov 2020 22:27:08 -0500 Received: from mail-lf1-x143.google.com (mail-lf1-x143.google.com [IPv6:2a00:1450:4864:20::143]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B7FCC061A04 for ; Thu, 19 Nov 2020 19:27:07 -0800 (PST) Received: by mail-lf1-x143.google.com with SMTP id a9so11445611lfh.2 for ; Thu, 19 Nov 2020 19:27:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=m4vOJtWxDLHcMBVI7OSOXD/tNJSQ9CFf8jq2Ki+JYg8=; b=cMaBZWzTgSd9deY0rYjEu0+tGMyBMQpcIpHdijAJGDBv3w21rHUXXa73WBY55NETyT N1rygUtUWo/eB9oTZ7iAJdaJGSAQRNFYgJIR8aDZC1bu0MRW1xSFNyzbyllHlpcvlvj+ 0A/B0sd7tRacbPEXqTKh2oxJUan93/ssRGLDS8gWV5ry5kf1l+Wg1VIRxARnhrRbNDk8 wKIXExQGGxu/6FfqAajd/F98+SwtcAxf9l3CcY3rOqbgUs1O4Un5Cey/++yi/JZk6qS1 9yqN8rgAMJU/Sx/2Lf1mm8HSi5CHDIDftpvWctDSumTyGfhzkmyZKbE5ov1OfSii5X01 ztlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=m4vOJtWxDLHcMBVI7OSOXD/tNJSQ9CFf8jq2Ki+JYg8=; b=rLuiA4vqySpbKyugmIgH+D9kRenLG2bP6LvlIqwtjMg2acZQmuam5IJnN8seuWhgzl 7YHVyrKox/CY6IcFK/GVJ0R+4+sDvG/Mz307QFd0p6Lqd4UB0sZxw11wQHn85etkagJH EeGqRufL0L6aF8gwDmZ/crXtdYl3C5z00MB4VYkaoUEnVJvHo5tRQe7UyGLT4zKtwG/V V3iIxj8v1wD7qySlXbI9y7QYMhuSsYfzfGxn0gbUZ+nIv9MwRm6+du/gj3sMNP4y43j+ NjDUMWUn+tYIeFpJET4eErzfGGW+9TB0hSoT234MsQpG6+/osKs+Kx1M9CBMlbMkKc57 tv1g== X-Gm-Message-State: AOAM5332YFJoQ0Wo7k3YQBvG2MteytuizFz7Wy0XfeR9cgXVtkyJt3yD +PRJYZLiS69TkOyWIBHjkwXmRg== X-Google-Smtp-Source: ABdhPJzZU2SW6xSSYAUuV1zconLH6GIxEvVIOZ20+ezIrpxGaHuX5RI8FCZ3MnKstZuex1xohhisHA== X-Received: by 2002:a05:6512:1050:: with SMTP id c16mr6759719lfb.597.1605842825427; Thu, 19 Nov 2020 19:27:05 -0800 (PST) Received: from gilgamesh.semihalf.com (193-106-246-138.noc.fibertech.net.pl. [193.106.246.138]) by smtp.gmail.com with ESMTPSA id s26sm153647lji.31.2020.11.19.19.27.04 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Nov 2020 19:27:04 -0800 (PST) From: Marcin Wojtas To: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Cc: ulf.hansson@linaro.org, huziji@marvell.com, adrian.hunter@intel.com, jaz@semihalf.com, tn@semihalf.com, ard.biesheuvel@arm.com, kostap@marvell.com, Marcin Wojtas Subject: [PATCH v2 3/4] mmc: sdhci-xenon: use clk only with DT Date: Fri, 20 Nov 2020 04:26:38 +0100 Message-Id: <20201120032639.24386-4-mw@semihalf.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20201120032639.24386-1-mw@semihalf.com> References: <20201120032639.24386-1-mw@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org As a preparation for supporting ACPI, modify the driver to use the clk framework only when booting with DT - otherwise rely on the configuration done by firmware. For that purpose introduce also a custom SDHCI get_max_clock callback. Signed-off-by: Marcin Wojtas --- drivers/mmc/host/sdhci-xenon.c | 80 +++++++++++++------- 1 file changed, 51 insertions(+), 29 deletions(-) diff --git a/drivers/mmc/host/sdhci-xenon.c b/drivers/mmc/host/sdhci-xenon.c index bfc76b0e3eaa..dfc3b5f62a6d 100644 --- a/drivers/mmc/host/sdhci-xenon.c +++ b/drivers/mmc/host/sdhci-xenon.c @@ -247,6 +247,16 @@ static void xenon_voltage_switch(struct sdhci_host *host) sdhci_readw(host, SDHCI_HOST_CONTROL2); } +static unsigned int xenon_get_max_clock(struct sdhci_host *host) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + + if (pltfm_host->clk) + return sdhci_pltfm_clk_get_max_clock(host); + else + return pltfm_host->clock; +} + static const struct sdhci_ops sdhci_xenon_ops = { .voltage_switch = xenon_voltage_switch, .set_clock = sdhci_set_clock, @@ -254,7 +264,7 @@ static const struct sdhci_ops sdhci_xenon_ops = { .set_bus_width = sdhci_set_bus_width, .reset = xenon_reset, .set_uhs_signaling = xenon_set_uhs_signaling, - .get_max_clock = sdhci_pltfm_clk_get_max_clock, + .get_max_clock = xenon_get_max_clock, }; static const struct sdhci_pltfm_data sdhci_xenon_pdata = { @@ -483,6 +493,7 @@ static void xenon_sdhc_unprepare(struct sdhci_host *host) static int xenon_probe(struct platform_device *pdev) { struct sdhci_pltfm_host *pltfm_host; + struct device *dev = &pdev->dev; struct sdhci_host *host; struct xenon_priv *priv; int err; @@ -503,25 +514,27 @@ static int xenon_probe(struct platform_device *pdev) */ xenon_replace_mmc_host_ops(host); - pltfm_host->clk = devm_clk_get(&pdev->dev, "core"); - if (IS_ERR(pltfm_host->clk)) { - err = PTR_ERR(pltfm_host->clk); - dev_err(&pdev->dev, "Failed to setup input clk: %d\n", err); - goto free_pltfm; - } - err = clk_prepare_enable(pltfm_host->clk); - if (err) - goto free_pltfm; - - priv->axi_clk = devm_clk_get(&pdev->dev, "axi"); - if (IS_ERR(priv->axi_clk)) { - err = PTR_ERR(priv->axi_clk); - if (err == -EPROBE_DEFER) - goto err_clk; - } else { - err = clk_prepare_enable(priv->axi_clk); + if (dev->of_node) { + pltfm_host->clk = devm_clk_get(&pdev->dev, "core"); + if (IS_ERR(pltfm_host->clk)) { + err = PTR_ERR(pltfm_host->clk); + dev_err(&pdev->dev, "Failed to setup input clk: %d\n", err); + goto free_pltfm; + } + err = clk_prepare_enable(pltfm_host->clk); if (err) - goto err_clk; + goto free_pltfm; + + priv->axi_clk = devm_clk_get(&pdev->dev, "axi"); + if (IS_ERR(priv->axi_clk)) { + err = PTR_ERR(priv->axi_clk); + if (err == -EPROBE_DEFER) + goto err_clk; + } else { + err = clk_prepare_enable(priv->axi_clk); + if (err) + goto err_clk; + } } err = mmc_of_parse(host->mmc); @@ -561,9 +574,11 @@ static int xenon_probe(struct platform_device *pdev) pm_runtime_put_noidle(&pdev->dev); xenon_sdhc_unprepare(host); err_clk_axi: - clk_disable_unprepare(priv->axi_clk); + if (dev->of_node) + clk_disable_unprepare(priv->axi_clk); err_clk: - clk_disable_unprepare(pltfm_host->clk); + if (dev->of_node) + clk_disable_unprepare(pltfm_host->clk); free_pltfm: sdhci_pltfm_free(pdev); return err; @@ -574,6 +589,7 @@ static int xenon_remove(struct platform_device *pdev) struct sdhci_host *host = platform_get_drvdata(pdev); struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); struct xenon_priv *priv = sdhci_pltfm_priv(pltfm_host); + struct device *dev = &pdev->dev; pm_runtime_get_sync(&pdev->dev); pm_runtime_disable(&pdev->dev); @@ -582,8 +598,10 @@ static int xenon_remove(struct platform_device *pdev) sdhci_remove_host(host, 0); xenon_sdhc_unprepare(host); - clk_disable_unprepare(priv->axi_clk); - clk_disable_unprepare(pltfm_host->clk); + if (dev->of_node) { + clk_disable_unprepare(priv->axi_clk); + clk_disable_unprepare(pltfm_host->clk); + } sdhci_pltfm_free(pdev); @@ -620,7 +638,8 @@ static int xenon_runtime_suspend(struct device *dev) if (host->tuning_mode != SDHCI_TUNING_MODE_3) mmc_retune_needed(host->mmc); - clk_disable_unprepare(pltfm_host->clk); + if (dev->of_node) + clk_disable_unprepare(pltfm_host->clk); /* * Need to update the priv->clock here, or when runtime resume * back, phy don't aware the clock change and won't adjust phy @@ -637,10 +656,12 @@ static int xenon_runtime_resume(struct device *dev) struct xenon_priv *priv = sdhci_pltfm_priv(pltfm_host); int ret; - ret = clk_prepare_enable(pltfm_host->clk); - if (ret) { - dev_err(dev, "can't enable mainck\n"); - return ret; + if (dev->of_node) { + ret = clk_prepare_enable(pltfm_host->clk); + if (ret) { + dev_err(dev, "can't enable mainck\n"); + return ret; + } } if (priv->restore_needed) { @@ -655,7 +676,8 @@ static int xenon_runtime_resume(struct device *dev) goto out; return 0; out: - clk_disable_unprepare(pltfm_host->clk); + if (dev->of_node) + clk_disable_unprepare(pltfm_host->clk); return ret; } #endif /* CONFIG_PM */ From patchwork Fri Nov 20 03:26:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcin Wojtas X-Patchwork-Id: 330189 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2BC83C64E75 for ; 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[193.106.246.138]) by smtp.gmail.com with ESMTPSA id s26sm153647lji.31.2020.11.19.19.27.05 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Nov 2020 19:27:06 -0800 (PST) From: Marcin Wojtas To: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Cc: ulf.hansson@linaro.org, huziji@marvell.com, adrian.hunter@intel.com, jaz@semihalf.com, tn@semihalf.com, ard.biesheuvel@arm.com, kostap@marvell.com, Marcin Wojtas Subject: [PATCH v2 4/4] mmc: sdhci-xenon: introduce ACPI support Date: Fri, 20 Nov 2020 04:26:39 +0100 Message-Id: <20201120032639.24386-5-mw@semihalf.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20201120032639.24386-1-mw@semihalf.com> References: <20201120032639.24386-1-mw@semihalf.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Previous patches dropped the strict dependency on the OF_* in the sdhci-xenon driver. As a result the ACPI support can be introduced (except for the XENON_A3700 variant) by adding the necessary ID's in the acpi_match_table. Signed-off-by: Marcin Wojtas --- drivers/mmc/host/sdhci-xenon.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/mmc/host/sdhci-xenon.c b/drivers/mmc/host/sdhci-xenon.c index dfc3b5f62a6d..6d4f588d4c11 100644 --- a/drivers/mmc/host/sdhci-xenon.c +++ b/drivers/mmc/host/sdhci-xenon.c @@ -11,6 +11,7 @@ * Special thanks to Video BG4 project team. */ +#include #include #include #include @@ -698,11 +699,22 @@ static const struct of_device_id sdhci_xenon_dt_ids[] = { }; MODULE_DEVICE_TABLE(of, sdhci_xenon_dt_ids); +#ifdef CONFIG_ACPI +static const struct acpi_device_id sdhci_xenon_acpi_ids[] = { + { .id = "MRVL0002", XENON_AP806}, + { .id = "MRVL0003", XENON_AP807}, + { .id = "MRVL0004", XENON_CP110}, + {} +}; +MODULE_DEVICE_TABLE(acpi, sdhci_xenon_acpi_ids); +#endif + static struct platform_driver sdhci_xenon_driver = { .driver = { .name = "xenon-sdhci", .probe_type = PROBE_PREFER_ASYNCHRONOUS, .of_match_table = sdhci_xenon_dt_ids, + .acpi_match_table = ACPI_PTR(sdhci_xenon_acpi_ids), .pm = &sdhci_xenon_dev_pm_ops, }, .probe = xenon_probe,