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+ EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[HI1616_GIC_STRUCTURE_COUNT]; + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8]; +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE; + +#pragma pack () #endif diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc index 169ee72..33dca03 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc @@ -1,9 +1,9 @@ /** @file * Multiple APIC Description Table (MADT) * -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved. -* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved. -* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved. +* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved. +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved. +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved. * * This program and the accompanying materials * @@ -19,34 +19,11 @@ * **/ - -#include +#include "Hi1616Platform.h" #include #include #include #include -#include "Hi1616Platform.h" - -// Differs from Juno, we have another affinity level beyond cluster and core -// 0x20000 is only for socket 0 -#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId)) -#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId)) -#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId)) -#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId)) - -// -// Multiple APIC Description Table -// -#pragma pack (1) - -typedef struct { - EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; - EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[64]; - EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor; - EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8]; -} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE; - -#pragma pack () EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = { { diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c new file mode 100644 index 0000000..eac4736 --- /dev/null +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c @@ -0,0 +1,447 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/ +* +**/ + +#include "Pptt.h" + +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL; +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL; + +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader = + ARM_ACPI_HEADER ( + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE, + EFI_ACPI_DESCRIPTION_HEADER, + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION + ); + +EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] = +{ + {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0} +}; + +EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] = +{ + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1I 48K 0xC000 CacheAssociativity8Way + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1D 32k 0x8000 CacheAssociativity8Way + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L2 1M 0x100000 CacheAssociativity8Way + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x10, 0x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte +}; + +EFI_STATUS +InitCacheInfo( + ) +{ + UINT8 Index; + PPTT_TYPE1_ATTRIBUTES Type1Attributes; + CSSELR_DATA CsselrData; + CCSIDR_DATA CcsidrData; + + for (Index = 0; Index < PPTT_CACHE_NO - 1; Index++) { + CsselrData.Data = 0; + CcsidrData.Data = 0; + Type1Attributes.Data = 0; + + if (Index == 0) { //L1I + CsselrData.Bits.InD = 1; + CsselrData.Bits.Level = 0; + Type1Attributes.Bits.CacheType = 1; + } else if (Index == 1) { + Type1Attributes.Bits.CacheType = 0; + CsselrData.Bits.Level = Index -1; + } else { + Type1Attributes.Bits.CacheType = 2; + CsselrData.Bits.Level = Index -1; + } + + CcsidrData.Data = ReadCCSIDR (CsselrData.Data); + + if (CcsidrData.Bits.Wa == 1) { + Type1Attributes.Bits.AllocateType = 1; + if (CcsidrData.Bits.Ra == 1) { + Type1Attributes.Bits.AllocateType++; + } + } + + if (CcsidrData.Bits.Wt == 1) { + Type1Attributes.Bits.WritePolicy = 1; + } + DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level = %x!CcsidrData = %x!\n",CsselrData.Bits.Level, CcsidrData.Data)); + + mPpttCacheType1[Index].NumberOfSets = (UINT16)CcsidrData.Bits.NumSets + 1; + mPpttCacheType1[Index].Associativity = (UINT16)CcsidrData.Bits.Associativity + 1; + mPpttCacheType1[Index].LineSize = (UINT16)( 1 << (CcsidrData.Bits.LineSize + 4)); + mPpttCacheType1[Index].Size = mPpttCacheType1[Index].LineSize * \ + mPpttCacheType1[Index].Associativity * \ + mPpttCacheType1[Index].NumberOfSets; + mPpttCacheType1[Index].Attributes = Type1Attributes.Data; + mPpttCacheType1[Index].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \ + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \ + PPTT_TYPE1_LINE_SIZE_VALID; + + } + + // L3 + mPpttCacheType1[3].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \ + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \ + PPTT_TYPE1_LINE_SIZE_VALID; + + return EFI_SUCCESS; +} + +EFI_STATUS +AddCoreTable( + IN VOID *PpttTable, + IN OUT VOID *PpttTableLengthRemain, + IN UINT32 Flags, + IN UINT32 Parent, + IN UINT32 ResourceNo, + IN UINT32 ProcessorId + ) +{ + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0; + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1; + UINT32 *PrivateResource; + UINT8 Index; + + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) { + return EFI_OUT_OF_RESOURCES; + } + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length); + PpttType0->Type = 0; + PpttType0->Flags = Flags; + PpttType0->Parent= Parent; + PpttType0->AcpiProcessorId = ProcessorId; + PpttType0->PrivateResourceNo = ResourceNo; + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4; + + *(UINT32 *)PpttTableLengthRemain -= (UINTN)PpttType0->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length; + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0)); + + // Add cache type structure + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) { + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) { + return EFI_OUT_OF_RESOURCES; + } + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length; + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length); + gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE1)); + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length; + } + + return EFI_SUCCESS; +} + +EFI_STATUS +AddClusterTable ( + IN VOID *PpttTable, + IN OUT VOID *PpttTableLengthRemain, + IN UINT32 Flags, + IN UINT32 Parent, + IN UINT32 ResourceNo + ) +{ + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0; + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1; + UINT32 *PrivateResource; + + if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4)) { + return EFI_OUT_OF_RESOURCES; + } + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length); + PpttType0->Type = 0; + PpttType0->Flags = Flags; + PpttType0->Parent= Parent; + PpttType0->PrivateResourceNo = ResourceNo; + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4; + + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length; + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0)); + + // Add cache type structure + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) { + return EFI_OUT_OF_RESOURCES; + } + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length; + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length); + gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PPTT_TYPE1)); + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length; + + return EFI_SUCCESS; +} + +EFI_STATUS +AddScclTable( + IN VOID *PpttTable, + IN OUT VOID *PpttTableLengthRemain, + IN UINT32 Flags, + IN UINT32 Parent, + IN UINT32 ResourceNo + ) +{ + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0; + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1; + UINT32 *PrivateResource; + + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) { + return EFI_OUT_OF_RESOURCES; + } + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length); + PpttType0->Type = 0; + PpttType0->Flags = Flags; + PpttType0->Parent= Parent; + PpttType0->PrivateResourceNo = ResourceNo; + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4; + + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length; + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0)); + + // Add cache type structure + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) { + return EFI_OUT_OF_RESOURCES; + } + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length; + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length); + gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PPTT_TYPE1)); + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length; + + return EFI_SUCCESS; +} + +EFI_STATUS +AddSocketTable( + IN VOID *PpttTable, + IN OUT VOID *PpttTableLengthRemain, + IN UINT32 Flags, + IN UINT32 Parent, + IN UINT32 ResourceNo + ) +{ + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0; + EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2; + UINT32 *PrivateResource; + UINT8 Index; + + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0)) { + return EFI_OUT_OF_RESOURCES; + } + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length); + PpttType0->Type = 0; + PpttType0->Flags = Flags; + PpttType0->Parent= Parent; + PpttType0->PrivateResourceNo = ResourceNo; + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length; + + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length; + if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) { + return EFI_OUT_OF_RESOURCES; + } + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0)); + DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) = %x!\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2))); + + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) { + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE2)) { + return EFI_OUT_OF_RESOURCES; + } + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length; + PpttType2 = (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length); + gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE2)); + *(UINT32 *)PpttTableLengthRemain -= PpttType2->Length; + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType2->Length; + } + + return EFI_SUCCESS; +} + +VOID +GetApic( +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable, +VOID *PpttTable, +IN UINT32 PpttTableLengthRemain, +IN UINT32 Index1 +) +{ + UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore; + UINT32 SocketOffset, ScclOffset, ClusterOffset; + UINT32 Parent = 0; + UINT32 Flags = 0; + UINT32 ResourceNo = 0; + //Get APIC data + for (IndexSocket = 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) { + SocketOffset = 0; + for (IndexSccl = 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) { + ScclOffset = 0; + for (IndexCulster = 0; IndexCulster < PPTT_CULSTER_NO; IndexCulster++) { + ClusterOffset = 0; + for (IndexCore = 0; IndexCore < PPTT_CORE_NO; IndexCore++) { + + DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%x, IndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,IndexCore)); + + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid != Index1) { + //This processor is unusable + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for UID!\n")); + return; + } + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) == 0 ) { + //This processor is unusable + Index1++; + continue; + } + + if (SocketOffset == 0) { + //Add socket0 for type0 table + ResourceNo = PPTT_SOCKET_COMPONENT_NO; + SocketOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length; + Parent = 0; + Flags = PPTT_TYPE0_SOCKET_FLAG; + AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo); + } + if (ScclOffset == 0) { + //Add socket0die0 for type0 table + ResourceNo = 1; + ScclOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ; + Parent = SocketOffset; + Flags = PPTT_TYPE0_DIE_FLAG; + AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo); + } + if (ClusterOffset == 0) { + //Add socket0die0ClusterId for type0 table + ResourceNo = 1; + ClusterOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ; + Parent = ScclOffset; + Flags = PPTT_TYPE0_CLUSTER_FLAG; + AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo); + } + + //Add socket0die0ClusterIdCoreId for type0 table + ResourceNo = 2; + Parent = ClusterOffset; + Flags = PPTT_TYPE0_CORE_FLAG; + AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo, Index1); + + Index1++; + } + } + } + } + return ; +} + +VOID +PpttSetAcpiTable( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + UINTN AcpiTableHandle; + EFI_STATUS Status; + UINT8 Checksum; + EFI_ACPI_SDT_HEADER *Table; + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable; + EFI_ACPI_TABLE_VERSION TableVersion; + VOID *PpttTable; + UINTN TableKey; + UINT32 Index0, Index1; + UINT32 PpttTableLengthRemain = 0; + + gBS->CloseEvent (Event); + + InitCacheInfo (); + + PpttTable = AllocateZeroPool (PPTT_TABLE_MAX_LEN); + gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_HEADER)); + PpttTableLengthRemain = PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCRIPTION_HEADER); + + for (Index0 = 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) { + Status = mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableVersion, &TableKey); + if (EFI_ERROR (Status)) { + break; + } + //Find APIC table + if (Table->Signature != EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) { + continue; + } + + ApicTable = (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table; + Index1 = 0; + + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1); + break; + } + + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR,"%a:%d Status=%r\n",__FILE__,__LINE__,Status)); + } + + Checksum = CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length); + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum= Checksum; + + AcpiTableHandle = 0; + Status = mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, PpttTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableHandle); + + FreePool (PpttTable); + return ; +} + +EFI_STATUS +InitPpttTable( + ) +{ + EFI_STATUS Status; + EFI_EVENT ReadyToBootEvent; + + Status = EfiCreateEventReadyToBootEx ( + TPL_NOTIFY, + PpttSetAcpiTable, + NULL, + &ReadyToBootEvent + ); + ASSERT_EFI_ERROR (Status); + + return Status; +} + +EFI_STATUS +EFIAPI +PpttEntryPoint( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol); + if (EFI_ERROR (Status)) { + return EFI_ABORTED; + } + + Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol); + if (EFI_ERROR (Status)) { + return EFI_ABORTED; + } + + InitPpttTable (); + + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n")); + + return EFI_SUCCESS; +} diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h new file mode 100644 index 0000000..5dc635f --- /dev/null +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h @@ -0,0 +1,142 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/ +* +**/ + +#ifndef _PPTT_H_ +#define _PPTT_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../D05AcpiTables/Hi1616Platform.h" + +/// +/// "PPTT" Processor Properties Topology Table +/// +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T') +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01 +#define EFI_ACPI_MAX_NUM_TABLES 20 + +#define PPTT_TABLE_MAX_LEN 0x6000 +#define PPTT_SOCKET_NO 0x2 +#define PPTT_DIE_NO 0x2 +#define PPTT_CULSTER_NO 0x4 +#define PPTT_CORE_NO 0x4 +#define PPTT_SOCKET_COMPONENT_NO 0x1 +#define PPTT_CACHE_NO 0x4 + +#define PPTT_TYPE0_PHYSICAL_PKG BIT0 +#define PPTT_TYPE0_PROCESSORID_VALID BIT1 +#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG +#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG +#define PPTT_TYPE0_CLUSTER_FLAG 0 +#define PPTT_TYPE0_CORE_FLAG PPTT_TYPE0_PROCESSORID_VALID + +#define PPTT_TYPE1_SIZE_VALID BIT0 +#define PPTT_TYPE1_NUMBER_OF_SETS_VALID BIT1 +#define PPTT_TYPE1_ASSOCIATIVITY_VALID BIT2 +#define PPTT_TYPE1_ALLOCATION_TYPE_VALID BIT3 +#define PPTT_TYPE1_CACHE_TYPE_VALID BIT4 +#define PPTT_TYPE1_WRITE_POLICY_VALID BIT5 +#define PPTT_TYPE1_LINE_SIZE_VALID BIT6 + +typedef union { + struct { + UINT32 InD :1; + UINT32 Level :3; + UINT32 Reserved :28; + } Bits; + UINT32 Data; +}CSSELR_DATA; + +typedef union { + struct { + UINT32 LineSize :3; + UINT32 Associativity :10; + UINT32 NumSets :15; + UINT32 Wa :1; + UINT32 Ra :1; + UINT32 Wb :1; + UINT32 Wt :1; + } Bits; + UINT32 Data; +}CCSIDR_DATA; + +// +// Processor Hierarchy Node Structure +// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT32 Flags; + UINT32 Parent; + UINT32 AcpiProcessorId; + UINT32 PrivateResourceNo; +} EFI_ACPI_6_2_PPTT_TYPE0; + +// +// Cache Configuration +// +typedef union { + struct { + UINT8 AllocateType :2; + UINT8 CacheType :2; + UINT8 WritePolicy :1; + UINT8 Reserved :3; + } Bits; + UINT8 Data; +}PPTT_TYPE1_ATTRIBUTES; + +// +// Cache Type Structure +// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT32 Flags; + UINT32 NextLevelOfCache; + UINT32 Size; + UINT32 NumberOfSets; + UINT8 Associativity; + UINT8 Attributes; + UINT16 LineSize; +} EFI_ACPI_6_2_PPTT_TYPE1; + +// +// ID Structure +// +typedef struct { + UINT8 Type; + UINT8 Length; + UINT16 Reserved; + UINT32 VendorId; + UINT64 Level1Id; + UINT64 Level2Id; + UINT16 MajorRev; + UINT16 MinorRev; + UINT16 SpinRev; +} EFI_ACPI_6_2_PPTT_TYPE2; + +#endif // _PPTT_H_ + diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf new file mode 100644 index 0000000..ce26b97 --- /dev/null +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf @@ -0,0 +1,55 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/ +* +**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = AcpiPptt + FILE_GUID = AAB14F90-DC2E-4f33-A594-C7894A5B412D + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = PpttEntryPoint + +[Sources.common] + Pptt.c + Pptt.h + +[Packages] + MdePkg/MdePkg.dec + edk2-platforms/Silicon/Hisilicon/HisiPkg.dec + ArmPkg/ArmPkg.dec + +[LibraryClasses] + ArmLib + HobLib + UefiRuntimeServicesTableLib + UefiDriverEntryPoint + BaseMemoryLib + DebugLib + +[Guids] + + +[Protocols] + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED + gEfiAcpiSdtProtocolGuid + +[Pcd] + + +[Depex] + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid + From patchwork Thu Jan 18 15:01:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 124975 Delivered-To: patch@linaro.org Received: by 10.80.140.226 with SMTP id r31csp3635841edr; Thu, 18 Jan 2018 07:02:06 -0800 (PST) X-Google-Smtp-Source: ACJfBoud44jEZuiOSIYGQSyPb32ff8Ob1N5/GrpMOZVmafAlz3uSs16MQ5OfFQ10wezanz/jZGSs X-Received: by 10.98.147.154 with SMTP id r26mr14329589pfk.207.1516287725909; Thu, 18 Jan 2018 07:02:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516287725; cv=none; d=google.com; s=arc-20160816; b=Av7w5fRf4CVem5QyLtFwVzO5/JbVtwupzo56W65hvOwp1MKVZwwIz5cSzGXNu52qxV WUStxO7+OGhbX8dsChvfU72q4AcJYZh8AR9LYs74rTY9nLhg0qJ99bx7PB2L4RH/BIk8 Zrwkbm4JKU4Ps7f1T5Yiw48TitXSNHi+0fX4/gs3ZXZ434396slEbYXSNPpw9jEQ1zLe DyVKT6na9DxoKe17mthLV/Q9bUHnkY0YuwsWdROavh8MFuLFtXhKFZcGmgFzyybqSHmL xfM76li2Esn6TNrAQNjo6IKzO8yqlqtmHgp2WdwdgIgz0UsqXfdUIV4BP0uCpvvYFfIL kOZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:references:in-reply-to:message-id :date:to:from:dkim-signature:delivered-to:arc-authentication-results; bh=rBqrg0tjT70MH0P8U/HJpusDbMUaG+dsv90X/tngXl8=; b=wTy5JgdmQAEZdFnz5Y43SkJrreLZJDudPJscudu4cAHWwPeBI/jVdh6SnEfryHK/Nl 42Kv/ksv4F27xXXn80CnWvMamBOwcjuvlQYJXsuiaMjZme1ImbI6SGETIIwrY3MDnEvm v1W9O6vSc80ggdIESoIiUSArEHQUpRaS0btQmUcLyS7ABPVfupNf/5bJe76ECUEAoC3a a5UUTofAxuNVjlOclF8bOIo6wV/ZAKJIUQ3M+V9OXAMODzKOqBCQGOcIHe5E5P4+BVzU JjOFZpjweanjOWEQ1yRh6uzKXro68sAHR9MEEhoZrVsxxED4JlJ/Gy6cr5oazi84FO2z oTHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=OaPo0qb9; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. 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cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Jan 2018 07:01:58 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:31 +0800 Message-Id: <1516287703-35516-3-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> MIME-Version: 1.0 Subject: [edk2] =?utf-8?q?=5BPATCH_edk2-platforms_v1_02/14=5D_Hisilicon_D0?= =?utf-8?q?3/D05=EF=BC=9ASwitch_to_Generic_BDS_driver?= X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Signed-off-by: Jason Zhang --- Platform/Hisilicon/D03/D03.dsc | 24 + Platform/Hisilicon/D03/D03.fdf | 7 + Platform/Hisilicon/D05/D05.dsc | 27 +- Platform/Hisilicon/D05/D05.fdf | 7 + Silicon/Hisilicon/Hisilicon.dsc.inc | 1 + Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 588 +++++++++++++++++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h | 59 ++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 89 +++ Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c | 681 ++++++++++++++++++++ 9 files changed, 1481 insertions(+), 2 deletions(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index b434f68..f7efff5 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -28,6 +28,7 @@ BUILD_TARGETS = DEBUG|RELEASE SKUID_IDENTIFIER = DEFAULT FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf + DEFINE GENERIC_BDS = TRUE !include Silicon/Hisilicon/Hisilicon.dsc.inc @@ -68,6 +69,14 @@ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf +!if $(GENERIC_BDS) == TRUE + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf +!endif CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf # USB Requirements @@ -188,6 +197,9 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 } +!if $(GENERIC_BDS) == TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }|VOID*|0x0001006b +!endif gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x40010000 gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8 @@ -405,6 +417,14 @@ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf +!if $(GENERIC_BDS) == TRUE + MdeModulePkg/Application/UiApp/UiApp.inf { + + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf + } +!endif MdeModulePkg/Application/HelloWorld/HelloWorld.inf # # Bds @@ -457,7 +477,11 @@ MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf +!if $(GENERIC_BDS) == TRUE + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf +!else IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf +!endif # # UEFI application (Shell Embedded Boot Loader) diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index 0b38eb4..0d704b5 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -283,6 +283,9 @@ READ_LOCK_STATUS = TRUE INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf !endif #$(INCLUDE_TFTP_COMMAND) +!if $(GENERIC_BDS) == TRUE + INF MdeModulePkg/Application/UiApp/UiApp.inf +!endif # # Bds # @@ -291,7 +294,11 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf +!if $(GENERIC_BDS) == TRUE + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf +!else INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf +!endif [FV.FVMAIN_COMPACT] FvAlignment = 16 diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 710339c..57370dc 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -31,7 +31,7 @@ DEFINE EDK2_SKIP_PEICORE=0 DEFINE NETWORK_IP6_ENABLE = FALSE DEFINE HTTP_BOOT_ENABLE = FALSE - + DEFINE GENERIC_BDS = TRUE !include Silicon/Hisilicon/Hisilicon.dsc.inc [LibraryClasses.common] @@ -84,6 +84,14 @@ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf +!if $(GENERIC_BDS) == TRUE + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf +!endif CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf # USB Requirements @@ -119,6 +127,7 @@ # It could be set FALSE to save size. gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE [PcdsFixedAtBuild.common] gArmPlatformTokenSpaceGuid.PcdCoreCount|8 @@ -203,7 +212,9 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 } - +!if $(GENERIC_BDS) == TRUE + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }|VOID*|0x0001006b +!endif gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x40010000 gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8 @@ -560,6 +571,14 @@ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf +!if $(GENERIC_BDS) == TRUE + MdeModulePkg/Application/UiApp/UiApp.inf { + + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf + } +!endif # # Bds # @@ -610,7 +629,11 @@ MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf +!if $(GENERIC_BDS) == TRUE + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf +!else IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf +!endif # # UEFI application (Shell Embedded Boot Loader) # diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 97de4d2..d209210 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -305,6 +305,9 @@ READ_LOCK_STATUS = TRUE INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf !endif #$(INCLUDE_TFTP_COMMAND) +!if $(GENERIC_BDS) == TRUE + INF MdeModulePkg/Application/UiApp/UiApp.inf +!endif # # Bds # @@ -313,7 +316,11 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf +!if $(GENERIC_BDS) == TRUE + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf +!else INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf +!endif [FV.FVMAIN_COMPACT] FvAlignment = 16 diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc index cc23673..308064b 100644 --- a/Silicon/Hisilicon/Hisilicon.dsc.inc +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc @@ -263,6 +263,7 @@ gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1 gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4 # DEBUG_ASSERT_ENABLED 0x01 # DEBUG_PRINT_ENABLED 0x02 diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c new file mode 100644 index 0000000..5d8d58e --- /dev/null +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c @@ -0,0 +1,588 @@ +/** @file + Implementation for PlatformBootManagerLib library class interfaces. + + Copyright (c) 2018, ARM Ltd. All rights reserved.
+ Copyright (c) 2018, Hisilicon Limited. All rights reserved. + Copyright (c) 2018, Linaro Ltd. All rights reserved.
+ + This program and the accompanying materials are licensed and made available + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "PlatformBm.h" + +#define DP_NODE_LEN(Type) { (UINT8)sizeof (Type), (UINT8)(sizeof (Type) >> 8) } + + +#pragma pack (1) +typedef struct { + VENDOR_DEVICE_PATH SerialDxe; + UART_DEVICE_PATH Uart; + VENDOR_DEFINED_DEVICE_PATH TermType; + EFI_DEVICE_PATH_PROTOCOL End; +} PLATFORM_SERIAL_CONSOLE; +#pragma pack () + +#define SERIAL_DXE_FILE_GUID { \ + 0xD3987D4B, 0x971A, 0x435F, \ + { 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } \ + } + +EFI_GUID EblAppGuid2 = {0x3CEF354A,0x3B7A,0x4519,{0xAD,0x70,0x72,0xA1,0x34,0x69,0x83,0x11}}; + +STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = { + // + // VENDOR_DEVICE_PATH SerialDxe + // + { + { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) }, + SERIAL_DXE_FILE_GUID + }, + + // + // UART_DEVICE_PATH Uart + // + { + { MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) }, + 0, // Reserved + FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate + FixedPcdGet8 (PcdUartDefaultDataBits), // DataBits + FixedPcdGet8 (PcdUartDefaultParity), // Parity + FixedPcdGet8 (PcdUartDefaultStopBits) // StopBits + }, + + // + // VENDOR_DEFINED_DEVICE_PATH TermType + // + { + { + MESSAGING_DEVICE_PATH, MSG_VENDOR_DP, + DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH) + } + // + // Guid to be filled in dynamically + // + }, + + // + // EFI_DEVICE_PATH_PROTOCOL End + // + { + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL) + } +}; + + +#pragma pack (1) +typedef struct { + USB_CLASS_DEVICE_PATH Keyboard; + EFI_DEVICE_PATH_PROTOCOL End; +} PLATFORM_USB_KEYBOARD; +#pragma pack () + +STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = { + // + // USB_CLASS_DEVICE_PATH Keyboard + // + { + { + MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP, + DP_NODE_LEN (USB_CLASS_DEVICE_PATH) + }, + 0xFFFF, // VendorId: any + 0xFFFF, // ProductId: any + 3, // DeviceClass: HID + 1, // DeviceSubClass: boot + 1 // DeviceProtocol: keyboard + }, + + // + // EFI_DEVICE_PATH_PROTOCOL End + // + { + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL) + } +}; + + +/** + Check if the handle satisfies a particular condition. + + @param[in] Handle The handle to check. + @param[in] ReportText A caller-allocated string passed in for reporting + purposes. It must never be NULL. + + @retval TRUE The condition is satisfied. + @retval FALSE Otherwise. This includes the case when the condition could not + be fully evaluated due to an error. +**/ +typedef +BOOLEAN +(EFIAPI *FILTER_FUNCTION) ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ); + + +/** + Process a handle. + + @param[in] Handle The handle to process. + @param[in] ReportText A caller-allocated string passed in for reporting + purposes. It must never be NULL. +**/ +typedef +VOID +(EFIAPI *CALLBACK_FUNCTION) ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ); + +/** + Locate all handles that carry the specified protocol, filter them with a + callback function, and pass each handle that passes the filter to another + callback. + + @param[in] ProtocolGuid The protocol to look for. + + @param[in] Filter The filter function to pass each handle to. If this + parameter is NULL, then all handles are processed. + + @param[in] Process The callback function to pass each handle to that + clears the filter. +**/ +STATIC +VOID +FilterAndProcess ( + IN EFI_GUID *ProtocolGuid, + IN FILTER_FUNCTION Filter OPTIONAL, + IN CALLBACK_FUNCTION Process + ) +{ + EFI_STATUS Status; + EFI_HANDLE *Handles; + UINTN NoHandles; + UINTN Idx; + + Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid, + NULL /* SearchKey */, &NoHandles, &Handles); + if (EFI_ERROR (Status)) { + // + // This is not an error, just an informative condition. + // + DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid, + Status)); + return; + } + + ASSERT (NoHandles > 0); + for (Idx = 0; Idx < NoHandles; ++Idx) { + CHAR16 *DevicePathText; + STATIC CHAR16 Fallback[] = L""; + + // + // The ConvertDevicePathToText() function handles NULL input transparently. + // + DevicePathText = ConvertDevicePathToText ( + DevicePathFromHandle (Handles[Idx]), + FALSE, // DisplayOnly + FALSE // AllowShortcuts + ); + if (DevicePathText == NULL) { + DevicePathText = Fallback; + } + + if (Filter == NULL || Filter (Handles[Idx], DevicePathText)) { + Process (Handles[Idx], DevicePathText); + } + + if (DevicePathText != Fallback) { + FreePool (DevicePathText); + } + } + gBS->FreePool (Handles); +} + + +/** + This FILTER_FUNCTION checks if a handle corresponds to a PCI display device. +**/ +STATIC +BOOLEAN +EFIAPI +IsPciDisplay ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ) +{ + EFI_STATUS Status; + EFI_PCI_IO_PROTOCOL *PciIo; + PCI_TYPE00 Pci; + + Status = gBS->HandleProtocol (Handle, &gEfiPciIoProtocolGuid, + (VOID**)&PciIo); + if (EFI_ERROR (Status)) { + // + // This is not an error worth reporting. + // + return FALSE; + } + + Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */, + sizeof Pci / sizeof (UINT32), &Pci); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status)); + return FALSE; + } + + return IS_PCI_DISPLAY (&Pci); +} + + +/** + This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking + the matching driver to produce all first-level child handles. +**/ +STATIC +VOID +EFIAPI +Connect ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ) +{ + EFI_STATUS Status; + + Status = gBS->ConnectController ( + Handle, // ControllerHandle + NULL, // DriverImageHandle + NULL, // RemainingDevicePath -- produce all children + FALSE // Recursive + ); + DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, "%a: %s: %r\n", + __FUNCTION__, ReportText, Status)); +} + + +/** + This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the + handle, and adds it to ConOut and ErrOut. +**/ +STATIC +VOID +EFIAPI +AddOutput ( + IN EFI_HANDLE Handle, + IN CONST CHAR16 *ReportText + ) +{ + EFI_STATUS Status; + EFI_DEVICE_PATH_PROTOCOL *DevicePath; + + DevicePath = DevicePathFromHandle (Handle); + if (DevicePath == NULL) { + DEBUG ((DEBUG_ERROR, "%a: %s: handle %p: device path not found\n", + __FUNCTION__, ReportText, Handle)); + return; + } + + Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__, + ReportText, Status)); + return; + } + + Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__, + ReportText, Status)); + return; + } + + DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__, + ReportText)); +} + +STATIC +VOID +PlatformRegisterFvBootOption ( + EFI_GUID *FileGuid, + CHAR16 *Description, + UINT32 Attributes + ) +{ + EFI_STATUS Status; + INTN OptionIndex; + EFI_BOOT_MANAGER_LOAD_OPTION NewOption; + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions; + UINTN BootOptionCount; + MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode; + EFI_LOADED_IMAGE_PROTOCOL *LoadedImage; + EFI_DEVICE_PATH_PROTOCOL *DevicePath; + + Status = gBS->HandleProtocol ( + gImageHandle, + &gEfiLoadedImageProtocolGuid, + (VOID **) &LoadedImage + ); + ASSERT_EFI_ERROR (Status); + + EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid); + DevicePath = DevicePathFromHandle (LoadedImage->DeviceHandle); + ASSERT (DevicePath != NULL); + DevicePath = AppendDevicePathNode ( + DevicePath, + (EFI_DEVICE_PATH_PROTOCOL *) &FileNode + ); + ASSERT (DevicePath != NULL); + + Status = EfiBootManagerInitializeLoadOption ( + &NewOption, + LoadOptionNumberUnassigned, + LoadOptionTypeBoot, + Attributes, + Description, + DevicePath, + NULL, + 0 + ); + ASSERT_EFI_ERROR (Status); + FreePool (DevicePath); + + BootOptions = EfiBootManagerGetLoadOptions ( + &BootOptionCount, LoadOptionTypeBoot + ); + + OptionIndex = EfiBootManagerFindLoadOption ( + &NewOption, BootOptions, BootOptionCount + ); + + if (OptionIndex == -1) { + Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN); + ASSERT_EFI_ERROR (Status); + } + EfiBootManagerFreeLoadOption (&NewOption); + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount); +} + + +STATIC +VOID +PlatformRegisterOptionsAndKeys ( + VOID + ) +{ + EFI_STATUS Status; + EFI_INPUT_KEY Enter; + EFI_INPUT_KEY F2; + EFI_INPUT_KEY Esc; + EFI_BOOT_MANAGER_LOAD_OPTION BootOption; + + // + // Register ENTER as CONTINUE key + // + Enter.ScanCode = SCAN_NULL; + Enter.UnicodeChar = CHAR_CARRIAGE_RETURN; + Status = EfiBootManagerRegisterContinueKeyOption (0, &Enter, NULL); + ASSERT_EFI_ERROR (Status); + + // + // Map F2 and ESC to Boot Manager Menu + // + F2.ScanCode = SCAN_F2; + F2.UnicodeChar = CHAR_NULL; + Esc.ScanCode = SCAN_ESC; + Esc.UnicodeChar = CHAR_NULL; + + Status = EfiBootManagerGetBootManagerMenu (&BootOption); + ASSERT_EFI_ERROR (Status); + Status = EfiBootManagerAddKeyOptionVariable ( + NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL + ); + ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED); + Status = EfiBootManagerAddKeyOptionVariable ( + NULL, (UINT16) BootOption.OptionNumber, 0, &Esc, NULL + ); + ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED); +} + +VOID +UpdateMemory ( + ) +{ + EFI_STATUS Status; + EFI_GENERIC_MEMORY_TEST_PROTOCOL* MemoryTest; + BOOLEAN RequireSoftECCInit = FALSE; + + //Add MemoryTest for memmap add above 4G memory. + Status = gBS->LocateProtocol (&gEfiGenericMemTestProtocolGuid, NULL, (VOID**)&MemoryTest); + if (!EFI_ERROR (Status)) { + (VOID)MemoryTest->MemoryTestInit (MemoryTest, IGNORE, &RequireSoftECCInit); + } else { + DEBUG ((DEBUG_ERROR, "LocateProtocol for GenericMemTestProtocol fail(%r)\n", Status)); + } + + return; +} + +// +// BDS Platform Functions +// +/** + Do the platform init, can be customized by OEM/IBV + Possible things that can be done in PlatformBootManagerBeforeConsole: + > Update console variable: 1. include hot-plug devices; + > 2. Clear ConIn and add SOL for AMT + > Register new Driver#### or Boot#### + > Register new Key####: e.g.: F12 + > Signal ReadyToLock event + > Authentication action: 1. connect Auth devices; + > 2. Identify auto logon user. +**/ +VOID +EFIAPI +PlatformBootManagerBeforeConsole ( + VOID + ) +{ + // + // Signal EndOfDxe PI Event + // + EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid); + + UpdateMemory (); + + // + // Locate the PCI root bridges and make the PCI bus driver connect each, + // non-recursively. This will produce a number of child handles with PciIo on + // them. + // + FilterAndProcess (&gEfiPciRootBridgeIoProtocolGuid, NULL, Connect); + + // + // Find all display class PCI devices (using the handles from the previous + // step), and connect them non-recursively. This should produce a number of + // child handles with GOPs on them. + // + FilterAndProcess (&gEfiPciIoProtocolGuid, IsPciDisplay, Connect); + + // + // Now add the device path of all handles with GOP on them to ConOut and + // ErrOut. + // + FilterAndProcess (&gEfiGraphicsOutputProtocolGuid, NULL, AddOutput); + + // + // Add the hardcoded short-form USB keyboard device path to ConIn. + // + EfiBootManagerUpdateConsoleVariable (ConIn, + (EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, NULL); + + // + // Add the hardcoded serial console device path to ConIn, ConOut, ErrOut. + // + ASSERT (FixedPcdGet8 (PcdDefaultTerminalType) == 4); + CopyGuid (&mSerialConsole.TermType.Guid, &gEfiTtyTermGuid); + + EfiBootManagerUpdateConsoleVariable (ConIn, + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL); + EfiBootManagerUpdateConsoleVariable (ConOut, + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL); + EfiBootManagerUpdateConsoleVariable (ErrOut, + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL); + + // + // Register platform-specific boot options and keyboard shortcuts. + // + PlatformRegisterOptionsAndKeys (); +} + +/** + Do the platform specific action after the console is ready + Possible things that can be done in PlatformBootManagerAfterConsole: + > Console post action: + > Dynamically switch output mode from 100x31 to 80x25 for certain senarino + > Signal console ready platform customized event + > Run diagnostics like memory testing + > Connect certain devices + > Dispatch aditional option roms + > Special boot: e.g.: USB boot, enter UI +**/ +VOID +EFIAPI +PlatformBootManagerAfterConsole ( + VOID + ) +{ + EFI_STATUS Status; + ESRT_MANAGEMENT_PROTOCOL *EsrtManagement = NULL; + + // + // Show the splash screen. + // + EnableQuietBoot (PcdGetPtr (PcdLogoFile)); + + // + // Connect the rest of the devices. + // + EfiBootManagerConnectAll (); + + // + // Enumerate all possible boot options. + // + EfiBootManagerRefreshAllBootOption (); + + // + //Sync Esrt Table + // + Status = gBS->LocateProtocol (&gEsrtManagementProtocolGuid, NULL, (VOID **)&EsrtManagement); + if (!EFI_ERROR (Status)) { + Status = EsrtManagement->SyncEsrtFmp (); + } + + // + // Register UEFI Shell + // + PlatformRegisterFvBootOption ( + PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE + ); +} + +/** + This function is called each second during the boot manager waits the + timeout. + + @param TimeoutRemain The remaining timeout. +**/ +VOID +EFIAPI +PlatformBootManagerWaitCallback ( + UINT16 TimeoutRemain + ) +{ + Print(L"\r%-2d seconds left, Press Esc or F2 to enter Setup.", TimeoutRemain); +} diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h new file mode 100644 index 0000000..0a3c626 --- /dev/null +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h @@ -0,0 +1,59 @@ +/** @file + Head file for BDS Platform specific code + + Copyright (C) 2015-2016, Red Hat, Inc. + Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.
+ Copyright (c) 2016, Linaro Ltd. All rights reserved.
+ + This program and the accompanying materials are licensed and made available + under the terms and conditions of the BSD License which accompanies this + distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _PLATFORM_BM_H_ +#define _PLATFORM_BM_H_ + +#include +#include +#include +#include +#include +#include +#include +#include + +/** + Use SystemTable Conout to stop video based Simple Text Out consoles from + going to the video device. Put up LogoFile on every video device that is a + console. + + @param[in] LogoFile File name of logo to display on the center of the + screen. + + @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo + displayed. + @retval EFI_UNSUPPORTED Logo not found +**/ +EFI_STATUS +EnableQuietBoot ( + IN EFI_GUID *LogoFile + ); + +/** + Use SystemTable Conout to turn on video based Simple Text Out consoles. The + Simple Text Out screens will now be synced up with all non video output + devices + + @retval EFI_SUCCESS UGA devices are back in text mode and synced up. +**/ +EFI_STATUS +DisableQuietBoot ( + VOID + ); + +#endif // _PLATFORM_BM_H_ diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf new file mode 100644 index 0000000..ae274f3 --- /dev/null +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf @@ -0,0 +1,89 @@ +## @file +# Implementation for PlatformBootManagerLib library class interfaces. +# +# Copyright (C) 2015-2016, Red Hat, Inc. +# Copyright (c) 2014, ARM Ltd. All rights reserved.
+# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
+# Copyright (c) 2016, Linaro Ltd. All rights reserved.
+# +# This program and the accompanying materials are licensed and made available +# under the terms and conditions of the BSD License which accompanies this +# distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR +# IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = PlatformBootManagerLib + FILE_GUID = 92FD2DE3-B9CB-4B35-8141-42AD34D73C9F + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + LIBRARY_CLASS = PlatformBootManagerLib|DXE_DRIVER + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = ARM AARCH64 +# + +[Sources] + PlatformBm.c + QuietBoot.c + +[Packages] + IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + DevicePathLib + DxeServicesLib + MemoryAllocationLib + PcdLib + PrintLib + UefiBootManagerLib + UefiBootServicesTableLib + UefiLib + +[FeaturePcd] + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBootlogoOnlyEnable + gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport + +[FixedPcd] + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType + +[Pcd] + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut + +[Guids] + gEfiFileInfoGuid + gEfiFileSystemInfoGuid + gEfiFileSystemVolumeLabelInfoIdGuid + gEfiEndOfDxeEventGroupGuid + gEfiTtyTermGuid + +[Protocols] + gEfiDevicePathProtocolGuid + gEfiFirmwareVolume2ProtocolGuid + gEfiGenericMemTestProtocolGuid + gEfiGraphicsOutputProtocolGuid + gEfiLoadedImageProtocolGuid + gEfiOEMBadgingProtocolGuid + gEfiPciRootBridgeIoProtocolGuid + gEfiSimpleFileSystemProtocolGuid + gEsrtManagementProtocolGuid diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c new file mode 100644 index 0000000..0bd15da --- /dev/null +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c @@ -0,0 +1,681 @@ +/** @file +Platform BDS function for quiet boot support. + +Copyright (c) 2018, ARM Ltd. All rights reserved.
+Copyright (c) 2018, Hisilicon Limited. All rights reserved. +Copyright (c) 2018, Linaro Ltd. All rights reserved.
+This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include +#include + +#include "PlatformBm.h" + +/** + Convert a *.BMP graphics image to a GOP blt buffer. If a NULL Blt buffer + is passed in a GopBlt buffer will be allocated by this routine. If a GopBlt + buffer is passed in it will be used if it is big enough. + + @param BmpImage Pointer to BMP file + @param BmpImageSize Number of bytes in BmpImage + @param GopBlt Buffer containing GOP version of BmpImage. + @param GopBltSize Size of GopBlt in bytes. + @param PixelHeight Height of GopBlt/BmpImage in pixels + @param PixelWidth Width of GopBlt/BmpImage in pixels + + @retval EFI_SUCCESS GopBlt and GopBltSize are returned. + @retval EFI_UNSUPPORTED BmpImage is not a valid *.BMP image + @retval EFI_BUFFER_TOO_SMALL The passed in GopBlt buffer is not big enough. + GopBltSize will contain the required size. + @retval EFI_OUT_OF_RESOURCES No enough buffer to allocate. + +**/ +STATIC +EFI_STATUS +ConvertBmpToGopBlt ( + IN VOID *BmpImage, + IN UINTN BmpImageSize, + IN OUT VOID **GopBlt, + IN OUT UINTN *GopBltSize, + OUT UINTN *PixelHeight, + OUT UINTN *PixelWidth + ) +{ + UINT8 *Image; + UINT8 *ImageHeader; + BMP_IMAGE_HEADER *BmpHeader; + BMP_COLOR_MAP *BmpColorMap; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt; + UINT64 BltBufferSize; + UINTN Index; + UINTN Height; + UINTN Width; + UINTN ImageIndex; + UINT32 DataSizePerLine; + BOOLEAN IsAllocated; + UINT32 ColorMapNum; + + if (sizeof (BMP_IMAGE_HEADER) > BmpImageSize) { + return EFI_INVALID_PARAMETER; + } + + BmpHeader = (BMP_IMAGE_HEADER *) BmpImage; + + if (BmpHeader->CharB != 'B' || BmpHeader->CharM != 'M') { + return EFI_UNSUPPORTED; + } + + // + // Doesn't support compress. + // + if (BmpHeader->CompressionType != 0) { + return EFI_UNSUPPORTED; + } + + // + // Only support BITMAPINFOHEADER format. + // BITMAPFILEHEADER + BITMAPINFOHEADER = BMP_IMAGE_HEADER + // + if (BmpHeader->HeaderSize != sizeof (BMP_IMAGE_HEADER) - OFFSET_OF(BMP_IMAGE_HEADER, HeaderSize)) { + return EFI_UNSUPPORTED; + } + + // + // The data size in each line must be 4 byte alignment. + // + DataSizePerLine = ((BmpHeader->PixelWidth * BmpHeader->BitPerPixel + 31) >> 3) & (~0x3); + BltBufferSize = MultU64x32 (DataSizePerLine, BmpHeader->PixelHeight); + if (BltBufferSize > (UINT32) ~0) { + return EFI_INVALID_PARAMETER; + } + + if ((BmpHeader->Size != BmpImageSize) || + (BmpHeader->Size < BmpHeader->ImageOffset) || + (BmpHeader->Size - BmpHeader->ImageOffset != BmpHeader->PixelHeight * DataSizePerLine)) { + return EFI_INVALID_PARAMETER; + } + + // + // Calculate Color Map offset in the image. + // + Image = BmpImage; + BmpColorMap = (BMP_COLOR_MAP *) (Image + sizeof (BMP_IMAGE_HEADER)); + if (BmpHeader->ImageOffset < sizeof (BMP_IMAGE_HEADER)) { + return EFI_INVALID_PARAMETER; + } + + if (BmpHeader->ImageOffset > sizeof (BMP_IMAGE_HEADER)) { + switch (BmpHeader->BitPerPixel) { + case 1: + ColorMapNum = 2; + break; + case 4: + ColorMapNum = 16; + break; + case 8: + ColorMapNum = 256; + break; + default: + ColorMapNum = 0; + break; + } + // + // BMP file may has padding data between the bmp header section and the bmp data section. + // + if (BmpHeader->ImageOffset - sizeof (BMP_IMAGE_HEADER) < sizeof (BMP_COLOR_MAP) * ColorMapNum) { + return EFI_INVALID_PARAMETER; + } + } + + // + // Calculate graphics image data address in the image + // + Image = ((UINT8 *) BmpImage) + BmpHeader->ImageOffset; + ImageHeader = Image; + + // + // Calculate the BltBuffer needed size. + // + BltBufferSize = MultU64x32 ((UINT64) BmpHeader->PixelWidth, BmpHeader->PixelHeight); + // + // Ensure the BltBufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) doesn't overflow + // + if (BltBufferSize > DivU64x32 ((UINTN) ~0, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) { + return EFI_UNSUPPORTED; + } + BltBufferSize = MultU64x32 (BltBufferSize, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + + IsAllocated = FALSE; + if (*GopBlt == NULL) { + // + // GopBlt is not allocated by caller. + // + *GopBltSize = (UINTN) BltBufferSize; + *GopBlt = AllocatePool (*GopBltSize); + IsAllocated = TRUE; + if (*GopBlt == NULL) { + return EFI_OUT_OF_RESOURCES; + } + } else { + // + // GopBlt has been allocated by caller. + // + if (*GopBltSize < (UINTN) BltBufferSize) { + *GopBltSize = (UINTN) BltBufferSize; + return EFI_BUFFER_TOO_SMALL; + } + } + + *PixelWidth = BmpHeader->PixelWidth; + *PixelHeight = BmpHeader->PixelHeight; + + // + // Convert image from BMP to Blt buffer format + // + BltBuffer = *GopBlt; + for (Height = 0; Height < BmpHeader->PixelHeight; Height++) { + Blt = &BltBuffer[(BmpHeader->PixelHeight - Height - 1) * BmpHeader->PixelWidth]; + for (Width = 0; Width < BmpHeader->PixelWidth; Width++, Image++, Blt++) { + switch (BmpHeader->BitPerPixel) { + case 1: + // + // Convert 1-bit (2 colors) BMP to 24-bit color + // + for (Index = 0; Index < 8 && Width < BmpHeader->PixelWidth; Index++) { + Blt->Red = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Red; + Blt->Green = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Green; + Blt->Blue = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Blue; + Blt++; + Width++; + } + + Blt--; + Width--; + break; + + case 4: + // + // Convert 4-bit (16 colors) BMP Palette to 24-bit color + // + Index = (*Image) >> 4; + Blt->Red = BmpColorMap[Index].Red; + Blt->Green = BmpColorMap[Index].Green; + Blt->Blue = BmpColorMap[Index].Blue; + if (Width < (BmpHeader->PixelWidth - 1)) { + Blt++; + Width++; + Index = (*Image) & 0x0f; + Blt->Red = BmpColorMap[Index].Red; + Blt->Green = BmpColorMap[Index].Green; + Blt->Blue = BmpColorMap[Index].Blue; + } + break; + + case 8: + // + // Convert 8-bit (256 colors) BMP Palette to 24-bit color + // + Blt->Red = BmpColorMap[*Image].Red; + Blt->Green = BmpColorMap[*Image].Green; + Blt->Blue = BmpColorMap[*Image].Blue; + break; + + case 24: + // + // It is 24-bit BMP. + // + Blt->Blue = *Image++; + Blt->Green = *Image++; + Blt->Red = *Image; + break; + + default: + // + // Other bit format BMP is not supported. + // + if (IsAllocated) { + FreePool (*GopBlt); + *GopBlt = NULL; + } + return EFI_UNSUPPORTED; + }; + + } + + ImageIndex = (UINTN) (Image - ImageHeader); + if ((ImageIndex % 4) != 0) { + // + // Bmp Image starts each row on a 32-bit boundary! + // + Image = Image + (4 - (ImageIndex % 4)); + } + } + + return EFI_SUCCESS; +} + +/** + Use SystemTable Conout to stop video based Simple Text Out consoles from going + to the video device. Put up LogoFile on every video device that is a console. + + @param[in] LogoFile File name of logo to display on the center of the screen. + + @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo displayed. + @retval EFI_UNSUPPORTED Logo not found + +**/ +EFI_STATUS +EnableQuietBoot ( + IN EFI_GUID *LogoFile + ) +{ + EFI_STATUS Status; + EFI_OEM_BADGING_PROTOCOL *Badging; + UINT32 SizeOfX; + UINT32 SizeOfY; + INTN DestX; + INTN DestY; + UINT8 *ImageData; + UINTN ImageSize; + UINTN BltSize; + UINT32 Instance; + EFI_BADGING_FORMAT Format; + EFI_BADGING_DISPLAY_ATTRIBUTE Attribute; + UINTN CoordinateX; + UINTN CoordinateY; + UINTN Height; + UINTN Width; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt; + EFI_UGA_DRAW_PROTOCOL *UgaDraw; + UINT32 ColorDepth; + UINT32 RefreshRate; + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; + EFI_BOOT_LOGO_PROTOCOL *BootLogo; + UINTN NumberOfLogos; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *LogoBlt; + UINTN LogoDestX; + UINTN LogoDestY; + UINTN LogoHeight; + UINTN LogoWidth; + UINTN NewDestX; + UINTN NewDestY; + UINTN NewHeight; + UINTN NewWidth; + UINT64 BufferSize; + + UgaDraw = NULL; + // + // Try to open GOP first + // + Status = gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiGraphicsOutputProtocolGuid, (VOID **) &GraphicsOutput); + if (EFI_ERROR (Status) && FeaturePcdGet (PcdUgaConsumeSupport)) { + GraphicsOutput = NULL; + // + // Open GOP failed, try to open UGA + // + Status = gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiUgaDrawProtocolGuid, (VOID **) &UgaDraw); + } + if (EFI_ERROR (Status)) { + return EFI_UNSUPPORTED; + } + + // + // Try to open Boot Logo Protocol. + // + BootLogo = NULL; + gBS->LocateProtocol (&gEfiBootLogoProtocolGuid, NULL, (VOID **) &BootLogo); + + // + // Erase Cursor from screen + // + gST->ConOut->EnableCursor (gST->ConOut, FALSE); + + Badging = NULL; + Status = gBS->LocateProtocol (&gEfiOEMBadgingProtocolGuid, NULL, (VOID **) &Badging); + + if (GraphicsOutput != NULL) { + SizeOfX = GraphicsOutput->Mode->Info->HorizontalResolution; + SizeOfY = GraphicsOutput->Mode->Info->VerticalResolution; + + } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) { + Status = UgaDraw->GetMode (UgaDraw, &SizeOfX, &SizeOfY, &ColorDepth, &RefreshRate); + if (EFI_ERROR (Status)) { + return EFI_UNSUPPORTED; + } + } else { + return EFI_UNSUPPORTED; + } + + Blt = NULL; + NumberOfLogos = 0; + LogoDestX = 0; + LogoDestY = 0; + LogoHeight = 0; + LogoWidth = 0; + NewDestX = 0; + NewDestY = 0; + NewHeight = 0; + NewWidth = 0; + Instance = 0; + Height = 0; + Width = 0; + while (1) { + ImageData = NULL; + ImageSize = 0; + + if (Badging != NULL) { + // + // Get image from OEMBadging protocol. + // + Status = Badging->GetImage ( + Badging, + &Instance, + &Format, + &ImageData, + &ImageSize, + &Attribute, + &CoordinateX, + &CoordinateY + ); + if (EFI_ERROR (Status)) { + goto Done; + } + + // + // Currently only support BMP format. + // + if (Format != EfiBadgingFormatBMP) { + if (ImageData != NULL) { + FreePool (ImageData); + } + continue; + } + } else { + // + // Get the specified image from FV. + // + Status = GetSectionFromAnyFv (LogoFile, EFI_SECTION_RAW, 0, (VOID **) &ImageData, &ImageSize); + if (EFI_ERROR (Status)) { + return EFI_UNSUPPORTED; + } + + CoordinateX = 0; + CoordinateY = 0; + if (!FeaturePcdGet(PcdBootlogoOnlyEnable)) { + Attribute = EfiBadgingDisplayAttributeCenter; + } else { + Attribute = EfiBadgingDisplayAttributeCustomized; + } + } + + if (Blt != NULL) { + FreePool (Blt); + } + Blt = NULL; + Status = ConvertBmpToGopBlt ( + ImageData, + ImageSize, + (VOID **) &Blt, + &BltSize, + &Height, + &Width + ); + if (EFI_ERROR (Status)) { + FreePool (ImageData); + + if (Badging == NULL) { + return Status; + } else { + continue; + } + } + + // + // Calculate the display position according to Attribute. + // + switch (Attribute) { + case EfiBadgingDisplayAttributeLeftTop: + DestX = CoordinateX; + DestY = CoordinateY; + break; + + case EfiBadgingDisplayAttributeCenterTop: + DestX = (SizeOfX - Width) / 2; + DestY = CoordinateY; + break; + + case EfiBadgingDisplayAttributeRightTop: + DestX = (SizeOfX - Width - CoordinateX); + DestY = CoordinateY;; + break; + + case EfiBadgingDisplayAttributeCenterRight: + DestX = (SizeOfX - Width - CoordinateX); + DestY = (SizeOfY - Height) / 2; + break; + + case EfiBadgingDisplayAttributeRightBottom: + DestX = (SizeOfX - Width - CoordinateX); + DestY = (SizeOfY - Height - CoordinateY); + break; + + case EfiBadgingDisplayAttributeCenterBottom: + DestX = (SizeOfX - Width) / 2; + DestY = (SizeOfY - Height - CoordinateY); + break; + + case EfiBadgingDisplayAttributeLeftBottom: + DestX = CoordinateX; + DestY = (SizeOfY - Height - CoordinateY); + break; + + case EfiBadgingDisplayAttributeCenterLeft: + DestX = CoordinateX; + DestY = (SizeOfY - Height) / 2; + break; + + case EfiBadgingDisplayAttributeCenter: + DestX = (SizeOfX - Width) / 2; + DestY = (SizeOfY - Height) / 2; + break; + + case EfiBadgingDisplayAttributeCustomized: + DestX = (SizeOfX - Width) / 2; + DestY = ((SizeOfY * 382) / 1000) - Height / 2; + break; + + default: + DestX = CoordinateX; + DestY = CoordinateY; + break; + } + + if ((DestX >= 0) && (DestY >= 0)) { + if (GraphicsOutput != NULL) { + Status = GraphicsOutput->Blt ( + GraphicsOutput, + Blt, + EfiBltBufferToVideo, + 0, + 0, + (UINTN) DestX, + (UINTN) DestY, + Width, + Height, + Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + ); + } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) { + Status = UgaDraw->Blt ( + UgaDraw, + (EFI_UGA_PIXEL *) Blt, + EfiUgaBltBufferToVideo, + 0, + 0, + (UINTN) DestX, + (UINTN) DestY, + Width, + Height, + Width * sizeof (EFI_UGA_PIXEL) + ); + } else { + Status = EFI_UNSUPPORTED; + } + + // + // Report displayed Logo information. + // + if (!EFI_ERROR (Status)) { + NumberOfLogos++; + + if (LogoWidth == 0) { + // + // The first Logo. + // + LogoDestX = (UINTN) DestX; + LogoDestY = (UINTN) DestY; + LogoWidth = Width; + LogoHeight = Height; + } else { + // + // Merge new logo with old one. + // + NewDestX = MIN ((UINTN) DestX, LogoDestX); + NewDestY = MIN ((UINTN) DestY, LogoDestY); + NewWidth = MAX ((UINTN) DestX + Width, LogoDestX + LogoWidth) - NewDestX; + NewHeight = MAX ((UINTN) DestY + Height, LogoDestY + LogoHeight) - NewDestY; + + LogoDestX = NewDestX; + LogoDestY = NewDestY; + LogoWidth = NewWidth; + LogoHeight = NewHeight; + } + } + } + + FreePool (ImageData); + + if (Badging == NULL) { + break; + } + } + +Done: + if (BootLogo == NULL || NumberOfLogos == 0) { + // + // No logo displayed. + // + if (Blt != NULL) { + FreePool (Blt); + } + + return Status; + } + + // + // Advertise displayed Logo information. + // + if (NumberOfLogos == 1) { + // + // Only one logo displayed, use its Blt buffer directly for BootLogo protocol. + // + LogoBlt = Blt; + Status = EFI_SUCCESS; + } else { + // + // More than one Logo displayed, get merged BltBuffer using VideoToBuffer operation. + // + if (Blt != NULL) { + FreePool (Blt); + } + + // + // Ensure the LogoHeight * LogoWidth doesn't overflow + // + if (LogoHeight > DivU64x64Remainder ((UINTN) ~0, LogoWidth, NULL)) { + return EFI_UNSUPPORTED; + } + BufferSize = MultU64x64 (LogoWidth, LogoHeight); + + // + // Ensure the BufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) doesn't overflow + // + if (BufferSize > DivU64x32 ((UINTN) ~0, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) { + return EFI_UNSUPPORTED; + } + + LogoBlt = AllocateZeroPool ((UINTN)BufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + if (LogoBlt == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + if (GraphicsOutput != NULL) { + Status = GraphicsOutput->Blt ( + GraphicsOutput, + LogoBlt, + EfiBltVideoToBltBuffer, + LogoDestX, + LogoDestY, + 0, + 0, + LogoWidth, + LogoHeight, + LogoWidth * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + ); + } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) { + Status = UgaDraw->Blt ( + UgaDraw, + (EFI_UGA_PIXEL *) LogoBlt, + EfiUgaVideoToBltBuffer, + LogoDestX, + LogoDestY, + 0, + 0, + LogoWidth, + LogoHeight, + LogoWidth * sizeof (EFI_UGA_PIXEL) + ); + } else { + Status = EFI_UNSUPPORTED; + } + } + + if (!EFI_ERROR (Status)) { + BootLogo->SetBootLogo (BootLogo, LogoBlt, LogoDestX, LogoDestY, LogoWidth, LogoHeight); + } + FreePool (LogoBlt); + + return Status; +} + +/** + Use SystemTable Conout to turn on video based Simple Text Out consoles. The + Simple Text Out screens will now be synced up with all non video output devices + + @retval EFI_SUCCESS UGA devices are back in text mode and synced up. + +**/ +EFI_STATUS +DisableQuietBoot ( + VOID + ) +{ + + // + // Enable Cursor on Screen + // + gST->ConOut->EnableCursor (gST->ConOut, TRUE); + return EFI_SUCCESS; +} + From patchwork Thu Jan 18 15:01:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 124976 Delivered-To: patch@linaro.org Received: by 10.80.140.226 with SMTP id r31csp3635927edr; Thu, 18 Jan 2018 07:02:09 -0800 (PST) X-Google-Smtp-Source: ACJfBotAUqM498VMsk+uyMaoeh5r9OdE8UN9PgZov/BKOsqi8HXcl7iiW3VT9EbJvsw9SkMacNtY X-Received: by 10.99.151.26 with SMTP id n26mr35707198pge.87.1516287729002; Thu, 18 Jan 2018 07:02:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516287728; cv=none; d=google.com; s=arc-20160816; b=TZyZJPnkzgyQZXQJZaA8ueqR2XCFXYBOypN3LCh0Gw+EFMmxEgVwBzUB+FRijmsVMb gGP9EFy+rDe4iUDT1vgY2MqG/Q0vInLRZnkwF5ZAKjFYWggg24syuZ5n3uwjOzfX3MRb LDPHnECgCYq6wuTYTr6SGnkXHQqosLr445ANOlGMFtU+Y6qS+I10Yhy5HolO2LHQQBJC qToExkw3I4DwTHVMCz/odUrLM6RmLxJ7qLcvUscoNfQVrAKKwK6toJoX5kibKuX9Mx3c g6rbqsGaR+lX1nzK1t+gmjjerL1iW6kNQVjdMbGKJq9k7VafSzZRsbf2QfSkIzjIPt70 TDsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=qry6eRu6JLIKPWPtfB3DKA1qAJMUi+MOZzBhGmk+580=; b=jLFiGzQvDHP5uSBnLc+nsGmplVTCnEZ9ZbNv4YfYFzOSt89SBHElD2oTVxdJt0l7FI WY8po08DitVrWNdCynXVwhnAZ0lBI3lDVI9Yxe3N6hfHKZM34QP/kRM389Yy8aBFRGjC iC44TGlxorW5v7oK5357mfz4K/LrgvM8HgNQqdBq6v8P9tfmqvp2RbGgg5EXnVvEuxo3 Re2ifk9ye3s01KZqAz26RKzZZrWOgHe3tsitGRIuk3q/zWqUK3YNHQpsSsJOUs+hvJcP kWv32J6rY9UvC2QudzJY4BhKT7hL+LD6IeW4kPORD6EPHmzEss3ITytxbJh62I/eWeu6 lJ4A== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HPUrAh+y; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id y24si7092472pfa.194.2018.01.18.07.02.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Jan 2018 07:02:08 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HPUrAh+y; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 7B03A2232BDF6; Thu, 18 Jan 2018 06:56:43 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::243; helo=mail-pf0-x243.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x243.google.com (mail-pf0-x243.google.com [IPv6:2607:f8b0:400e:c00::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id E6972222DDC12 for ; Thu, 18 Jan 2018 06:56:41 -0800 (PST) Received: by mail-pf0-x243.google.com with SMTP id e11so14775990pff.6 for ; Thu, 18 Jan 2018 07:02:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IoY0ZZkRu4820bkcU1P2qLmZUDU0cvKMtpUHmW9UiUw=; b=HPUrAh+yUGA66or7iuSinMQY5dJcYAIHD1KKVDxvbzsT1yi8eW4L0828tPIMcSJBYq NRDVkUZdwMbxciUWbPpSMgBXsVAu2EjeEt9d7m5MJPc2YbYKhUnzvierq8TSjebPz8T6 xjFT5SAXYKuZfi0wlu+UAa99/L6N15z2UUHjg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IoY0ZZkRu4820bkcU1P2qLmZUDU0cvKMtpUHmW9UiUw=; b=mW6WW9dEg0qP4LuGl+mj8yGmOxTIMrQ1LTDa+AkCbeko9PNh/3q0e4f0kHQpb8XGBO xvk26tMccF6XT4gm19ANC7dC81RDXMUngMWua8NWFcy5YMAZqA4n/WPKGXq+Gof7T9Qg djMiKV3RImLqjN+XyZXl8Ijh+8sPYlc5s/w8FWZO545qfEfVrf26nj3BmprLF8solUBT avUbgeaUMZddZeukz9SwowIC3ocpypCHA90Y5Ppd70fnfxabCH+ioC1Vw6Porz840F/N Hnn9zyHKMhFwiHkGdEKTs/P8mgfnHW/BrJY+w04HvSjzRkYKmPhXj4gyu6Q9tu9ABW8R vITw== X-Gm-Message-State: AKwxytcXTk+W9u8Fb0FKDNhD0DSRvGdli6hu/TiENImhU2Fq+YFv/S9F FXSk1xVjod+rXMaB0pLDnZXc6Q== X-Received: by 10.98.67.138 with SMTP id l10mr9198545pfi.72.1516287722505; Thu, 18 Jan 2018 07:02:02 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j14sm13621815pfh.94.2018.01.18.07.01.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Jan 2018 07:02:01 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:32 +0800 Message-Id: <1516287703-35516-4-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 03/14] Hisilicon D03/D05: Optimize the feature of BMC set boot option X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Modify the feature of BMC set boot option as switching generic BDS. Move main functions to BmcConfigBootLib. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D03/D03.dsc | 1 + Platform/Hisilicon/D05/D05.dsc | 1 + Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h | 31 ++ Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c | 454 ++++++++++++++++++++ Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf | 51 +++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 7 + Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 1 + Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c | 434 +------------------ Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 4 +- 9 files changed, 548 insertions(+), 436 deletions(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index f7efff5..b2eae7d 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -70,6 +70,7 @@ GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf !if $(GENERIC_BDS) == TRUE + BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 57370dc..b89cea3 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -85,6 +85,7 @@ GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf !if $(GENERIC_BDS) == TRUE + BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf diff --git a/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h b/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h new file mode 100644 index 0000000..d937234 --- /dev/null +++ b/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h @@ -0,0 +1,31 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef _BMC_CONFIG_BOOT_LIB_H_ +#define _BMC_CONFIG_BOOT_LIB_H_ + +VOID +EFIAPI +RestoreBootOrder ( + VOID + ); + +VOID +EFIAPI +HandleBmcBootType ( + VOID + ); + +#endif diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c new file mode 100644 index 0000000..c446f93 --- /dev/null +++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c @@ -0,0 +1,454 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +GUID gOemBootVariableGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99, + 0xd4, 0xa4, 0x2f, 0x45, 0x06, 0xf8} }; + +STATIC +UINT16 +GetBBSTypeFromFileSysPath ( + IN CHAR16 *UsbPathTxt, + IN CHAR16 *FileSysPathTxt, + IN EFI_DEVICE_PATH_PROTOCOL *FileSysPath + ) +{ + EFI_DEVICE_PATH_PROTOCOL *Node; + + if (StrnCmp (UsbPathTxt, FileSysPathTxt, StrLen (UsbPathTxt)) == 0) { + Node = FileSysPath; + while (!IsDevicePathEnd (Node)) { + if ((DevicePathType (Node) == MEDIA_DEVICE_PATH) && + (DevicePathSubType (Node) == MEDIA_CDROM_DP)) { + return BBS_TYPE_CDROM; + } + Node = NextDevicePathNode (Node); + } + } + + return BBS_TYPE_UNKNOWN; +} + +STATIC +UINT16 +GetBBSTypeFromUsbPath ( + IN CONST EFI_DEVICE_PATH_PROTOCOL *UsbPath + ) +{ + EFI_STATUS Status; + EFI_HANDLE *FileSystemHandles; + UINTN NumberFileSystemHandles; + UINTN Index; + EFI_DEVICE_PATH_PROTOCOL *FileSysPath; + EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevPathToText; + CHAR16 *UsbPathTxt; + CHAR16 *FileSysPathTxt; + UINT16 Result; + + Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **) &DevPathToText); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Locate DevicePathToTextPro %r\n", Status)); + return BBS_TYPE_UNKNOWN; + } + + Result = BBS_TYPE_UNKNOWN; + UsbPathTxt = DevPathToText->ConvertDevicePathToText (UsbPath, TRUE, TRUE); + if (UsbPathTxt == NULL) { + return Result; + } + + Status = gBS->LocateHandleBuffer ( + ByProtocol, + &gEfiSimpleFileSystemProtocolGuid, + NULL, + &NumberFileSystemHandles, + &FileSystemHandles + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Locate SimpleFileSystemProtocol error(%r)\n", Status)); + FreePool (UsbPathTxt); + return BBS_TYPE_UNKNOWN; + } + + for (Index = 0; Index < NumberFileSystemHandles; Index++) { + FileSysPath = DevicePathFromHandle (FileSystemHandles[Index]); + FileSysPathTxt = DevPathToText->ConvertDevicePathToText (FileSysPath, TRUE, TRUE); + + if (FileSysPathTxt == NULL) { + continue; + } + + Result = GetBBSTypeFromFileSysPath (UsbPathTxt, FileSysPathTxt, FileSysPath); + FreePool (FileSysPathTxt); + + if (Result != BBS_TYPE_UNKNOWN) { + break; + } + } + + if (NumberFileSystemHandles != 0) { + FreePool (FileSystemHandles); + } + + FreePool (UsbPathTxt); + + return Result; +} + +STATIC +UINT16 +GetBBSTypeFromMessagingDevicePath ( + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath, + IN EFI_DEVICE_PATH_PROTOCOL *Node + ) +{ + VENDOR_DEVICE_PATH *Vendor; + UINT16 Result; + + Result = BBS_TYPE_UNKNOWN; + + switch (DevicePathSubType (Node)) { + case MSG_MAC_ADDR_DP: + Result = BBS_TYPE_EMBEDDED_NETWORK; + break; + + case MSG_USB_DP: + Result = GetBBSTypeFromUsbPath (DevicePath); + if (Result == BBS_TYPE_UNKNOWN) { + Result = BBS_TYPE_USB; + } + break; + + case MSG_SATA_DP: + Result = BBS_TYPE_HARDDRIVE; + break; + + case MSG_VENDOR_DP: + Vendor = (VENDOR_DEVICE_PATH *) (Node); + if ((&Vendor->Guid) != NULL) { + if (CompareGuid (&Vendor->Guid, &((EFI_GUID) DEVICE_PATH_MESSAGING_SAS))) { + Result = BBS_TYPE_HARDDRIVE; + } + } + break; + + default: + Result = BBS_TYPE_UNKNOWN; + break; + } + + return Result; +} + +STATIC +UINT16 +GetBBSTypeByDevicePath ( + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath + ) +{ + EFI_DEVICE_PATH_PROTOCOL *Node; + UINT16 Result; + + Result = BBS_TYPE_UNKNOWN; + if (DevicePath == NULL) { + return Result; + } + + Node = DevicePath; + while (!IsDevicePathEnd (Node)) { + switch (DevicePathType (Node)) { + case MEDIA_DEVICE_PATH: + if (DevicePathSubType (Node) == MEDIA_CDROM_DP) { + Result = BBS_TYPE_CDROM; + } + break; + + case MESSAGING_DEVICE_PATH: + Result = GetBBSTypeFromMessagingDevicePath (DevicePath, Node); + break; + + default: + Result = BBS_TYPE_UNKNOWN; + break; + } + + if (Result != BBS_TYPE_UNKNOWN) { + break; + } + + Node = NextDevicePathNode (Node); + } + + return Result; +} + +STATIC +EFI_STATUS +GetBmcBootOptionsSetting ( + OUT IPMI_GET_BOOT_OPTION *BmcBootOpt + ) +{ + EFI_STATUS Status; + + Status = IpmiCmdGetSysBootOptions (BmcBootOpt); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Get iBMC BootOpts %r!\n", Status)); + return Status; + } + + if (BmcBootOpt->BootFlagsValid != BOOT_OPTION_BOOT_FLAG_VALID) { + return EFI_NOT_FOUND; + } + + if (BmcBootOpt->Persistent) { + BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_VALID; + } else { + BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_INVALID; + } + + Status = IpmiCmdSetSysBootOptions (BmcBootOpt); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Set iBMC BootOpts %r!\n", Status)); + } + + return Status; +} + +VOID +RestoreBootOrder ( + VOID + ) +{ + EFI_STATUS Status; + UINT16 *BootOrder; + UINTN BootOrderSize; + + GetVariable2 (L"BootOrderBackup", &gOemBootVariableGuid, (VOID **) &BootOrder, &BootOrderSize); + if (BootOrder == NULL) { + return ; + } + + Print (L"\nRestore BootOrder(%d).\n", BootOrderSize / sizeof (UINT16)); + + Status = gRT->SetVariable ( + L"BootOrder", + &gEfiGlobalVariableGuid, + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, + BootOrderSize, + BootOrder + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "SetVariable BootOrder %r!\n", Status)); + } + + Status = gRT->SetVariable ( + L"BootOrderBackup", + &gOemBootVariableGuid, + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE, + 0, + NULL + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "SetVariable BootOrderBackup %r!\n", Status)); + } + + FreePool (BootOrder); + + return; +} + + +VOID +RestoreBootOrderOnReadyToBoot ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + // restore BootOrder variable in normal condition. + RestoreBootOrder (); +} + +STATIC +VOID +UpdateBootOrder ( + IN UINT16 *NewOrder, + IN UINT16 *BootOrder, + IN UINTN BootOrderSize + ) +{ + EFI_STATUS Status; + EFI_EVENT Event; + + Status = gRT->SetVariable ( + L"BootOrderBackup", + &gOemBootVariableGuid, + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE, + BootOrderSize, + BootOrder + ); + if (EFI_ERROR (Status)) { + return; + } + + Status = gRT->SetVariable ( + L"BootOrder", + &gEfiGlobalVariableGuid, + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, + BootOrderSize, + NewOrder + ); + if (EFI_ERROR (Status)) { + return; + } + + // Register notify function to restore BootOrder variable on ReadyToBoot Event. + Status = gBS->CreateEventEx ( + EVT_NOTIFY_SIGNAL, + TPL_CALLBACK, + RestoreBootOrderOnReadyToBoot, + NULL, + &gEfiEventReadyToBootGuid, + &Event + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Create ready to boot event %r!\n", Status)); + } + + return; +} + +STATIC +VOID +SetBootOrder ( + IN UINT16 BootType + ) +{ + EFI_STATUS Status; + UINT16 *NewOrder; + UINT16 *RemainBoots; + UINT16 *BootOrder; + UINTN BootOrderSize; + EFI_BOOT_MANAGER_LOAD_OPTION Option; + CHAR16 OptionName[sizeof ("Boot####")]; + UINTN Index; + UINTN SelectCnt; + UINTN RemainCnt; + + GetEfiGlobalVariable2 (L"BootOrder", (VOID **) &BootOrder, &BootOrderSize); + if (BootOrder == NULL) { + return ; + } + + NewOrder = AllocatePool (BootOrderSize); + RemainBoots = AllocatePool (BootOrderSize); + if ((NewOrder == NULL) || (RemainBoots == NULL)) { + DEBUG ((DEBUG_ERROR, "Out of resources.")); + goto Exit; + } + + SelectCnt = 0; + RemainCnt = 0; + + for (Index = 0; Index < BootOrderSize / sizeof (UINT16); Index++) { + UnicodeSPrint (OptionName, sizeof (OptionName), L"Boot%04x", BootOrder[Index]); + Status = EfiBootManagerVariableToLoadOption (OptionName, &Option); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Boot%04x is invalid option!\n", BootOrder[Index])); + continue; + } + + if (GetBBSTypeByDevicePath (Option.FilePath) == BootType) { + NewOrder[SelectCnt++] = BootOrder[Index]; + } else { + RemainBoots[RemainCnt++] = BootOrder[Index]; + } + } + + if (SelectCnt != 0) { + // append RemainBoots to NewOrder + for (Index = 0; Index < RemainCnt; Index++) { + NewOrder[SelectCnt + Index] = RemainBoots[Index]; + } + + if (CompareMem (NewOrder, BootOrder, BootOrderSize) != 0) { + UpdateBootOrder (NewOrder, BootOrder, BootOrderSize); + } + } + +Exit: + FreePool (BootOrder); + if (NewOrder != NULL) { + FreePool (NewOrder); + } + if (RemainBoots != NULL) { + FreePool (RemainBoots); + } + + return ; +} + +VOID +HandleBmcBootType ( + VOID + ) +{ + EFI_STATUS Status; + IPMI_GET_BOOT_OPTION BmcBootOpt; + UINT16 BootType; + + Status = GetBmcBootOptionsSetting (&BmcBootOpt); + if (EFI_ERROR (Status)) { + return; + } + + Print (L"Boot Type from BMC is %x\n", BmcBootOpt.BootDeviceSelector); + + switch (BmcBootOpt.BootDeviceSelector) { + case ForcePxe: + BootType = BBS_TYPE_EMBEDDED_NETWORK; + break; + + case ForcePrimaryRemovableMedia: + BootType = BBS_TYPE_USB; + break; + + case ForceDefaultHardDisk: + BootType = BBS_TYPE_HARDDRIVE; + break; + + case ForceDefaultCD: + BootType = BBS_TYPE_CDROM; + break; + + default: + return; + } + + SetBootOrder (BootType); +} + diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf new file mode 100644 index 0000000..7e407b4 --- /dev/null +++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf @@ -0,0 +1,51 @@ +#/** @file +# +# Copyright (c) 2015, Hisilicon Limited. All rights reserved. +# Copyright (c) 2015, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = BmcConfigBootLib + FILE_GUID = f174d192-7208-46c1-b9d1-65b2db06ad3b + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = BmcConfigBootLib + +[Sources.common] + BmcConfigBootLib.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + DevicePathLib + IpmiCmdLib + PcdLib + PrintLib + UefiBootManagerLib + +[BuildOptions] + +[Pcd] + +[Guids] + gEfiEventReadyToBootGuid + +[Protocols] + gEfiDevicePathToTextProtocolGuid ## CONSUMES + gEfiSimpleFileSystemProtocolGuid ## CONSUMES diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c index 5d8d58e..845519f 100644 --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c @@ -16,6 +16,7 @@ **/ #include +#include #include #include #include @@ -474,6 +475,10 @@ PlatformBootManagerBeforeConsole ( // EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid); + // restore BootOrder variable if previous BMC boot override attempt + // left it in a modified state + RestoreBootOrder (); + UpdateMemory (); // @@ -570,6 +575,8 @@ PlatformBootManagerAfterConsole ( PlatformRegisterFvBootOption ( PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE ); + + HandleBmcBootType (); } /** diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf index ae274f3..7b151a9 100644 --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf @@ -44,6 +44,7 @@ [LibraryClasses] BaseLib BaseMemoryLib + BmcConfigBootLib DebugLib DevicePathLib DxeServicesLib diff --git a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c index dc23e46..20015da 100644 --- a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c +++ b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c @@ -20,25 +20,19 @@ **/ #include +#include #include -#include -#include #include #include #include #include #include -#include #include #include #include -#include #include "IntelBdsPlatform.h" -GUID gOemBootVaraibleGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99, - 0xd4, 0xa4, 0x2f, 0x45, 0x06, 0xf8} }; - //3CEF354A-3B7A-4519-AD70-72A134698311 GUID gEblFileGuid = {0x3CEF354A, 0x3B7A, 0x4519, {0xAD, 0x70, 0x72, 0xA1, 0x34, 0x69, 0x83, 0x11} }; @@ -149,432 +143,6 @@ STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = { } }; -STATIC -UINT16 -GetBBSTypeFromFileSysPath ( - IN CHAR16 *UsbPathTxt, - IN CHAR16 *FileSysPathTxt, - IN EFI_DEVICE_PATH_PROTOCOL *FileSysPath - ) -{ - EFI_DEVICE_PATH_PROTOCOL *Node; - - if (StrnCmp (UsbPathTxt, FileSysPathTxt, StrLen (UsbPathTxt)) == 0) { - Node = FileSysPath; - while (!IsDevicePathEnd (Node)) { - if ((DevicePathType (Node) == MEDIA_DEVICE_PATH) && - (DevicePathSubType (Node) == MEDIA_CDROM_DP)) { - return BBS_TYPE_CDROM; - } - Node = NextDevicePathNode (Node); - } - } - - return BBS_TYPE_UNKNOWN; -} - -STATIC -UINT16 -GetBBSTypeFromUsbPath ( - IN CONST EFI_DEVICE_PATH_PROTOCOL *UsbPath - ) -{ - EFI_STATUS Status; - EFI_HANDLE *FileSystemHandles; - UINTN NumberFileSystemHandles; - UINTN Index; - EFI_DEVICE_PATH_PROTOCOL *FileSysPath; - EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevPathToText; - CHAR16 *UsbPathTxt; - CHAR16 *FileSysPathTxt; - UINT16 Result; - - Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **) &DevPathToText); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Locate DevicePathToTextPro %r\n", Status)); - return BBS_TYPE_UNKNOWN; - } - - Result = BBS_TYPE_UNKNOWN; - UsbPathTxt = DevPathToText->ConvertDevicePathToText (UsbPath, TRUE, TRUE); - if (UsbPathTxt == NULL) { - return Result; - } - - Status = gBS->LocateHandleBuffer ( - ByProtocol, - &gEfiSimpleFileSystemProtocolGuid, - NULL, - &NumberFileSystemHandles, - &FileSystemHandles - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Locate SimpleFileSystemProtocol error(%r)\n", Status)); - FreePool (UsbPathTxt); - return BBS_TYPE_UNKNOWN; - } - - for (Index = 0; Index < NumberFileSystemHandles; Index++) { - FileSysPath = DevicePathFromHandle (FileSystemHandles[Index]); - FileSysPathTxt = DevPathToText->ConvertDevicePathToText (FileSysPath, TRUE, TRUE); - - if (FileSysPathTxt == NULL) { - continue; - } - - Result = GetBBSTypeFromFileSysPath (UsbPathTxt, FileSysPathTxt, FileSysPath); - FreePool (FileSysPathTxt); - - if (Result != BBS_TYPE_UNKNOWN) { - break; - } - } - - if (NumberFileSystemHandles != 0) { - FreePool (FileSystemHandles); - } - - FreePool (UsbPathTxt); - - return Result; -} - -STATIC -UINT16 -GetBBSTypeFromMessagingDevicePath ( - IN EFI_DEVICE_PATH_PROTOCOL *DevicePath, - IN EFI_DEVICE_PATH_PROTOCOL *Node - ) -{ - VENDOR_DEVICE_PATH *Vendor; - UINT16 Result; - - Result = BBS_TYPE_UNKNOWN; - - switch (DevicePathSubType (Node)) { - case MSG_MAC_ADDR_DP: - Result = BBS_TYPE_EMBEDDED_NETWORK; - break; - - case MSG_USB_DP: - Result = GetBBSTypeFromUsbPath (DevicePath); - if (Result == BBS_TYPE_UNKNOWN) { - Result = BBS_TYPE_USB; - } - break; - - case MSG_SATA_DP: - Result = BBS_TYPE_HARDDRIVE; - break; - - case MSG_VENDOR_DP: - Vendor = (VENDOR_DEVICE_PATH *) (Node); - if ((&Vendor->Guid) != NULL) { - if (CompareGuid (&Vendor->Guid, &((EFI_GUID) DEVICE_PATH_MESSAGING_SAS))) { - Result = BBS_TYPE_HARDDRIVE; - } - } - break; - - default: - Result = BBS_TYPE_UNKNOWN; - break; - } - - return Result; -} - -STATIC -UINT16 -GetBBSTypeByDevicePath ( - IN EFI_DEVICE_PATH_PROTOCOL *DevicePath - ) -{ - EFI_DEVICE_PATH_PROTOCOL *Node; - UINT16 Result; - - Result = BBS_TYPE_UNKNOWN; - if (DevicePath == NULL) { - return Result; - } - - Node = DevicePath; - while (!IsDevicePathEnd (Node)) { - switch (DevicePathType (Node)) { - case MEDIA_DEVICE_PATH: - if (DevicePathSubType (Node) == MEDIA_CDROM_DP) { - Result = BBS_TYPE_CDROM; - } - break; - - case MESSAGING_DEVICE_PATH: - Result = GetBBSTypeFromMessagingDevicePath (DevicePath, Node); - break; - - default: - Result = BBS_TYPE_UNKNOWN; - break; - } - - if (Result != BBS_TYPE_UNKNOWN) { - break; - } - - Node = NextDevicePathNode (Node); - } - - return Result; -} - -STATIC -EFI_STATUS -GetBmcBootOptionsSetting ( - OUT IPMI_GET_BOOT_OPTION *BmcBootOpt - ) -{ - EFI_STATUS Status; - - Status = IpmiCmdGetSysBootOptions (BmcBootOpt); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Get iBMC BootOpts %r!\n", Status)); - return Status; - } - - if (BmcBootOpt->BootFlagsValid != BOOT_OPTION_BOOT_FLAG_VALID) { - return EFI_NOT_FOUND; - } - - if (BmcBootOpt->Persistent) { - BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_VALID; - } else { - BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_INVALID; - } - - Status = IpmiCmdSetSysBootOptions (BmcBootOpt); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Set iBMC BootOpts %r!\n", Status)); - } - - return Status; -} - -STATIC -VOID -RestoreBootOrder ( - VOID - ) -{ - EFI_STATUS Status; - UINT16 *BootOrder; - UINTN BootOrderSize; - - GetVariable2 (L"BootOrderBackup", &gOemBootVaraibleGuid, (VOID **) &BootOrder, &BootOrderSize); - if (BootOrder == NULL) { - return ; - } - - Print (L"Restore BootOrder(%d).\n", BootOrderSize / sizeof (UINT16)); - - Status = gRT->SetVariable ( - L"BootOrder", - &gEfiGlobalVariableGuid, - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, - BootOrderSize, - BootOrder - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "SetVariable BootOrder %r!\n", Status)); - } - - Status = gRT->SetVariable ( - L"BootOrderBackup", - &gOemBootVaraibleGuid, - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE, - 0, - NULL - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "SetVariable BootOrderBackup %r!\n", Status)); - } - - FreePool (BootOrder); - - return; -} - - -VOID -RestoreBootOrderOnReadyToBoot ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - // restore BootOrder variable in normal condition. - RestoreBootOrder (); -} - -STATIC -VOID -UpdateBootOrder ( - IN UINT16 *NewOrder, - IN UINT16 *BootOrder, - IN UINTN BootOrderSize - ) -{ - EFI_STATUS Status; - EFI_EVENT Event; - - Status = gRT->SetVariable ( - L"BootOrderBackup", - &gOemBootVaraibleGuid, - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE, - BootOrderSize, - BootOrder - ); - if (EFI_ERROR (Status)) { - return; - } - - Status = gRT->SetVariable ( - L"BootOrder", - &gEfiGlobalVariableGuid, - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE, - BootOrderSize, - NewOrder - ); - if (EFI_ERROR (Status)) { - return; - } - - // Register notify function to restore BootOrder variable on ReadyToBoot Event. - Status = gBS->CreateEventEx ( - EVT_NOTIFY_SIGNAL, - TPL_CALLBACK, - RestoreBootOrderOnReadyToBoot, - NULL, - &gEfiEventReadyToBootGuid, - &Event - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_ERROR, "Create ready to boot event %r!\n", Status)); - } - - return; -} - -STATIC -VOID -SetBootOrder ( - IN UINT16 BootType - ) -{ - UINT16 *NewOrder; - UINT16 *RemainBoots; - UINT16 *BootOrder; - UINTN BootOrderSize; - CHAR16 OptionName[sizeof ("Boot####")]; - UINTN Index; - LIST_ENTRY BootOptionList; - BDS_COMMON_OPTION *Option; - UINTN SelectCnt; - UINTN RemainCnt; - - InitializeListHead (&BootOptionList); - - GetEfiGlobalVariable2 (L"BootOrder", (VOID **) &BootOrder, &BootOrderSize); - if (BootOrder == NULL) { - return ; - } - - NewOrder = AllocatePool (BootOrderSize); - RemainBoots = AllocatePool (BootOrderSize); - if ((NewOrder == NULL) || (RemainBoots == NULL)) { - DEBUG ((DEBUG_ERROR, "Out of resources.")); - goto Exit; - } - - SelectCnt = 0; - RemainCnt = 0; - - for (Index = 0; Index < BootOrderSize / sizeof (UINT16); Index++) { - UnicodeSPrint (OptionName, sizeof (OptionName), L"Boot%04x", BootOrder[Index]); - Option = BdsLibVariableToOption (&BootOptionList, OptionName); - if (Option == NULL) { - DEBUG ((DEBUG_ERROR, "Boot%04x is invalid option!\n", BootOrder[Index])); - continue; - } - - if (GetBBSTypeByDevicePath (Option->DevicePath) == BootType) { - NewOrder[SelectCnt++] = BootOrder[Index]; - } else { - RemainBoots[RemainCnt++] = BootOrder[Index]; - } - } - - if (SelectCnt != 0) { - // append RemainBoots to NewOrder - for (Index = 0; Index < RemainCnt; Index++) { - NewOrder[SelectCnt + Index] = RemainBoots[Index]; - } - - if (CompareMem (NewOrder, BootOrder, BootOrderSize) != 0) { - UpdateBootOrder (NewOrder, BootOrder, BootOrderSize); - } - } - -Exit: - FreePool (BootOrder); - if (NewOrder != NULL) { - FreePool (NewOrder); - } - if (RemainBoots != NULL) { - FreePool (RemainBoots); - } - - return ; -} - -STATIC -VOID -HandleBmcBootType ( - VOID - ) -{ - EFI_STATUS Status; - IPMI_GET_BOOT_OPTION BmcBootOpt; - UINT16 BootType; - - Status = GetBmcBootOptionsSetting (&BmcBootOpt); - if (EFI_ERROR (Status)) { - return; - } - - Print (L"Boot Type from BMC is %x\n", BmcBootOpt.BootDeviceSelector); - - switch (BmcBootOpt.BootDeviceSelector) { - case ForcePxe: - BootType = BBS_TYPE_EMBEDDED_NETWORK; - break; - - case ForcePrimaryRemovableMedia: - BootType = BBS_TYPE_USB; - break; - - case ForceDefaultHardDisk: - BootType = BBS_TYPE_HARDDRIVE; - break; - - case ForceDefaultCD: - BootType = BBS_TYPE_CDROM; - break; - - default: - return; - } - - SetBootOrder (BootType); -} - // // BDS Platform Functions // diff --git a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf index 0feec06..793c7dc 100644 --- a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf +++ b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf @@ -47,10 +47,10 @@ [LibraryClasses] BaseLib BaseMemoryLib + BmcConfigBootLib DebugLib DevicePathLib GenericBdsLib - IpmiCmdLib MemoryAllocationLib PcdLib PrintLib @@ -70,14 +70,12 @@ [Guids] gEfiEndOfDxeEventGroupGuid - gEfiEventReadyToBootGuid gEfiFileInfoGuid gEfiFileSystemInfoGuid gEfiFileSystemVolumeLabelInfoIdGuid [Protocols] gEfiDevicePathProtocolGuid - gEfiDevicePathToTextProtocolGuid gEfiGraphicsOutputProtocolGuid gEfiLoadedImageProtocolGuid gEfiPciRootBridgeIoProtocolGuid From patchwork Thu Jan 18 15:01:33 2018 Content-Type: text/plain; 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All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Head] +NumOfUpdate = 3 +NumOfRecovery = 0 +Update0 = SysFvMain +Update1 = SysCustom +Update2 = SysNvRam + +[SysFvMain] +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam +AddressType = 0 # 0 - relative address, 1 - absolute address. +BaseAddress = 0x00000000 # Base address offset on flash +Length = 0x002D0000 # Length +ImageOffset = 0x00000000 # Image offset of this SystemFirmware image +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid + +[SysCustom] +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam +AddressType = 0 # 0 - relative address, 1 - absolute address. +BaseAddress = 0x002F0000 # Base address offset on flash +Length = 0x00010000 # Length +ImageOffset = 0x002F0000 # Image offset of this SystemFirmware image +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid + +[SysNvRam] +FirmwareType = 1 # 0 - SystemFirmware, 1 - NvRam +AddressType = 0 # 0 - relative address, 1 - absolute address. +BaseAddress = 0x002D0000 # Base address offset on flash +Length = 0x00020000 # Length +ImageOffset = 0x002D0000 # Image offset of this SystemFirmware image +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index b2eae7d..69bc7b4 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -66,7 +66,6 @@ OemAddressMapLib|Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2PHi1610.inf PlatformSysCtrlLib|Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf !if $(GENERIC_BDS) == TRUE @@ -117,6 +116,11 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE +[PcdsDynamicExDefault.common.DEFAULT] + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100 + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89} + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 0x7b, 0x55} + [PcdsFixedAtBuild.common] gArmPlatformTokenSpaceGuid.PcdCoreCount|8 @@ -310,6 +314,8 @@ Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf + Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf @@ -410,6 +416,9 @@ Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf + # # FAT filesystem + GPT/MBR partitioning # @@ -483,6 +492,12 @@ !else IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf !endif + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf { + + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf + } + + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf # # UEFI application (Shell Embedded Boot Loader) diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index 0d704b5..ffddd2d 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -275,6 +275,8 @@ READ_LOCK_STATUS = TRUE INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf # # Build Shell from latest source code instead of prebuilt binary # @@ -336,12 +338,80 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf + INF RuleOverride = FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { SECTION FV_IMAGE = FVMAIN } } +[FV.CapsuleDispatchFv] +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf + +[FV.SystemFirmwareUpdateCargo] +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid + FD = D03 + } + + FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid + FV = CapsuleDispatchFv + } + + FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid + Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini + } + +[FmpPayload.FmpPayloadSystemFirmwarePkcs7] +IMAGE_HEADER_INIT_VERSION = 0x02 +IMAGE_TYPE_ID = d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSystemFmpCapsuleImageTypeIdGuid +IMAGE_INDEX = 0x1 +HARDWARE_INSTANCE = 0x0 +MONOTONIC_COUNT = 0x1 +CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7 + + FV = SystemFirmwareUpdateCargo + +[Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7] +CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid +CAPSULE_HEADER_SIZE = 0x20 +CAPSULE_HEADER_INIT_VERSION = 0x1 + + FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7 !include Silicon/Hisilicon/Hisilicon.fdf.inc diff --git a/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini b/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini new file mode 100644 index 0000000..fc834d9 --- /dev/null +++ b/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini @@ -0,0 +1,45 @@ +# +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Head] +NumOfUpdate = 3 +NumOfRecovery = 0 +Update0 = SysFvMain +Update1 = SysCustom +Update2 = SysNvRam + +[SysFvMain] +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam +AddressType = 0 # 0 - relative address, 1 - absolute address. +BaseAddress = 0x00000000 # Base address offset on flash +Length = 0x002D0000 # Length +ImageOffset = 0x00000000 # Image offset of this SystemFirmware image +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid + +[SysCustom] +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam +AddressType = 0 # 0 - relative address, 1 - absolute address. +BaseAddress = 0x002F0000 # Base address offset on flash +Length = 0x00010000 # Length +ImageOffset = 0x002F0000 # Image offset of this SystemFirmware image +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid + +[SysNvRam] +FirmwareType = 1 # 0 - SystemFirmware, 1 - NvRam +AddressType = 0 # 0 - relative address, 1 - absolute address. +BaseAddress = 0x002D0000 # Base address offset on flash +Length = 0x00020000 # Length +ImageOffset = 0x002D0000 # Image offset of this SystemFirmware image +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index b89cea3..b99cda5 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -81,7 +81,6 @@ OemAddressMapLib|Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.inf PlatformSysCtrlLib|Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.inf - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf !if $(GENERIC_BDS) == TRUE @@ -130,6 +129,11 @@ gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE +[PcdsDynamicExDefault.common.DEFAULT] + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100 + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89} + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 0x7b, 0x55} + [PcdsFixedAtBuild.common] gArmPlatformTokenSpaceGuid.PcdCoreCount|8 @@ -448,6 +452,8 @@ Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf + Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf @@ -564,6 +570,9 @@ Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf + # # FAT filesystem + GPT/MBR partitioning # @@ -635,6 +644,14 @@ !else IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf !endif + + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf { + + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf + } + + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf + # # UEFI application (Shell Embedded Boot Loader) # diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index d209210..9a61c52 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -297,6 +297,8 @@ READ_LOCK_STATUS = TRUE INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf # # Build Shell from latest source code instead of prebuilt binary # @@ -361,12 +363,80 @@ READ_LOCK_STATUS = TRUE INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf + INF RuleOverride = FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { SECTION FV_IMAGE = FVMAIN } } +[FV.CapsuleDispatchFv] +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf + +[FV.SystemFirmwareUpdateCargo] +FvAlignment = 16 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid + FD = D05 + } + + FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid + FV = CapsuleDispatchFv + } + + FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid + Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini + } + +[FmpPayload.FmpPayloadSystemFirmwarePkcs7] +IMAGE_HEADER_INIT_VERSION = 0x02 +IMAGE_TYPE_ID = d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSystemFmpCapsuleImageTypeIdGuid +IMAGE_INDEX = 0x1 +HARDWARE_INSTANCE = 0x0 +MONOTONIC_COUNT = 0x1 +CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7 + + FV = SystemFirmwareUpdateCargo + +[Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7] +CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid +CAPSULE_HEADER_SIZE = 0x20 +CAPSULE_HEADER_INIT_VERSION = 0x1 + + FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7 !include Silicon/Hisilicon/Hisilicon.fdf.inc diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc new file mode 100644 index 0000000..465535e --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc @@ -0,0 +1,81 @@ +/** @file + System Firmware descriptor. + + Copyright (c) 2018, Hisilicon Limited. All rights reserved. + Copyright (c) 2018, Linaro Limited. All rights reserved. + Copyright (c) 2016, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include + +#define PACKAGE_VERSION 0xFFFFFFFF +#define PACKAGE_VERSION_STRING L"Unknown" + +#define CURRENT_FIRMWARE_VERSION 0x00000002 +#define CURRENT_FIRMWARE_VERSION_STRING L"0x00000002" +#define LOWEST_SUPPORTED_FIRMWARE_VERSION 0x00000001 + +#define IMAGE_ID SIGNATURE_64('H','W','A', 'R', 'M', '_', 'F', 'd') +#define IMAGE_ID_STRING L"ARMPlatformFd" + +// PcdSystemFmpCapsuleImageTypeIdGuid +#define IMAGE_TYPE_ID_GUID { 0xd34b3d29, 0x0085, 0x4ab3, { 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89 } } + +typedef struct { + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR Descriptor; + // real string data + CHAR16 ImageIdNameStr[sizeof(IMAGE_ID_STRING) / sizeof(CHAR16)]; + CHAR16 VersionNameStr[sizeof(CURRENT_FIRMWARE_VERSION_STRING) / sizeof(CHAR16)]; + CHAR16 PackageVersionNameStr[sizeof(PACKAGE_VERSION_STRING) / sizeof(CHAR16)]; +} IMAGE_DESCRIPTOR; + +IMAGE_DESCRIPTOR mImageDescriptor = +{ + { + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR_SIGNATURE, + sizeof (EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR), + sizeof (IMAGE_DESCRIPTOR), + PACKAGE_VERSION, // PackageVersion + OFFSET_OF (IMAGE_DESCRIPTOR, PackageVersionNameStr), // PackageVersionName + 1, // ImageIndex; + {0x0}, // Reserved + IMAGE_TYPE_ID_GUID, // ImageTypeId; + IMAGE_ID, // ImageId; + OFFSET_OF (IMAGE_DESCRIPTOR, ImageIdNameStr), // ImageIdName; + CURRENT_FIRMWARE_VERSION, // Version; + OFFSET_OF (IMAGE_DESCRIPTOR, VersionNameStr), // VersionName; + {0x0}, // Reserved2 + FixedPcdGet32 (PcdFdSize), // Size; + IMAGE_ATTRIBUTE_IMAGE_UPDATABLE | + IMAGE_ATTRIBUTE_RESET_REQUIRED | + IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED | + IMAGE_ATTRIBUTE_IN_USE, // AttributesSupported; + IMAGE_ATTRIBUTE_IMAGE_UPDATABLE | + IMAGE_ATTRIBUTE_RESET_REQUIRED | + IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED | + IMAGE_ATTRIBUTE_IN_USE, // AttributesSetting; + 0x0, // Compatibilities; + LOWEST_SUPPORTED_FIRMWARE_VERSION, // LowestSupportedImageVersion; + 0x00000000, // LastAttemptVersion; + 0, // LastAttemptStatus; + {0x0}, // Reserved3 + 0, // HardwareInstance; + }, + // real string data + {IMAGE_ID_STRING}, + {CURRENT_FIRMWARE_VERSION_STRING}, + {PACKAGE_VERSION_STRING}, +}; + +VOID* CONST ReferenceAcpiTable = &mImageDescriptor; diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf new file mode 100644 index 0000000..c38a809 --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf @@ -0,0 +1,50 @@ +## @file +# System Firmware descriptor. +# +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = SystemFirmwareDescriptor + FILE_GUID = 90B2B846-CA6D-4D6E-A8D3-C140A8E110AC + MODULE_TYPE = PEIM + VERSION_STRING = 1.0 + ENTRY_POINT = SystemFirmwareDescriptorPeimEntry + +[Sources] + SystemFirmwareDescriptorPei.c + SystemFirmwareDescriptor.aslc + +[Packages] + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + SignedCapsulePkg/SignedCapsulePkg.dec + +[LibraryClasses] + DebugLib + PcdLib + PeimEntryPoint + PeiServicesLib + +[FixedPcd] + gArmTokenSpaceGuid.PcdFdSize + +[Pcd] + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor + +[Depex] + TRUE diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c new file mode 100644 index 0000000..27c0a71 --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c @@ -0,0 +1,70 @@ +/** @file + System Firmware descriptor producer. + + Copyright (c) 2018, Hisilicon Limited. All rights reserved. + Copyright (c) 2018, Linaro Limited. All rights reserved. + Copyright (c) 2016, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include +#include +#include + +/** + Entrypoint for SystemFirmwareDescriptor PEIM. + + @param[in] FileHandle Handle of the file being invoked. + @param[in] PeiServices Describes the list of possible PEI Services. + + @retval EFI_SUCCESS PPI successfully installed. +**/ +EFI_STATUS +EFIAPI +SystemFirmwareDescriptorPeimEntry ( + IN EFI_PEI_FILE_HANDLE FileHandle, + IN CONST EFI_PEI_SERVICES **PeiServices + ) +{ + EFI_STATUS Status; + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR *Descriptor; + UINTN Size; + UINTN Index; + UINT32 AuthenticationStatus; + + // + // Search RAW section. + // + + Index = 0; + while (TRUE) { + Status = PeiServicesFfsFindSectionData3 (EFI_SECTION_RAW, Index, FileHandle, (VOID **)&Descriptor, &AuthenticationStatus); + if (EFI_ERROR (Status)) { + // Should not happen, must something wrong in FDF. + DEBUG ((DEBUG_ERROR, "Not found SystemFirmwareDescriptor in fdf !\n")); + return EFI_NOT_FOUND; + } + if (Descriptor->Signature == EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR_SIGNATURE) { + break; + } + Index++; + } + + DEBUG ((DEBUG_INFO, "EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR size - 0x%x\n", Descriptor->Length)); + + Size = Descriptor->Length; + PcdSetPtrS (PcdEdkiiSystemFirmwareImageDescriptor, &Size, Descriptor); + + return EFI_SUCCESS; +} diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc index 308064b..dfa11d1 100644 --- a/Silicon/Hisilicon/Hisilicon.dsc.inc +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc @@ -104,6 +104,15 @@ ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf + EdkiiSystemCapsuleLib|SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleLib.inf + IniParsingLib|SignedCapsulePkg/Library/IniParsingLib/IniParsingLib.inf + PlatformFlashAccessLib|Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf + # # It is not possible to prevent the ARM compiler for generic intrinsic functions. # This library provides the instrinsic functions generate by a given compiler. @@ -198,7 +207,7 @@ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf SerialPortLib|Silicon/Hisilicon/Library/Dw8250SerialPortRuntimeLib/Dw8250SerialPortRuntimeLib.inf DebugLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf diff --git a/Silicon/Hisilicon/Hisilicon.fdf.inc b/Silicon/Hisilicon/Hisilicon.fdf.inc index ee87cd1..986dd75 100644 --- a/Silicon/Hisilicon/Hisilicon.fdf.inc +++ b/Silicon/Hisilicon/Hisilicon.fdf.inc @@ -76,6 +76,15 @@ } } +[Rule.Common.PEIM.FMP_IMAGE_DESC] + FILE PEIM = $(NAMED_GUID) { + RAW BIN |.acpi + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex + PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } + [Rule.Common.DXE_CORE] FILE DXE_CORE = $(NAMED_GUID) { PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c new file mode 100644 index 0000000..db5725d --- /dev/null +++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c @@ -0,0 +1,106 @@ +/** @file + Platform Flash Access library. + + Copyright (c) 2018, Hisilicon Limited. All rights reserved. + Copyright (c) 2018, Linaro Limited. All rights reserved. + Copyright (c) 2016, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include + +STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress; +STATIC EFI_PHYSICAL_ADDRESS mSFCMEM0BaseAddress; + +HISI_SPI_FLASH_PROTOCOL *mSpiProtocol; + +/** + Perform flash write opreation. + + @param[in] FirmwareType The type of firmware. + @param[in] FlashAddress The address of flash device to be accessed. + @param[in] FlashAddressType The type of flash device address. + @param[in] Buffer The pointer to the data buffer. + @param[in] Length The length of data buffer in bytes. + + @retval EFI_SUCCESS The operation returns successfully. + @retval EFI_WRITE_PROTECTED The flash device is read only. + @retval EFI_UNSUPPORTED The flash device access is unsupported. + @retval EFI_INVALID_PARAMETER The input parameter is not valid. +**/ +EFI_STATUS +EFIAPI +PerformFlashWrite ( + IN PLATFORM_FIRMWARE_TYPE FirmwareType, + IN EFI_PHYSICAL_ADDRESS FlashAddress, + IN FLASH_ADDRESS_TYPE FlashAddressType, + IN VOID *Buffer, + IN UINTN Length + ) +{ + UINT32 RomAddress; + EFI_STATUS Status; + + DEBUG ((DEBUG_INFO, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN)FlashAddress, (UINTN)FlashAddressType, Length)); + + if (FlashAddressType == FlashAddressTypeAbsoluteAddress) { + FlashAddress = FlashAddress - mInternalFdAddress; + } + + RomAddress = (UINT32)FlashAddress + (mInternalFdAddress - mSFCMEM0BaseAddress); + + DEBUG ((DEBUG_INFO, "Erase and Write Flash Start\n")); + + Status = mSpiProtocol->EraseWrite (mSpiProtocol, (UINT32) RomAddress, (UINT8 *)Buffer, (UINT32) Length); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Erase and Write Status = %r \n", Status)); + } + + return Status; +} + +/** + Platform Flash Access Lib Constructor. + + @param[in] ImageHandle The firmware allocated handle for the EFI image. + @param[in] SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS Constructor returns successfully. +**/ +EFI_STATUS +EFIAPI +PerformFlashAccessLibConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + mInternalFdAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdFdBaseAddress); + + mSFCMEM0BaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdSFCMEM0BaseAddress); + + DEBUG ((DEBUG_INFO, "PcdFlashAreaBaseAddress - 0x%x, PcdSFCMEM0BaseAddress - 0x%x \n", mInternalFdAddress, mSFCMEM0BaseAddress)); + + Status = gBS->LocateProtocol (&gHisiSpiFlashProtocolGuid, NULL, (VOID **)&mSpiProtocol); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "LocateProtocol gHisiSpiFlashProtocolGuid Status = %r \n", Status)); + } + + return Status; +} diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf new file mode 100644 index 0000000..f4533ac --- /dev/null +++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf @@ -0,0 +1,51 @@ +## @file +# Platform Flash Access library. +# +# Copyright (c) 2018, Hisilicon Limited. All rights reserved. +# Copyright (c) 2018, Linaro Limited. All rights reserved. +# Copyright (c) 2016, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = PlatformFlashAccessLibDxe + FILE_GUID = 9168384A-5F66-4CF7-AEB6-845BDEBD3012 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + LIBRARY_CLASS = PlatformFlashAccessLib|DXE_DRIVER + CONSTRUCTOR = PerformFlashAccessLibConstructor + +[Sources] + PlatformFlashAccessLibDxe.c + +[Packages] + ArmPkg/ArmPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + SignedCapsulePkg/SignedCapsulePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[LibraryClasses] + BaseMemoryLib + DebugLib + PcdLib + UefiBootServicesTableLib + +[Protocols] + gHisiSpiFlashProtocolGuid + +[FixedPcd] + gArmTokenSpaceGuid.PcdFdBaseAddress + gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress + +[Depex] + gHisiSpiFlashProtocolGuid From patchwork Thu Jan 18 15:01:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 124978 Delivered-To: patch@linaro.org Received: by 10.80.140.226 with SMTP id r31csp3636146edr; Thu, 18 Jan 2018 07:02:16 -0800 (PST) X-Google-Smtp-Source: ACJfBotAIhQ1sfJm5Dwrbuf2QMluNt5FgVyu/2/ZpijQBPIVBeIdn0vdt1Ff+5tPR4X5O9bTJiVw X-Received: by 10.101.86.4 with SMTP id l4mr25534843pgs.276.1516287736835; Thu, 18 Jan 2018 07:02:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516287736; cv=none; d=google.com; s=arc-20160816; b=ff0OEXmu86HIJ97F0OnhptHGSgtm1Eo79vGCo/2slhsnUawu57JJR2IOeuknqF2w74 dxbsOHKj+ksV2UjIKoXJM6hg4LceIZDBQec4YOCb1FpkeZRPpUKpF4L8H5IQm4j9k3Cy NG1MIHvjt9D9GY8Ca/CvpRCnGS4DrxhPOaRNwjEwgsJWZ72i84IF/XJC4sRhPb86DgZu fxFtxrYAldK/2ytD+dL6+I6YLiSVjseh8TtfV54y98/0ECzb076ATPHnIRzrPQw9wceB qh22mkYOH+tjA/3tcgpYFyi/5PH53SGrbSa3cwY2cjVM5EAifPx2GrPiPIonSsGfHLfK FFcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=NynyMFpoI2AkKud5flgyr6toi5+jzkjhXjjyF9UTrfo=; b=oT4VAiDxYRnDxT9dys2LuMy92mCANSHGMv1ppZ+XW/VYeZCFdHZfDZLt1l0+p94z18 6FRDsAKyKFB7CZVwna2wsg9vcZKZWh6zNmlRoBEsVEsBcQA/y9tv66mbWbTh9nZaC8CB EcmSLkUMii4pqWiI3hvE2wiZ/RrNS3cpScEVaGcZRswBJjOuk0jl2L0+55eBBML+kXTR Nm9kaeu++xbP9OW2WnddJg3i75JlMi54SHdy/t5mMaEGrwIrkqVn4jhgmuSIZjM7s5t5 1MbTv82qJtvOsXRbZXUDJmxoGIls5VYeyfuRY7ZuJiKlEMuxkAIG6/RT/YoCiAypC4s1 Uoeg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=hprKgPck; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. 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X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:34 +0800 Message-Id: <1516287703-35516-6-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 05/14] Hisilicon D03/D05: Open SasPlatform source code X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Jason Zhang Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jason Zhang Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D03/D03.dsc | 2 +- Platform/Hisilicon/D03/D03.fdf | 3 +- Platform/Hisilicon/D05/D05.dsc | 1 + Platform/Hisilicon/D05/D05.fdf | 2 +- Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c | 89 ++++++++++++++++++++ Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h | 49 +++++++++++ Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf | 61 ++++++++++++++ Silicon/Hisilicon/HisiPkg.dec | 2 + Silicon/Hisilicon/Include/Library/OemDevicePath.h | 54 ++++++++++++ Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h | 11 +++ 10 files changed, 270 insertions(+), 4 deletions(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 69bc7b4..370e17b 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -474,7 +474,7 @@ Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf - + Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index ffddd2d..6e43228 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -271,8 +271,7 @@ READ_LOCK_STATUS = TRUE # VGA Driver # INF Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf - - INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf + INF Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index b99cda5..0d19909 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -627,6 +627,7 @@ Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf + Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 9a61c52..9edc679 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -294,7 +294,7 @@ READ_LOCK_STATUS = TRUE # INF Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf - INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf + INF Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c new file mode 100644 index 0000000..d57905e --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c @@ -0,0 +1,89 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + + +#include "SasPlatform.h" +#include +#include + +#define SAS0BusAddr 0xc3000000 +#define SAS1BusAddr 0xa2000000 +#define SAS2BusAddr 0xa3000000 + +#define SAS0ResetAddr 0xc0000000 +#define SAS1ResetAddr 0xa0000000 +#define SAS2ResetAddr 0xa0000000 + +HISI_PLATFORM_SAS_PROTOCOL mSasPlatformProtocol[] = { + { + 0, + FALSE, + SAS0BusAddr, + SAS0ResetAddr + }, + { + 1, + TRUE, + SAS1BusAddr, + SAS1ResetAddr + }, + { + 2, + FALSE, + SAS2BusAddr, + SAS2ResetAddr + } +}; +#define SAS_CONTROLLER_NUMBER sizeof (mSasPlatformProtocol) / sizeof (HISI_PLATFORM_SAS_PROTOCOL) + +EFI_STATUS +EFIAPI +SasPlatformInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + UINTN Loop; + SAS_PLATFORM_INSTANCE *PrivateData; + EFI_STATUS Status; + + for (Loop = 0; Loop < SAS_CONTROLLER_NUMBER; Loop++) { + if (mSasPlatformProtocol[Loop].Enable != TRUE) { + continue; + } + PrivateData = AllocateZeroPool (sizeof(SAS_PLATFORM_INSTANCE)); + if (PrivateData == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + PrivateData->SasPlatformProtocol = mSasPlatformProtocol[Loop]; + + Status = gBS->InstallMultipleProtocolInterfaces ( + &PrivateData->Handle, + &gHisiPlatformSasProtocolGuid, + &PrivateData->SasPlatformProtocol, + NULL + ); + if (EFI_ERROR (Status)) { + FreePool (PrivateData); + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] InstallProtocolInterface fail. %r\n", __FUNCTION__, __LINE__, Status)); + return Status; + } + } + + DEBUG ((DEBUG_INFO, "sas platform init dirver Ok!!!\n")); + return EFI_SUCCESS; +} + diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h new file mode 100644 index 0000000..a3e99dd --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h @@ -0,0 +1,49 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + + + +#ifndef _SAS_PLATFORM_H_ +#define _SAS_PLATFORM_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + + + +typedef struct { + UINTN Signature; + EFI_HANDLE Handle; + HISI_PLATFORM_SAS_PROTOCOL SasPlatformProtocol; +} SAS_PLATFORM_INSTANCE; + + +#endif // _SAS_PLATFORM_H_ + diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf new file mode 100644 index 0000000..6237f50 --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf @@ -0,0 +1,61 @@ +#/** @file +# +# Copyright (c) 2017, Hisilicon Limited. All rights reserved. +# Copyright (c) 2017, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = SasPlatform + FILE_GUID = 67B9CDE8-257D-44f9-9DE7-39DE866E3539 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = SasPlatformInitialize + +[Sources] + SasPlatform.h + SasPlatform.c + +[Packages] + ArmPkg/ArmPkg.dec + MdeModulePkg/MdeModulePkg.dec + MdePkg/MdePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[FeaturePcd] + + +[LibraryClasses] + ArmLib + BaseLib + BaseMemoryLib + CacheMaintenanceLib + DebugLib + DxeServicesTableLib + IoLib + MemoryAllocationLib + PcdLib + PlatformSysCtrlLib + ReportStatusCodeLib + UefiBootServicesTableLib + UefiDriverEntryPoint + UefiLib + +[Guids] + gEfiHisiSocControllerGuid + +[Protocols] + gHisiPlatformSasProtocolGuid + gEfiDevicePathProtocolGuid + +[Depex] + TRUE diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec index 81ba3be..9fa94fd 100644 --- a/Silicon/Hisilicon/HisiPkg.dec +++ b/Silicon/Hisilicon/HisiPkg.dec @@ -37,12 +37,14 @@ gBmcInfoProtocolGuid = {0x43fa6ffd, 0x35e4, 0x479e, {0xab, 0xec, 0x5, 0x3, 0xf6, 0x48, 0x0, 0xf5}} gSataEnableFlagProtocolGuid = {0xc2b3c770, 0x8b4a, 0x4796, {0xb2, 0xcf, 0x1d, 0xee, 0x44, 0xd0, 0x32, 0xf3}} gPlatformSasProtocolGuid = {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x5d}} + gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}} [Guids] gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, 0xf7, 0x7c, 0xfd, 0x52, 0x1d}} gHisiEfiMemoryMapGuid = {0xf8870015, 0x6994, 0x4b98, {0x95, 0xa2, 0xbd, 0x56, 0xda, 0x91, 0xc0, 0x7f}} gVersionInfoHobGuid = {0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18, 0xe, 0xe1, 0x42, 0x12, 0xbf}} + gEfiHisiSocControllerGuid = {0xee369cc3, 0xa743, 0x5382, {0x75, 0x64, 0x53, 0xe4, 0x31, 0x19, 0x38, 0x35}} [LibraryClasses] PlatformSysCtrlLib|Include/Library/PlatformSysCtrlLib.h diff --git a/Silicon/Hisilicon/Include/Library/OemDevicePath.h b/Silicon/Hisilicon/Include/Library/OemDevicePath.h new file mode 100644 index 0000000..ec8cd02 --- /dev/null +++ b/Silicon/Hisilicon/Include/Library/OemDevicePath.h @@ -0,0 +1,54 @@ +/** @file +* +* Copyright (c) 2015 - 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2015 - 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef _OEM_DEVICE_PATH_H_ +#define _OEM_DEVICE_PATH_H_ +#include + +typedef enum +{ + C_NIC = 1, + C_SATA = 2, + C_SAS = 3, + C_USB = 4, +} CONTROLLER_TYPE; + +typedef struct{ + VENDOR_DEVICE_PATH Vender; + UINT8 ControllerType; + UINT8 Socket; + UINT8 Port; +} EXT_VENDOR_DEVICE_PATH; + +typedef struct{ + UINT16 BootIndex; + UINT16 Port; +}SATADES; + +typedef struct{ + UINT16 BootIndex; + UINT16 ParentPortNumber; + UINT16 InterfaceNumber; +}USBDES; + +typedef struct{ + UINT16 BootIndex; + UINT16 Port; +}PXEDES; + +extern EFI_GUID gEfiHisiSocControllerGuid; + +#endif + diff --git a/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h b/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h index 1e1892b..dbd215a 100644 --- a/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h +++ b/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h @@ -34,4 +34,15 @@ struct _PLATFORM_SAS_PROTOCOL { SAS_INIT Init; }; +typedef struct _HISI_PLATFORM_SAS_PROTOCOL HISI_PLATFORM_SAS_PROTOCOL; + +struct _HISI_PLATFORM_SAS_PROTOCOL { + UINT32 ControllerId; + BOOLEAN Enable; + UINT64 BaseAddr; + UINT64 ResetAddr; +}; + +extern EFI_GUID gHisiPlatformSasProtocolGuid; + #endif From patchwork Thu Jan 18 15:01:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 124979 Delivered-To: patch@linaro.org Received: by 10.80.140.226 with SMTP id r31csp3636315edr; Thu, 18 Jan 2018 07:02:22 -0800 (PST) X-Google-Smtp-Source: ACJfBovY23f9bmcWJ4YAMjCPrT0dDM2oba8v9yb0iX5WviLBC2wDbwBCGhrA2boL096whh/XkCuk X-Received: by 10.99.128.66 with SMTP id j63mr27054995pgd.254.1516287742474; Thu, 18 Jan 2018 07:02:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516287742; cv=none; d=google.com; s=arc-20160816; b=aVrRa9nJnDo2RXVPEThHrvT9If9FbYMmSGNRyMZlkoIaXR+mLnhOyMMYYvM6aLBRWL HUwH/i0ZDSsVoJCSv1O3ZBAQhW+LeESpb+2peTapByAt0CB99QIehjtv1S09SUecJy3W Pch+fCcm/InrFcYt0K68IAW4hpJRzj2T4Fk4nwM/htvKglaWGtzyoUXCoimO9D9i2Jbv TjfzRZ1U++byWAx6xGFdP63sAzao0H9kw4JWxOdaP/ei7Myk+lWfJimYiaS7fvMiN9tU eJkumaGa3JEiIvaSaVZpObKPQQysL8O+t5MU7FP2p0yTa0O6lQOds8uH1v3qXyXR3uji FwLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=hijigfVv5modBpnlR6gPpn8+T1ozqv1WNho312HQEaA=; b=XV9iafkfx4eFNLNv1v8We3jpM7CEoAfeMaAQPebtqD1C40bYRhXRHTYmqEd7WMeD5p xLv+2ExWMD3xYAfEji8ZriOUPCVzW3qGmmC95PPLAZF2s97FMlaAGW8JfeW89oJlaNiZ /2iu8A3EmfrLfeyuJGzucRfK7ufgYYcXDKHhhRTjTR+vRSL/Wa/QC1UK6BNytiT2cTHQ cXQeTrOzdWPz/yBFohstf5b3IvSwUerzJsF27qg8NIplbCxahpIucZNPZmxxzwWVgzKN d/1uonjx4kyy0oOqdO/Qtxlc0GI3Rpch8VnDDTMxtmeEjyW6hbXNXd0qBbMwYg7CMEJt c0xg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=M2o0vFO7; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id i1si5990370pgq.829.2018.01.18.07.02.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Jan 2018 07:02:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=M2o0vFO7; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id D4BFC2232BE06; Thu, 18 Jan 2018 06:56:50 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::244; helo=mail-pf0-x244.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x244.google.com (mail-pf0-x244.google.com [IPv6:2607:f8b0:400e:c00::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1C93A221F93B6 for ; Thu, 18 Jan 2018 06:56:50 -0800 (PST) Received: by mail-pf0-x244.google.com with SMTP id e11so14776343pff.6 for ; Thu, 18 Jan 2018 07:02:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LOFHR+BGPJ53RrLmo8f15RyCebAKgXvmMmzKy1xh1/c=; b=M2o0vFO7NO36Pj+u4My4VY0Tk6et3625jTmAQTTuNOUm33n+pMvN48vv00bEcyqcN3 jfonzqXvKtTY4M4ULNOlZ31ZIS8YvlIjypIn03nBYQCPxE0sRMSCmZtGqZ8wUHaRatLJ 5YTDa7000Z6xV15KP0FSxjlExrhaZiV6r4ZxM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LOFHR+BGPJ53RrLmo8f15RyCebAKgXvmMmzKy1xh1/c=; b=omnCqDfQwpimEtt874vh0lNfqfMAY8mBz3anHcegQh0maLRb3stRF/fqYlqhKW7Ci1 SLuaL8L6e2uCBGGSskUXcfnFVuConZdgd653Hc+yuIiDFvuX0Rsgvci2xIEkLbrTTQk1 z3I4RTwHadpwbhRWrJXYQpqjinPW/PpE/MuwHFy8krzAyiLd01xbpj7oIvWZd+UcU0Nj ++mWAVBTPOR/q6kpt7k1r0QMbDRmXoJs9beaBGwy9IWl7e3htIRnmMjrNhD1WGueFxsG 2o9fcrcIocGUubmaCdyaVCu4gvVO7RQui3ZHItaNuajl50hN2Ck9V2kIWG23XYNWurcY oH5A== X-Gm-Message-State: AKGB3mIoZ3QXIel7qyYi40KDVy4NCf/TjWmPWfiT8siYlKFJFvYLuqS2 z2ilpWJFFFZnbTugAHZ4uND25g== X-Received: by 10.99.96.23 with SMTP id u23mr36741681pgb.40.1516287731179; Thu, 18 Jan 2018 07:02:11 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j14sm13621815pfh.94.2018.01.18.07.02.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Jan 2018 07:02:10 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:35 +0800 Message-Id: <1516287703-35516-7-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 06/14] Hisilicon D03/D05: Open SnpPlatform source code X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Jason Zhang 1. Open driver source code. 2. This code includes network sequence correction solution. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jason Zhang Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D03/D03.dsc | 2 + Platform/Hisilicon/D03/D03.fdf | 2 +- Platform/Hisilicon/D05/D05.dsc | 2 + Platform/Hisilicon/D05/D05.fdf | 3 +- Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c | 99 ++++++++++++++++++++ Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h | 43 +++++++++ Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf | 60 ++++++++++++ Silicon/Hisilicon/HisiPkg.dec | 1 + Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h | 32 +++++++ 9 files changed, 241 insertions(+), 3 deletions(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 370e17b..b22afe3 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -404,6 +404,8 @@ Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.inf + Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf + MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index 6e43228..e93985b 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -242,7 +242,7 @@ READ_LOCK_STATUS = TRUE #Network # - INF Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf + INF Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf INF Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 0d19909..4e19de2 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -541,6 +541,8 @@ Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf + Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf + MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 9edc679..9873677 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -247,8 +247,7 @@ READ_LOCK_STATUS = TRUE # #Network # - - INF Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf + INF Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf INF Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c new file mode 100644 index 0000000..385c04a --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c @@ -0,0 +1,99 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + + +#include "SnpPlatform.h" + + HISI_PLATFORM_SNP_PROTOCOL mSnpPlatformProtocol[] = { + { + 4, + 1 + }, + { + 5, + 1 + }, + { + 2, + 0 + }, + { + 3, + 0 + }, + { + 0, + 1 + }, + { + 1, + 1 + }, + { + 6, + 0 + }, + { + 7, + 0 + } +}; + +#define SNP_CONTROLLER_NUMBER sizeof (mSnpPlatformProtocol) / sizeof (HISI_PLATFORM_SNP_PROTOCOL) + +EFI_STATUS +EFIAPI +SnpPlatformInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + UINTN Loop; + SNP_PLATFORM_INSTANCE *PrivateData; + EFI_STATUS Status; + + for (Loop = 0; Loop < SNP_CONTROLLER_NUMBER; Loop++) { + if(mSnpPlatformProtocol[Loop].Enable != 1) { + continue; + } + PrivateData = AllocateZeroPool (sizeof(SNP_PLATFORM_INSTANCE)); + if (PrivateData == NULL) { + DEBUG ((DEBUG_INFO,"SnpPlatformInitialize error 1\n")); + return EFI_OUT_OF_RESOURCES; + } + + + PrivateData->SnpPlatformProtocol = mSnpPlatformProtocol[Loop]; + + // + // Install the snp protocol, device path protocol + // + Status = gBS->InstallMultipleProtocolInterfaces ( + &PrivateData->Handle, + &gHisiSnpPlatformProtocolGuid, + &PrivateData->SnpPlatformProtocol, + NULL + ); + if (EFI_ERROR (Status)) { + FreePool (PrivateData); + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] InstallProtocolInterface fail. %r\n", __FUNCTION__, __LINE__, Status)); + return Status; + } + } + + DEBUG ((DEBUG_INFO,"SnpPlatformInitialize succes!\n")); + + return EFI_SUCCESS; +} diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h new file mode 100644 index 0000000..031c8d3 --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h @@ -0,0 +1,43 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + + + +#ifndef _SNP_PLATFORM_H_ +#define _SNP_PLATFORM_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +typedef struct { + UINTN Signature; + EFI_HANDLE Handle; + HISI_PLATFORM_SNP_PROTOCOL SnpPlatformProtocol; +} SNP_PLATFORM_INSTANCE; +#endif diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf new file mode 100644 index 0000000..804224b --- /dev/null +++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf @@ -0,0 +1,60 @@ +#/** @file +# +# Copyright (c) 2017, Hisilicon Limited. All rights reserved. +# Copyright (c) 2017, Linaro Limited. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010019 + BASE_NAME = SnpPlatform + FILE_GUID = 102D8FC9-20A4-42eb-AC14-1C98BA5B17A8 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = SnpPlatformInitialize + +[Sources] + SnpPlatform.h + SnpPlatform.c + +[Packages] + ArmPkg/ArmPkg.dec + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[FeaturePcd] + + +[LibraryClasses] + ArmLib + BaseLib + BaseMemoryLib + CacheMaintenanceLib + DebugLib + DxeServicesTableLib + IoLib + MemoryAllocationLib + PlatformSysCtrlLib + PcdLib + ReportStatusCodeLib + UefiLib + UefiBootServicesTableLib + UefiDriverEntryPoint + +[Guids] + +[Protocols] + gHisiSnpPlatformProtocolGuid + +[Depex] + TRUE + diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec index 9fa94fd..2bb6518 100644 --- a/Silicon/Hisilicon/HisiPkg.dec +++ b/Silicon/Hisilicon/HisiPkg.dec @@ -38,6 +38,7 @@ gSataEnableFlagProtocolGuid = {0xc2b3c770, 0x8b4a, 0x4796, {0xb2, 0xcf, 0x1d, 0xee, 0x44, 0xd0, 0x32, 0xf3}} gPlatformSasProtocolGuid = {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x5d}} gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}} + gHisiSnpPlatformProtocolGuid = {0x81321f27, 0xff58, 0x4a1d, {0x99, 0x97, 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f}} [Guids] gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, 0xf7, 0x7c, 0xfd, 0x52, 0x1d}} diff --git a/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h b/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h new file mode 100644 index 0000000..0d9f0b4 --- /dev/null +++ b/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h @@ -0,0 +1,32 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef _SNP_PLATFORM_PROTOCOL_H_ +#define _SNP_PLATFORM_PROTOCOL_H_ +#define HISI_SNP_PLATFORM_PROTOCOL_GUID \ + { \ + 0x81321f27, 0xff58, 0x4a1d, 0x99, 0x97, 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f \ + } + +typedef struct _HISI_PLATFORM_SNP_PROTOCOL HISI_PLATFORM_SNP_PROTOCOL; + +struct _HISI_PLATFORM_SNP_PROTOCOL { + UINT32 ControllerId; + UINT32 Enable; +}; + +extern EFI_GUID gHisiSnpPlatformProtocolGuid; + +#endif From patchwork Thu Jan 18 15:01:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 124980 Delivered-To: patch@linaro.org Received: by 10.80.140.226 with SMTP id r31csp3636466edr; Thu, 18 Jan 2018 07:02:28 -0800 (PST) X-Google-Smtp-Source: ACJfBovs3cfgLTQyvdF0PuGBbJ4Jnk+8FZQQ8BF2HoYaWjzKchcSnUUs7hgwoy4OnWTo42wRj7+j X-Received: by 10.98.231.11 with SMTP id s11mr16192067pfh.174.1516287748101; Thu, 18 Jan 2018 07:02:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516287748; cv=none; d=google.com; s=arc-20160816; b=Vq+U9jdepTL1a0fIEh3btwrvbhTPuxt19EMbYYFz+PMOA13tQQ4xehpLx/hT5Cs31n BHa63L4F2ifMLSeUb4WII1UShfI7y+LNF4k4F0AZ0uLgr07BRjNrrHNJqn8PHaOsnS4y rZqhZlIgzkIu1p9MoViEzxlTT8e40cPtELD86J2Ximj4hXu4Ze6P/BoAg2PPOzASyyf4 r1uNsQzGmxpSmUy9JIY0vBE5MG2AzPJqZtcPraxW9sobc/YxeRV96iVQ6V5L/nngsY0a O9GhKCBADOv/llHBX4CRRRiZxluu7W/eMIaiT75fvic50FeQR2jfeH5y6bc0OCdpC2Ua KOow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=BF+rKPEFb70QLWCAbnAYEj1I04doDTiYPHc9kOLyXlE=; b=kqrllxSAKctm0VKgaIpMxqBHWRXCyERFZV360YzkFcZWfXcw055WIvIQkX6s19q3CB itEy4mws2XyBnxXbF3nI5iqLfp79ylER7gO+erdX25LmXbhC3xyrYIij0KP2K9LjfCH/ TUXHhMp62Yp8bvVf9cAvxebcZWtH9U2NpZDgk/i9sGjeoTv142TrTOsrt5+KEzSWwcBU bioUHzFI6y1t9ZpoaNE40N7rTHapVYj2AyNZ1Zu+fapVnCOik30hmVkLpokQybWgVlFs OZPnAuYXZL7c3DhoLWPn1wVIc+9O2XADLmns9vgPNN9eV2jNw5KbbadPQheGjCzXgHFB gMeQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=BOOHoVaf; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id e25si6307826pgn.782.2018.01.18.07.02.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Jan 2018 07:02:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=BOOHoVaf; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 4A96E2232BE0D; Thu, 18 Jan 2018 06:56:54 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::244; helo=mail-pf0-x244.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x244.google.com (mail-pf0-x244.google.com [IPv6:2607:f8b0:400e:c00::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7D80E221F93B6 for ; Thu, 18 Jan 2018 06:56:52 -0800 (PST) Received: by mail-pf0-x244.google.com with SMTP id 23so14780396pfp.3 for ; Thu, 18 Jan 2018 07:02:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UjzDVu9Yn/CY6v03L5gaQCSu4h0di5cqSFqBnrW/3sQ=; b=BOOHoVafjluBSRt1Hmv/FZFp5awZkuzVwmmdjNHSjQq0l0kjNmLbJhxVxkZK5NwxmS T7CM5h75rpXkIQrWQTjlWMzehdul9wi/ORpkIis4He7mNEkeq2cyqMoS6YTZlnAN2vjX XLn/Bc056NppGf5ma/0vWNbFne3d+bdZn4ak4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UjzDVu9Yn/CY6v03L5gaQCSu4h0di5cqSFqBnrW/3sQ=; b=IDyuPaSXstxOhQg1M9sRUUMvcoPqsX9+0PTGz0PuZbf+VbEbLBNsW/rSbZz8wEgaSj jogoL9aMuKHk1DRNCWQatzgV5aFZldGU2gtNcj3Q2+gC8hR7rN5c6QelHd8qQfrXr4FM XxDKjj7LhIwhMSt/dSqXcwFjxEOTP23OuRWFcQnJkuEoJTL73MOgrlym5096j+RWt97j nCVrVmk/oZBodMJZzBNUXDDrDpVS0FL9dX9VYHsRMDJFijG4PqPEoswXIpdt2MeQdzyz haXViZt10FcVJHae4qTwsE//I7vww2TT0ZdiRE/JcmLFI4dLp965gYBDkoumYZSEArXi qlFg== X-Gm-Message-State: AKGB3mKLuvtpr8nlhdOsfhsH9Y7oFyNaPqsHuE8BYHgjWWSIbulHw6Sx 0o/OtI5Yb81PqX/zWo9/1FPNgQ== X-Received: by 10.98.76.87 with SMTP id z84mr36699297pfa.208.1516287733982; Thu, 18 Jan 2018 07:02:13 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j14sm13621815pfh.94.2018.01.18.07.02.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Jan 2018 07:02:13 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:36 +0800 Message-Id: <1516287703-35516-8-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 07/14] Hisilicon/Smbios: modify type 4 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" modify processorFamily of type 4 to ProcessorFamilyIndicatorFamily2, indicator to obtain the processor family from the Processor Family 2 field. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Ard Biesheuvel diff --git a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c index 61473e8..c9903ba 100644 --- a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c +++ b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c @@ -125,7 +125,7 @@ SMBIOS_TABLE_TYPE4 mSmbiosProcessorTable[] = { }, 1, //Socket CentralProcessor, //ProcessorType - ProcessorFamilyOther, //ProcessorFamily + ProcessorFamilyIndicatorFamily2, //ProcessorFamily 2, //ProcessorManufacture { //ProcessorId { //Signature @@ -172,7 +172,7 @@ SMBIOS_TABLE_TYPE4 mSmbiosProcessorTable[] = { }, 1, //Socket CentralProcessor, //ProcessorType - ProcessorFamilyOther, //ProcessorFamily + ProcessorFamilyIndicatorFamily2, //ProcessorFamily 2, //ProcessorManufacture { //ProcessorId { //Signature From patchwork Thu Jan 18 15:01:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 124981 Delivered-To: patch@linaro.org Received: by 10.80.140.226 with SMTP id r31csp3636626edr; Thu, 18 Jan 2018 07:02:33 -0800 (PST) X-Google-Smtp-Source: ACJfBovI02QCbwP05NK4JQvOGQHWA3+KbtAQRKcEN0lUAuUnFyYjb4os2AfdXYZqjU18hjWi78u5 X-Received: by 10.202.49.73 with SMTP id x70mr3046333oix.306.1516287753044; Thu, 18 Jan 2018 07:02:33 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516287752; cv=none; d=google.com; s=arc-20160816; b=ww1tYQoDRqEdVoKiFc6q+COf1V64b1HLRsLQRxulIif/VGByE4ZZ+5452PcNjsRhSz 5w0yDMEZt3MdOxoOAy8QgbS5DX5vJRER4GmBCOabs0WIZNBBzUQ44zNnusU7zf74j2A7 NKw+syHb9r0d5ctUrTrmBdi6S4gOGP4BGw7ndlKj8g4MApeoztBKuR2DQdEEv7D94S46 dlcREQK9yk6WVfk6l4MRZJB8zpVcwwGsnWfxSXzuxbD3n+AIURAjlZlnII3JXr0Z2o16 XgqWoa9oIM3sd1QPy7bl0xIjbpHF12oJrAY48RUdjx1HDnHjz6NxVczatx7MsARvFI4f fPVw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=jVEzj/XJ+OJG+Hf6K/HbUcMZ6IIPmidrsCvVvcluziY=; b=bD9o5JYg4he4aQAORCRQsFe/pJR574hC44PxS1jLKcs0J1HuiBjAjP0dMzIUz+MbDa XN6KqF6Wp1UXGVOn1lccpqSGoTfTNWbqDuo5BCR5TLhibkkyMmcWJUo09J/lWhgebC6L iM8pca9yx94dO2nC6Vh3Q/7oLhJcLVdB5uyvqEhZMBRoVjT+prqjfB0ywTWFfzjQpDcD 5wVM9Lmns8h9LCA5zL0OZY8OwInkAgJiNXh9SeW+to3zIQQCXFuBXulflvoNnB9p76jx grvvZMW/C+6XjBZk7zktUqXtyvYdJ0VVBIf/n2pZhZlVRJiz/gGp77cC+AaAQYr7weyi 9VPQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Z3kxxnuu; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id t192si6324242pgc.23.2018.01.18.07.02.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Jan 2018 07:02:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Z3kxxnuu; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 9FCBF2232BE11; Thu, 18 Jan 2018 06:56:57 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::243; helo=mail-pf0-x243.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x243.google.com (mail-pf0-x243.google.com [IPv6:2607:f8b0:400e:c00::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8F0D9221F93B6 for ; Thu, 18 Jan 2018 06:56:55 -0800 (PST) Received: by mail-pf0-x243.google.com with SMTP id y26so7213899pfi.10 for ; Thu, 18 Jan 2018 07:02:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JttdTKxDx6zRdn9QTFDmKkXWxv3StsH9DISUOfgxk+0=; b=Z3kxxnuuRppdCGRFDdAyE1A70KPSsvGUb7+hDTgf705XNMMapyi3wpLZu4o5B6xBqA mTwc0WSTDLCWxeFFBvQWUzgeYBAcsjlAjqz0Ixw2w8o7iPh2MuoJmBiN1Mwy3aEm58ti ox3akXh/JNzVAQ9KAb84gKfvuVefRPi4odQvQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JttdTKxDx6zRdn9QTFDmKkXWxv3StsH9DISUOfgxk+0=; b=uLYVon0zNrZK79vY9rV0Zvs4+0q795rh+OeeGpAVTVV5/whnXwU2EZfAIyANZuNDfh BlKCZW2yYBVTLshGic8PTJzgQJ597xsrCh1rr7ffq7sSZn9LgR/JkkTgQz921z/wKWR0 Dp+hyLaA2ps7lMu930rIouoQfgrLOFZ1BlUt5Q3MPaP+aG/KRn90VfAn92HGFcW+IvIl fL7/J1s5v0Emx0xspVYDP9SrpiDhnjJC3EL6nsERW9gvqVBxzauEW6Lb76KH3yhSTgTN IV5iyk+QXDMOvANYET37rX6+4H+9Ekyad86Wn02NLPX7bEXzP1cFv+9+tGZyeUsXEP1b r6Hw== X-Gm-Message-State: AKwxytfZKptQObDAQVO33ydtobZAMYacsAkNbGXY4uSjTZ49IO2cQ3/p 2GT4S0iNophM9gBmBEAjlA3+GxD0aM8= X-Received: by 10.98.201.199 with SMTP id l68mr15430501pfk.199.1516287736947; Thu, 18 Jan 2018 07:02:16 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j14sm13621815pfh.94.2018.01.18.07.02.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Jan 2018 07:02:16 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:37 +0800 Message-Id: <1516287703-35516-9-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 08/14] Hisilicon/PCIe: Disable PCIe ASPM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Yan Zhang , Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" From: Yan Zhang In order to replace command line parameter pcie_aspm=off, BIOS needs to disable Pcie Aspm support during Pcie initilization. D03 and D05 do not support PCIe ASPM, so we disable it in BIOS. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Signed-off-by: Yan Zhang --- Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 71 ++++++++++++++++++++ Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h | 2 + Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h | 2 + 3 files changed, 75 insertions(+) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c index f420c91..ca3b2f8 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c +++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c @@ -1033,6 +1033,74 @@ DisableRcOptionRom ( return; } +VOID +PcieDbiCs2Enable( + IN UINT32 HostBridgeNum, + IN UINT32 Port, + IN BOOLEAN Val + ) +{ + UINT32 RegVal; + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_SUBCTRL_SC_PCIE_SYS_CTRL21, RegVal); + if (Val) { + RegVal = RegVal | BIT2; + /*BIT2: DBI Chip Select indicator. 0 indicates CS, 1 indicates CS2.*/ + } else { + RegVal = RegVal & (~BIT2); + } + RegWrite (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_SUBCTRL_SC_PCIE_SYS_CTRL21, RegVal); +} + +BOOLEAN +PcieDBIReadOnlyWriteEnable( + IN UINT32 HostBridgeNum, + IN UINT32 Port + ) +{ + UINT32 Val; + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_DBI_READ_ONLY_WRITE_ENABLE, Val); + if (Val == 0x1) { + return TRUE; + } else { + RegWrite (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_DBI_READ_ONLY_WRITE_ENABLE, 0x1); + /*Delay 10us to make sure the PCIE device have enouph time to response. */ + MicroSecondDelay(10); + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_DBI_READ_ONLY_WRITE_ENABLE, Val); + if (Val == 0x1) { + return TRUE; + } + } + DEBUG ((DEBUG_ERROR,"PcieDBIReadOnlyWriteEnable Fail!!!\n")); + return FALSE; +} +VOID +SwitchPcieASPMSupport ( + IN UINT32 HostBridgeNum, + IN UINT32 Port, + IN UINT8 Val + ) +{ + PCIE_EP_PCIE_CAP3_U pcie_cap3; + + if (Port >= PCIE_MAX_ROOTBRIDGE) { + DEBUG ((DEBUG_ERROR, "Port is not valid\n")); + return; + } + if (!PcieDBIReadOnlyWriteEnable (HostBridgeNum, Port)) { + DEBUG ((DEBUG_INFO, "PcieDeEmphasisLevelSet ReadOnly Reg do not Enable!!!\n")); + return; + } + PcieDbiCs2Enable (HostBridgeNum, Port, FALSE); + + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CAP3_REG, pcie_cap3.UInt32); + pcie_cap3.Bits.active_state_power_management = Val; + RegWrite (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CAP3_REG, pcie_cap3.UInt32); + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CAP3_REG, pcie_cap3.UInt32); + DEBUG ((DEBUG_INFO, "ASPI active state power management: %d\n", pcie_cap3.Bits.active_state_power_management)); + + PcieDbiCs2Enable (HostBridgeNum, Port, TRUE); +} + EFI_STATUS EFIAPI PciePortInit ( @@ -1090,6 +1158,9 @@ PciePortInit ( /* disable link up interrupt */ (VOID)PcieMaskLinkUpInit(soctype, HostBridgeNum, PortIndex); + //disable ASPM + SwitchPcieASPMSupport (HostBridgeNum, PortIndex, PCIE_ASPM_DISABLE); + /* Pcie Equalization*/ (VOID)PcieEqualization(soctype ,HostBridgeNum, PortIndex); diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h index 9a0f636..e96c53c 100644 --- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h +++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h @@ -77,6 +77,8 @@ #define RegWrite(addr,data) MmioWrite32((addr), (data)) #define RegRead(addr,data) ((data) = MmioRead32 (addr)) +#define PCIE_ASPM_DISABLE 0x0 +#define PCIE_ASPM_ENABLE 0x1 typedef struct tagPcieDebugInfo { diff --git a/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h b/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h index bf57652..c8b9781 100644 --- a/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h +++ b/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h @@ -135,6 +135,7 @@ #define PCIE_EEP_PORTLOGIC53_REG (0x888) #define PCIE_EEP_GEN3_CONTRL_REG (0x890) #define PCIE_EEP_PIPE_LOOPBACK_REG (0x8B8) +#define PCIE_DBI_READ_ONLY_WRITE_ENABLE (0x8BC) #define PCIE_EEP_PORTLOGIC54_REG (0x900) #define PCIE_EEP_PORTLOGIC55_REG (0x904) #define PCIE_EEP_PORTLOGIC56_REG (0x908) @@ -12556,6 +12557,7 @@ typedef union tagPortlogic93 #define PCIE_SUBCTRL_SC_DISPATCH_DAW_ARRAY5_REG (PCIE_SUBCTRL_BASE + 0x1018) #define PCIE_SUBCTRL_SC_DISPATCH_DAW_ARRAY6_REG (PCIE_SUBCTRL_BASE + 0x101C) #define PCIE_SUBCTRL_SC_DISPATCH_DAW_ARRAY7_REG (PCIE_SUBCTRL_BASE + 0x1020) +#define PCIE_SUBCTRL_SC_PCIE_SYS_CTRL21 (PCIE_SUBCTRL_BASE + 0x1024) #define PCIE_SUBCTRL_SC_DISPATCH_RETRY_CONTROL_REG (PCIE_SUBCTRL_BASE + 0x1030) #define PCIE_SUBCTRL_SC_DISPATCH_INTMASK_REG (PCIE_SUBCTRL_BASE + 0x1100) #define PCIE_SUBCTRL_SC_DISPATCH_RAWINT_REG (PCIE_SUBCTRL_BASE + 0x1104) From patchwork Thu Jan 18 15:01:38 2018 Content-Type: text/plain; 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[198.145.21.10]) by mx.google.com with ESMTPS id p65si7058185pfi.63.2018.01.18.07.02.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Jan 2018 07:02:39 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Nbs+qZzR; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 0D8992232BE16; Thu, 18 Jan 2018 06:57:00 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::243; helo=mail-pf0-x243.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x243.google.com (mail-pf0-x243.google.com [IPv6:2607:f8b0:400e:c00::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A0149221F93B6 for ; Thu, 18 Jan 2018 06:56:58 -0800 (PST) Received: by mail-pf0-x243.google.com with SMTP id e76so14776400pfk.1 for ; Thu, 18 Jan 2018 07:02:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qz9P7wPBOh9Hbvqv76mSoYax/qhzk4xlVT9VKryELiM=; b=Nbs+qZzRF8G18ietQKdo3RFTka8W29z/7RY2ZFapSwzkD9o1GfYip4lV47Q1J4aswI BmLDeIzj15UsXFeoD5ORnGq4bBkua5vaRm+W83bs6iApRe3Pi2M8XBl+RKPjH16f10eH ol4rk3CMgogHHZRdJsodl5uva1RAbp5wZXvgw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qz9P7wPBOh9Hbvqv76mSoYax/qhzk4xlVT9VKryELiM=; b=j7WnU4g8icm0boAj8jmcm0yQKZhPZ/DJpy3naMdBpKFRMm8N+W8HBvg4gDIVFVPH0I wdmWlvQc0FUJtLittw3OqvmHhfyBQAq1oPYiPaFXHDFx84QV9iJDMLcvAZY7qzBTt9z1 Y6wZ+W1elUNRoqINaBGIatCPx3TKV452DxTsnrs2Nl+0QMrQIWMcGVYBthnfbfo4msyN lIRnT8K6paNudjQ6fm3rvy8StCBTkUt7SU+lAF799Kc0PUgLPcYbfG+YfbkMQKuGE3bR H7iwl+nhXPeJ+/ibicAP/JqCMGrJBGGnoO1WxUCw8WMp737K2L9izbo6lsd8siOog0nN fWoQ== X-Gm-Message-State: AKwxyte48J5klGx0RG2yv7q/61IHGW2GE0z1iJMOW0H8aIQ/z1APPoK1 oevs7fJocnsuPAgIxdC+tqk1ND9JDtM= X-Received: by 10.98.58.194 with SMTP id v63mr29719907pfj.36.1516287740134; Thu, 18 Jan 2018 07:02:20 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j14sm13621815pfh.94.2018.01.18.07.02.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Jan 2018 07:02:19 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:38 +0800 Message-Id: <1516287703-35516-10-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 09/14] Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, GongChengYa , guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" In SCT test,we find SP805 watchdog driver can't reset when timeout so we use another driver in MdeModulePkg. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Signed-off-by: GongChengYa --- Platform/Hisilicon/D05/D05.dsc | 2 +- Platform/Hisilicon/D05/D05.fdf | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Ard Biesheuvel Reviewed-by: Leif Lindholm diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 4e19de2..79890ef 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -515,7 +515,7 @@ ArmPkg/Drivers/TimerDxe/TimerDxe.inf - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf # #ACPI diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf index 9873677..d05e227 100644 --- a/Platform/Hisilicon/D05/D05.fdf +++ b/Platform/Hisilicon/D05/D05.fdf @@ -193,7 +193,7 @@ READ_LOCK_STATUS = TRUE INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf # # FAT filesystem + GPT/MBR partitioning From patchwork Thu Jan 18 15:01:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 124983 Delivered-To: patch@linaro.org Received: by 10.80.140.226 with SMTP id r31csp3637021edr; Thu, 18 Jan 2018 07:02:45 -0800 (PST) X-Google-Smtp-Source: ACJfBosz1BwpY0d7GS9Htcv4mrBVJdAGrF5NRSHKLpjDAU6rgoxNFbRQ8xHMyDdvr17Re7dckuit X-Received: by 10.98.88.198 with SMTP id m189mr41424716pfb.171.1516287765202; Thu, 18 Jan 2018 07:02:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516287765; cv=none; d=google.com; s=arc-20160816; b=oOKKX/a4VjqLlqfo7OuJfhq6IRR29rgi5DK+OBYszmk1RorLAqiQv1EB/0LbNo7e3o PkHtZ/v5tqT87dr/heltZn3IrfNZqgkniteBIS2TgqcT6Neq20BrPSjwDTRA0Y+A6piy M6aFPpt/3o13N2QO/+ihxr/pLRJeZuciam/2PNUKJkFKEcfSmJD8zSUmX8kJlphzCAOj YbjW+clrVmamy3kstZRQIK7pFauIkdLCRPca6WzJp2NpDC3L4nITBIuSEmFlirHNopge sAF63GRtyP4bIZ54odjYs+fhttxO0sPbUdVDwBUnQsNb4pDuHyzDhASGKjeJoeCZWU1t /f5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=Nsz4q+F6Swidx6NzSQL/ckqGGSx3Rgbo9yAlcAnog74=; b=z8wLN2DpWcsk3N1LZT7yX067nZK7Nio7KWbUnAbfb+sDJnWYjseVA5q+YwPM2lWEAG wi1tedjvK897Vb4JvlN/oFAywaQx43ZXDMI5feHqXO+IVnIwkrJa17D3JGJJp5soxUVA Mf4EMAJ9X4r2q+gQtu5jLk3bAkho1svMHk2Wy8Yo7yxvFgDzfjnekWBalNYbFg6KpVki csj33VRgzGdTH5X5oRJSVR7VzpH6YrPcob/x4Qlw0scCjjk6R0Y/X/DW9LM6cm+L+f/C X+NST3hCuVgA61CHSPxLILWwlzARSy935nF80XfU0UEG5lfzsdHQLdXPyrjUklc4cvPh ldEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=gIHb18C8; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id t64si6206262pgb.300.2018.01.18.07.02.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Jan 2018 07:02:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=gIHb18C8; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 717B52232BE1E; Thu, 18 Jan 2018 06:57:03 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::241; helo=mail-pf0-x241.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x241.google.com (mail-pf0-x241.google.com [IPv6:2607:f8b0:400e:c00::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 64596221F93B6 for ; Thu, 18 Jan 2018 06:57:02 -0800 (PST) Received: by mail-pf0-x241.google.com with SMTP id a88so13277449pfe.12 for ; Thu, 18 Jan 2018 07:02:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=l/h/WC2EOrb7n/T7S0c2LJudMbXykIQ21K02d0cKqZI=; b=gIHb18C8V6RpxlfmrWCRzq93cu07lykazSH7vrEN5OV9X7TXGDy9HmrJ21AmmWGcRz bdtkEet9gGUHs9duQbIx1O3l03SyO56qui+uPvU7+p0KlEO4cGVaYZCx7ezzfDz4+cdJ KIqcRMBgRj625dci9XEHGcfFcaRBxSc4+uJng= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=l/h/WC2EOrb7n/T7S0c2LJudMbXykIQ21K02d0cKqZI=; b=C+pmkHG6tP5uona8Iwhw3Hti5/91t1xZVMMNw71ra7xCNz5ocFX3hcLdNDDZUOlftL +POUsM7Jem5i1FDFEbTTz7AQ0/MGYvIZev6spQZxQ/BSpJgoRflsA6902a0VEtBeyMSB ZAy+EZ3/Q/X431UBAPuISgNSoKEnuEoPLrsLVx+rP/PsJIxETOBtjVG+EQubATIhsJ0O WcyEJFnCJpKM+JzqtSJ4bVDNbLLjfagx2I5NbNEq8NNE1lz5zmvEIcww9AzrQzQ11wnt Eg6fKJ2GysUTVgAkkEARw/pDRthTluhurvZ3xOx/GbRa2eVcyWaVcwr7+r9peMZuiP5R Kf2Q== X-Gm-Message-State: AKwxytdaXz1N+EprMNom+F94ZKIoNBPTUoV/xnUjL8o7JnpIM7HAJnWq Ukx3L6XJg/UuXxI423UU/g9FLQ== X-Received: by 10.99.126.24 with SMTP id z24mr25240312pgc.143.1516287743726; Thu, 18 Jan 2018 07:02:23 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j14sm13621815pfh.94.2018.01.18.07.02.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Jan 2018 07:02:22 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:39 +0800 Message-Id: <1516287703-35516-11-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 10/14] Hisilicon/D03: Replace SP805Watchdog by WatchdogTimer driver. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, GongChengYa , guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" In SCT test,we find SP805 watchdog driver can't reset when timeout so we use another driver in MdeModulePkg. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo Signed-off-by: GongChengYa --- Platform/Hisilicon/D03/D03.dsc | 2 +- Platform/Hisilicon/D03/D03.fdf | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Ard Biesheuvel Reviewed-by: Leif Lindholm diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index b22afe3..88c08dd 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -379,7 +379,7 @@ ArmPkg/Drivers/TimerDxe/TimerDxe.inf - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf # #ACPI diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf index e93985b..5b7bb1d 100644 --- a/Platform/Hisilicon/D03/D03.fdf +++ b/Platform/Hisilicon/D03/D03.fdf @@ -189,7 +189,7 @@ READ_LOCK_STATUS = TRUE INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf # # FAT filesystem + GPT/MBR partitioning From patchwork Thu Jan 18 15:01:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 124984 Delivered-To: patch@linaro.org Received: by 10.80.140.226 with SMTP id r31csp3637134edr; Thu, 18 Jan 2018 07:02:49 -0800 (PST) X-Google-Smtp-Source: ACJfBotIi5cTjSDf0xUyjCoiQ4eKR7+s0IqoCMI+wep8aArASRuY7IfUpqmT0p8rykd2e0pCI4gt X-Received: by 10.99.96.23 with SMTP id u23mr33743134pgb.199.1516287769062; Thu, 18 Jan 2018 07:02:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516287769; cv=none; d=google.com; s=arc-20160816; b=lBknWMMA/WSHOMsfDkH0Ei67czQ5SthBqfWXKx5leJuPu9n/afamu+hF3u4pFnSIpe anh+/2owzCMGzy2+CtEsLk5xBVe4IaSO3XD+3j54NM5nVTlfYDenQS2vwNw2OBCNcHep MtqJJxbpob6JHbK5TAfBsg2B1rsMiO4zjR+fzRHXknAzIeWbXdrX5c9j9fdJ1eLVeR8u 16REfaG62TiwO7I1Y4QmpWFygOEu0RDzKcE/ZRrYgsc8b3afPEGDWd5SXmfQipzZmex0 95Jms8YcLWupgIzFNdbzfx1kfnTM0olmzqisviY5VYYqPyX7EXBaGKNRcTR1/mag9DUq YKBQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=Wyo+DTx30EDQrsUhQIyzQAwOMVR7xGggWKHahtX1eQM=; b=oQMU4O/aPJRHc46DZOlAUlBZiha57h27LHh2JdaHT/PNuKrx76KtmicWO5wwKPJU/G qukbVANoNsipsoGbQCHpEElU09kS3mnAbwpjSRxNV0P6O1paxo4/R89XJCivd2e3s6Kp Qly1NZhDonE4zmzJLxiithaGVczSF3O94xQP47xH+f8/JwKw4AFuMbWoGidrXHWs5yL1 s+KyViNGNYrHnmcaKalfvXZeQkhufJNLFv3OjO6tDPYGdRRlqPnZQWhWfyLgqOTufYm5 7psaBxIS2iQquDkzICsXdJKDzJpwfXvfb2peMUljUK0WU5nm5t5h9UXGLG1h+bje+5sV FMcQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=MOEP6/Yl; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id p65si7058162pfg.280.2018.01.18.07.02.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Jan 2018 07:02:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=MOEP6/Yl; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id CFC492238B584; Thu, 18 Jan 2018 06:57:06 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::244; helo=mail-pf0-x244.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x244.google.com (mail-pf0-x244.google.com [IPv6:2607:f8b0:400e:c00::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 233EC2238B582 for ; Thu, 18 Jan 2018 06:57:05 -0800 (PST) Received: by mail-pf0-x244.google.com with SMTP id b25so8497606pfd.9 for ; Thu, 18 Jan 2018 07:02:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tVhNRW/HU/+F8k69pRqO0YBhRcrjUwVC90Z17TlAXgQ=; b=MOEP6/YlP6NC8zWJsCAnu5qoZNJ4uljwlfzD4tcva/EU7MUTwM/NNC3YM/ytyGd2g6 VexQvBiX3yZ6XOLP3FCe9ea1ZwsBZZxVkEbDAb6XJa25LpkaCmV4prArlAlCaHkvaf7b KSKHMsqi6if5SFGmACatbQk2Sbus3zD8sqP00= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=tVhNRW/HU/+F8k69pRqO0YBhRcrjUwVC90Z17TlAXgQ=; b=nwj2Z2IKYpsTfjIqRoC/8rO1IAj4dY7p9IVvsk9tJ+XX4znZWWCQroNp4lXoPqFtUm wsVizwwgxev4ZNSHqB30EGD5ZPIIQt1e/Qznkp5kU6CRDystp9DNtxvl7Ixv5QFFSPVi hsamVqUn6ZG4Ou82aL2DGn0qBy2xedn5tKVPSakn0P25txCYZ4AeGYbcjxUSTRvlJQIT oOQSb8bV5Uo2IQxZMIl6IKE5F8QoD3sMiSkw1pOabh4pO7MF3W+sqLPilfVUEeRocZNJ JgpsxFW58FCLhDs8lGYL0TcCT3j8b7KxldiqAmOC+rn1T0kI+IknNYJ5EifSUuk3oy0M lg2w== X-Gm-Message-State: AKGB3mJfBsMmK7olELr98kuPj+2G/DAcqqSJ4NqybO1hvAVxn1JqC2Ns /f+jLijJxTJinYEqVESNGBqysw== X-Received: by 10.99.94.193 with SMTP id s184mr37142167pgb.311.1516287746586; Thu, 18 Jan 2018 07:02:26 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j14sm13621815pfh.94.2018.01.18.07.02.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Jan 2018 07:02:26 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:40 +0800 Message-Id: <1516287703-35516-12-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 11/14] Hisilicon/D05/ACPI: Add ITS PXM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add ITS affinity structure in SRAT. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc | 10 ++++++++++ Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 10 +++++++++- 2 files changed, 19 insertions(+), 1 deletion(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Ard Biesheuvel diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc index b448a29..8ea0c4b 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc @@ -121,6 +121,16 @@ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = { EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003E,0x00000001,0x00000000), //GICC Affinity Processor 62 EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003F,0x00000001,0x00000000) //GICC Affinity Processor 63 }, + { + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000000, 0x00000000), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000001, 0x00000001), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000000, 0x00000002), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000001, 0x00000003), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000002, 0x00000004), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000003, 0x00000005), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000002, 0x00000006), + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000003, 0x00000007) + }, }; // diff --git a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h index 60f9925..fd05a3b 100644 --- a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h +++ b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h @@ -39,6 +39,13 @@ ACPIProcessorUID, Flags, ClockDomain \ } +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT( \ + ProximityDomain, ItsId) \ + { \ + 4, sizeof (EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE), ProximityDomain, \ + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, ItsId \ + } + #define EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE_INIT( \ ProximityDomain, AddressBaseLow, AddressBaseHigh, LengthLow, LengthHigh, Flags) \ { \ @@ -70,12 +77,13 @@ // #define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT 64 #define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10 - +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8 typedef struct { EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header; EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT]; EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT]; + EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT]; } EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE; #pragma pack() From patchwork Thu Jan 18 15:01:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 124985 Delivered-To: patch@linaro.org Received: by 10.80.140.226 with SMTP id r31csp3637304edr; Thu, 18 Jan 2018 07:02:55 -0800 (PST) X-Google-Smtp-Source: ACJfBosJe6CcNKwoHczFEyHjP3pf+yx8NK02OZbk2nGD9alCTEuwwpWcGvwA19jXkVe5HWrypq3c X-Received: by 10.99.180.76 with SMTP id n12mr28107201pgu.8.1516287775797; Thu, 18 Jan 2018 07:02:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516287775; cv=none; d=google.com; s=arc-20160816; b=tYWnPc280rM7Rf8RcvaGhl3laNRUUbvmauwUVLk7ffD+pS0zgXPQiWG71pRzls0NZV 3MvmUR8d5y9ZEEziW5X4iZRiVBNaQH1mGfqwUfoQnOXJbMYZ38OlxP/Lw8BmjZ8pElKb pdMqpEgGlaMoTlPYQAt7q9ND57oNVio4wqZ/Yd2NhLk5KiVZR182mE8qDxGG7vmze0w9 BQdFTnRq8CZw4BTx29+W2A1Zy5nlz8TU+RKHA/j/tUmZA0s0qxSvIqGb043+X6hJovcq ocUjIWB7x/NsXVs/ckscDxzL8h7kTvpGd26ebfLejZ/bpzx9qlSOXhOxcrCaSCgSQQa6 PLjw== ARC-Message-Signature: i=1; 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[198.145.21.10]) by mx.google.com with ESMTPS id i1si6259718pgn.373.2018.01.18.07.02.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Jan 2018 07:02:55 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Qh0lTAno; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 42E802238B587; Thu, 18 Jan 2018 06:57:10 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c00::243; helo=mail-pf0-x243.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pf0-x243.google.com (mail-pf0-x243.google.com [IPv6:2607:f8b0:400e:c00::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 94D312238B582 for ; Thu, 18 Jan 2018 06:57:08 -0800 (PST) Received: by mail-pf0-x243.google.com with SMTP id e11so14777120pff.6 for ; Thu, 18 Jan 2018 07:02:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kHo7u4Gxmqt1/qgTlqRTGG/+iyqQ/9TooEshIYZ2Fjk=; b=Qh0lTAnozN6MsL8LQF6lUn5fe7vKr6hMdvpZ0HVV1ink28gY/Z/1WLvFrqAry98GRU p43NCFN2VA6tZSBuwoNsY9xr8l6BuxuK/3FiB/+dgBnQGrqWGgL6e95ZW2pmzFxwQEXJ RD8/PyAsj0dCvVOw24WXOwKkXq7egiIbBA5o8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kHo7u4Gxmqt1/qgTlqRTGG/+iyqQ/9TooEshIYZ2Fjk=; b=GjjtNMqisEe9nYBEghD671v+PZFs+aKJmkcEUDgcZkrfjyiNGxkagJ1uLwTj6I6ug5 t2MhdJVBB61HTYW36iq+WsDvkMrLbVvzp0aO9kjhSbM0snqqqwkxoDeeo4s0oiyCLKLj KQyP1t3lvjmM8XzB70jnf+WJmDbx0JLhcsqbHGLOWix2P95cmMgRZRmDCVj3vgIm6J+W A1sjZYQO4S25QVgMYsz6GTt51zaQxibOAAqpXyLym3igVSY2KUq9Z1/R6lGiv8XAv77D 45zDWGUGbQW6i6CucLJKwBb9YlnSsXKHlN8yrdnJIoBfgXbfZkd0NCn6+QqwLILnulRf K1zQ== X-Gm-Message-State: AKwxyteYEcnoBb6qkkaOiJjdSwax6hwv1QQjW60Rgby22TYzkNZILPRX 8awXGureus10pd/6ZBIUL/t6cg== X-Received: by 10.99.189.18 with SMTP id a18mr728136pgf.212.1516287749418; Thu, 18 Jan 2018 07:02:29 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j14sm13621815pfh.94.2018.01.18.07.02.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Jan 2018 07:02:28 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:41 +0800 Message-Id: <1516287703-35516-13-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 12/14] Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add PXM method for Pcie device, HNS device and SAS device. Add STA method for HNS. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: hensonwang Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl | 9 ++++++ Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 34 ++++++++++++++++++-- Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 19 +++++++++-- 3 files changed, 57 insertions(+), 5 deletions(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Ard Biesheuvel diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl index 11c28ba..7aa04af 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl @@ -233,6 +233,15 @@ Scope(_SB) } }) + Method (_PXM, 0, NotSerialized) + { + Return(0x00) + } + Method (_STA, 0, NotSerialized) + { + Return(0x0F) + } + //reset XGE port //Arg0 : XGE port index in dsaf //Arg1 : 0 reset, 1 cancle reset diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl index 55c7f50..122e4f0 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl @@ -141,7 +141,10 @@ Scope(_SB) { Return (0xf) } - + Method (_PXM, 0, NotSerialized) + { + Return(0x00) + } } // Device(PCI2) Device (RES2) @@ -240,7 +243,10 @@ Scope(_SB) { Return (RBYV()) } - + Method (_PXM, 0, NotSerialized) + { + Return(0x01) + } } // Device(PCI4) Device (RES4) { @@ -338,6 +344,10 @@ Scope(_SB) { Return (RBYV()) } + Method (_PXM, 0, NotSerialized) + { + Return(0x01) + } } // Device(PCI5) Device (RES5) { @@ -435,6 +445,10 @@ Scope(_SB) { Return (RBYV()) } + Method (_PXM, 0, NotSerialized) + { + Return(0x01) + } } // Device(PCI6) Device (RES6) { @@ -531,6 +545,10 @@ Scope(_SB) { Return (RBYV()) } + Method (_PXM, 0, NotSerialized) + { + Return(0x01) + } } // Device(PCI7) Device (RES7) { @@ -690,6 +708,10 @@ Scope(_SB) { Return (0xf) } + Method (_PXM, 0, NotSerialized) + { + Return(0x02) + } } // Device(PCIa) Device (RESa) { @@ -810,6 +832,10 @@ Scope(_SB) { Return (RBYV()) } + Method (_PXM, 0, NotSerialized) + { + Return(0x03) + } } // Device(PCIc) Device (RESc) @@ -907,6 +933,10 @@ Scope(_SB) { Return (RBYV()) } + Method (_PXM, 0, NotSerialized) + { + Return(0x03) + } } // Device(PCId) Device (RESd) { diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl index 6455130..d5b7e2f 100644 --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl @@ -88,7 +88,10 @@ Scope(_SB) Store(0x7ffff, CLK) Sleep(1) } - + Method (_PXM, 0, NotSerialized) + { + Return(0x00) + } Method (_STA, 0, NotSerialized) { Return (0x0) @@ -169,8 +172,15 @@ Scope(_SB) Store(0x7ffff, CLK) Sleep(1) } + Method (_PXM, 0, NotSerialized) + { + Return(0x00) + } + Method (_STA, 0, NotSerialized) + { + Return(0x0F) + } } - Device(SAS2) { Name(_HID, "HISI0162") Name(_CCA, 1) @@ -244,7 +254,10 @@ Scope(_SB) Store(0x7ffff, CLK) Sleep(1) } - + Method (_PXM, 0, NotSerialized) + { + Return(0x00) + } Method (_STA, 0, NotSerialized) { Return (0x0) From patchwork Thu Jan 18 15:01:42 2018 Content-Type: text/plain; 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Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D03/D03.dsc | 1 + Platform/Hisilicon/D05/D05.dsc | 1 + Silicon/Hisilicon/Include/Library/OsBootLib.h | 47 ++ Silicon/Hisilicon/Library/OsBootLib/OsBoot.h | 124 +++++ Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c | 217 +++++++++ Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf | 59 +++ Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c | 514 ++++++++++++++++++++ Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 6 + Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 1 + 9 files changed, 970 insertions(+) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 88c08dd..6f1164e 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -47,6 +47,7 @@ UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf + OsBootLib|Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 79890ef..52ffad5 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -55,6 +55,7 @@ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf + OsBootLib|Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf !if $(NETWORK_IP6_ENABLE) == TRUE TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf diff --git a/Silicon/Hisilicon/Include/Library/OsBootLib.h b/Silicon/Hisilicon/Include/Library/OsBootLib.h new file mode 100644 index 0000000..f5cbc4a --- /dev/null +++ b/Silicon/Hisilicon/Include/Library/OsBootLib.h @@ -0,0 +1,47 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef _OS_BOOT_LIB_H_ +#define _OS_BOOT_LIB_H_ + + +/** + Remove invalid OS boot options, and then add new ones. + +*/ +EFI_STATUS +AdjustOsBootOrder ( + VOID + ); + +/** + Try to find UEFI OSs and create the boot options which haven't been listed in BootOrder. + +*/ +EFI_STATUS +CreateOsBootOptions ( + VOID + ); + +/** + Remove UEFI OS boot options when it is disappeared in system. + +*/ +EFI_STATUS +RemoveInvalidOsBootOptions ( + VOID + ); + +#endif diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBoot.h b/Silicon/Hisilicon/Library/OsBootLib/OsBoot.h new file mode 100644 index 0000000..1991471 --- /dev/null +++ b/Silicon/Hisilicon/Library/OsBootLib/OsBoot.h @@ -0,0 +1,124 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef _OS_BOOT_H_ +#define _OS_BOOT_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + + +typedef struct { + CHAR16 *FilePathString; + CHAR16 *Description; + }UEFI_OS_BOOT_FILE; + +/** + Check same boot option by device path. + +*/ +BOOLEAN +BeHaveSameBootOptionByDP ( + EFI_DEVICE_PATH_PROTOCOL *DevicePath, + CHAR16 *FileName + ); + +/** + Remove UEFI OS boot options when it is disappeared in system. + +*/ +EFI_STATUS +RemoveInvalidOsBootOptions ( + VOID + ); + + +/** + Check Os Boot Option if exist in current system. + +*/ +BOOLEAN +BeInvalidOsBootOption ( + EFI_DEVICE_PATH_PROTOCOL *OptionDp + ); + +/** + Get the headers (dos, image, optional header) from an image + + @param Device SimpleFileSystem device handle + @param FileName File name for the image + @param DosHeader Pointer to dos header + @param Hdr The buffer in which to return the PE32, PE32+, or TE header. + + @retval EFI_SUCCESS Successfully get the machine type. + @retval EFI_NOT_FOUND The file is not found. + @retval EFI_LOAD_ERROR File is not a valid image file. + +**/ +EFI_STATUS +EFIAPI +OsBootGetImageHeader ( + IN EFI_HANDLE Device, + IN CHAR16 *FileName, + OUT EFI_IMAGE_DOS_HEADER *DosHeader, + OUT EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr + ); + +UINTN +GetOptionPositionWithoutGpt ( + VOID + ); + +VOID +PrintDevicePath ( + CHAR16 *PreStr, + EFI_DEVICE_PATH_PROTOCOL *Path + ); + +VOID +RemoveSuperfluousOption ( + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions, + UINT16 *OptionFlags, + UINTN BootOptionCount + ); + +BOOLEAN +IsOptionAddedByOsBootLib ( + UINT16 *OptionDescription + ); + +#endif diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c new file mode 100644 index 0000000..29b6b62 --- /dev/null +++ b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c @@ -0,0 +1,217 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include "OsBoot.h" + +UEFI_OS_BOOT_FILE mUefiOsBootFiles[] = { + {EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64, L"Uefi Default Boot"}, + {L"\\BOOT\\EFI\\EFI\\CENTOS\\grubaa64.efi", L"Uefi CENTOS Boot"}, + {L"\\EFI\\centos\\grubaa64.efi", L"Uefi CentOS Grub Boot"}, + {L"\\EFI\\debian\\grubaa64.efi", L"Uefi Debian Grub Boot"}, + {L"\\EFI\\GRUB2\\GRUBAA64.EFI", L"Hisilicon Linux Boot"}, + {L"\\EFI\\Microsoft\\Boot\\bootmgfw.efi", L"Uefi Windows Boot"}, + {L"\\EFI\\redhat\\grub.efi", L"Uefi Redhat Boot"}, + {L"\\EFI\\SuSE\\elilo.efi", L"Uefi SuSE Boot"}, + {L"\\EFI\\ubuntu\\grubaa64.efi", L"Uefi Ubuntu Grub Boot"}, + {L"\\EFI\\ubuntu\\shimx64.efi", L"Uefi Ubuntu Shimx64 Boot"}, + {L"\\EFI\\ubuntu\\grubx64.efi", L"Uefi Ubuntu Grubx64 Boot"}, + {L"\\EFI\\ubuntu\\shim.efi", L"Uefi Ubuntu Shim Boot"}, + {L"\\EFI\\ubuntu\\grub.efi", L"Uefi Ubuntu Grub Boot"}, + {L"\\EFI\\fedora\\shim.efi", L"Uefi Fedora Shim Boot"} +}; + +BOOLEAN +IsOptionAddedByOsBootLib ( + UINT16 *OptionDescription + ) +{ + UINTN Index; + + for (Index = 0; Index < (sizeof (mUefiOsBootFiles) / sizeof (UEFI_OS_BOOT_FILE)); Index++) { + if (StrCmp (mUefiOsBootFiles[Index].Description, OptionDescription) == 0) { + return TRUE; + } + } + + return FALSE; +} + +/** + Remove invalid OS boot options, and then add new ones. + +*/ +EFI_STATUS +AdjustOsBootOrder ( + VOID + ) +{ + EFI_STATUS Status; + + Status = RemoveInvalidOsBootOptions (); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = CreateOsBootOptions (); + return Status; +} + + +/** + Remove UEFI OS boot options when it is disappeared in system. + +*/ +EFI_STATUS +RemoveInvalidOsBootOptions ( + VOID + ) +{ + EFI_STATUS Status; + UINTN Index; + UINT16 *OptionDelFlags; + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions; + UINTN BootOptionCount; + + BootOptions = EfiBootManagerGetLoadOptions (&BootOptionCount, LoadOptionTypeBoot); + OptionDelFlags = AllocateZeroPool (BootOptionCount * sizeof(UINT16)); + if (OptionDelFlags == NULL) { + goto exit; + } + + for (Index = 0; Index < BootOptionCount; Index++) { + if (OptionDelFlags[Index] == 0) { + if (BeInvalidOsBootOption (BootOptions[Index].FilePath)) { + Status = EfiBootManagerDeleteLoadOptionVariable (BootOptions[Index].OptionNumber, LoadOptionTypeBoot); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "DeleteLoadOptionVariable: %r\n", Status)); + continue; + } + PrintDevicePath (L"Del Option,", BootOptions[Index].FilePath); + } else { + RemoveSuperfluousOption (&BootOptions[Index], OptionDelFlags, BootOptionCount - Index); + } + } + } + + exit: + if (OptionDelFlags != NULL) { + FreePool (OptionDelFlags); + } + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount); + + return EFI_SUCCESS; +} + + +/** + Try to find UEFI OSs and create the boot options which haven't been listed in BootOrder. + +*/ +EFI_STATUS +CreateOsBootOptions ( + VOID + ) +{ + EFI_STATUS Status; + EFI_HANDLE *FileSystemHandles; + UINTN NumberFileSystemHandles; + UINTN Index, Count; + EFI_DEVICE_PATH_PROTOCOL *OsFileDP; + EFI_BLOCK_IO_PROTOCOL *BlkIo; + UINTN MaxFiles; + EFI_IMAGE_OPTIONAL_HEADER_UNION HdrData; + EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr; + EFI_IMAGE_DOS_HEADER DosHeader; + EFI_BOOT_MANAGER_LOAD_OPTION NewOption; + + // + //Look for file system to find default Os boot load. + // + Status = gBS->LocateHandleBuffer ( + ByProtocol, + &gEfiSimpleFileSystemProtocolGuid, + NULL, + &NumberFileSystemHandles, + &FileSystemHandles + ); + if (EFI_ERROR (Status)) { + return Status; + } + + MaxFiles = sizeof (mUefiOsBootFiles) / sizeof (UEFI_OS_BOOT_FILE); + for (Index = 0; Index < NumberFileSystemHandles; Index++) { + Status = gBS->HandleProtocol ( + FileSystemHandles[Index], + &gEfiBlockIoProtocolGuid, + (VOID **) &BlkIo + ); + if (EFI_ERROR (Status)) { + continue; + } + + Hdr.Union = &HdrData; + for (Count = 0; Count < MaxFiles; Count++) { + // + //Read Boot File Path to check validation. + // + Status = OsBootGetImageHeader ( + FileSystemHandles[Index], + mUefiOsBootFiles[Count].FilePathString, + &DosHeader, + Hdr + ); + if (!EFI_ERROR (Status) && + EFI_IMAGE_MACHINE_TYPE_SUPPORTED (Hdr.Pe32->FileHeader.Machine) && + Hdr.Pe32->OptionalHeader.Subsystem == EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION) { + + OsFileDP = NULL; + OsFileDP = FileDevicePath (FileSystemHandles[Index], mUefiOsBootFiles[Count].FilePathString); + PrintDevicePath (L"Exist", OsFileDP); + if (!BeHaveSameBootOptionByDP (OsFileDP, mUefiOsBootFiles[Count].FilePathString)) { + // + // Create new BootOption if it is not present. + // + DEBUG ((DEBUG_INFO, "CreateOsBootOptions (), Make New Boot Option :%s.\n", mUefiOsBootFiles[Count].Description)); + Status = EfiBootManagerInitializeLoadOption ( + &NewOption, + LoadOptionNumberUnassigned, + LoadOptionTypeBoot, + LOAD_OPTION_ACTIVE, + mUefiOsBootFiles[Count].Description, + OsFileDP, + NULL, + 0 + ); + ASSERT_EFI_ERROR (Status); + Status = EfiBootManagerAddLoadOptionVariable (&NewOption, GetOptionPositionWithoutGpt ()); + ASSERT_EFI_ERROR (Status); + EfiBootManagerFreeLoadOption (&NewOption); + } + + if(OsFileDP != NULL) { + FreePool (OsFileDP); + OsFileDP = NULL; + } + } + } + } + + if (NumberFileSystemHandles != 0) { + FreePool (FileSystemHandles); + } + + return EFI_SUCCESS; +} + diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf new file mode 100644 index 0000000..12e6d49 --- /dev/null +++ b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf @@ -0,0 +1,59 @@ +## @file +# Manager Os Boot option. +# Copyright (c) 2017, Hisilicon Limited. All rights reserved. +# Copyright (c) 2017, Linaro Limited. All rights reserved. +# +# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = OsBootLib + FILE_GUID = e406c654-ccde-4d32-8362-0aec01725139 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = OsBootLib + +[Sources] + OsBootLib.c + OsBootLibMisc.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + Silicon/Hisilicon/HisiPkg.dec + +[LibraryClasses] + BaseMemoryLib + BaseLib + DxeServicesLib + DebugLib + DxeServicesTableLib + DevicePathLib + MemoryAllocationLib + PrintLib + UefiRuntimeServicesTableLib + UefiLib + UefiBootServicesTableLib + UefiBootManagerLib + +[Guids] + gEfiGlobalVariableGuid + gEfiFileInfoGuid ## SOMETIMES_CONSUMES ## GUID + +[Protocols] + gEfiSimpleFileSystemProtocolGuid ## SOMETIMES_CONSUMES + gEfiBlockIoProtocolGuid ## SOMETIMES_CONSUMES + gEfiFirmwareVolume2ProtocolGuid ## SOMETIMES_CONSUMES + gEfiDevicePathProtocolGuid ## CONSUMES + gEfiDevicePathToTextProtocolGuid + +[Pcd] diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c b/Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c new file mode 100644 index 0000000..4e6d895 --- /dev/null +++ b/Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c @@ -0,0 +1,514 @@ +/** @file +* +* Copyright (c) 2017, Hisilicon Limited. All rights reserved. +* Copyright (c) 2017, Linaro Limited. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include "OsBoot.h" + +extern UEFI_OS_BOOT_FILE mUefiOsBootFiles[]; + +/** + Read file the headers of dos, image, optional header. + + @param Device SimpleFileSystem device handle + @param FileSize File size + @param DosHeader Pointer to dos header + @param Hdr The buffer in which to return the PE32, PE32+, or TE header. + + @retval EFI_SUCCESS Successfully get the File. + @retval EFI_LOAD_ERROR File is not a valid image file. + +**/ +EFI_STATUS +ReadDosHeader ( + EFI_FILE_HANDLE ThisFile, + UINT64 FileSize, + EFI_IMAGE_DOS_HEADER *DosHeader, + EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION *Hdr + ) +{ + EFI_STATUS Status; + UINTN BufferSize; + // + // Read dos header + // + BufferSize = sizeof (EFI_IMAGE_DOS_HEADER); + Status = ThisFile->Read (ThisFile, &BufferSize, DosHeader); + if (EFI_ERROR (Status) || + BufferSize < sizeof (EFI_IMAGE_DOS_HEADER) || + FileSize <= DosHeader->e_lfanew || + DosHeader->e_magic != EFI_IMAGE_DOS_SIGNATURE) { + Status = EFI_LOAD_ERROR; + DEBUG ((DEBUG_ERROR, "%a(%d):error!\n", __FUNCTION__,__LINE__)); + goto ErrReadDos; + } + + // + // Move to PE signature + // + Status = ThisFile->SetPosition (ThisFile, DosHeader->e_lfanew); + if (EFI_ERROR (Status)) { + Status = EFI_LOAD_ERROR; + DEBUG((DEBUG_ERROR, "%a(%d):error!\n", __FUNCTION__,__LINE__)); + goto ErrReadDos; + } + + // + // Read and check PE signature + // + BufferSize = sizeof (EFI_IMAGE_OPTIONAL_HEADER_UNION); + Status = ThisFile->Read (ThisFile, &BufferSize, (VOID*)(Hdr->Pe32)); + if (EFI_ERROR (Status) || + BufferSize < sizeof (EFI_IMAGE_OPTIONAL_HEADER_UNION) || + Hdr->Pe32->Signature != EFI_IMAGE_NT_SIGNATURE) { + Status = EFI_LOAD_ERROR; + DEBUG((DEBUG_ERROR, "%a(%d):error!\n", __FUNCTION__,__LINE__)); + goto ErrReadDos; + } + +ErrReadDos: + return Status; +} + +/** + Get the headers (dos, image, optional header) from an image + + @param Device SimpleFileSystem device handle + @param FileName File name for the image + @param DosHeader Pointer to dos header + @param Hdr The buffer in which to return the PE32, PE32+, or TE header. + + @retval EFI_SUCCESS Successfully get the machine type. + @retval EFI_NOT_FOUND The file is not found. + @retval EFI_LOAD_ERROR File is not a valid image file. + +**/ +EFI_STATUS +EFIAPI +OsBootGetImageHeader ( + IN EFI_HANDLE Device, + IN CHAR16 *FileName, + OUT EFI_IMAGE_DOS_HEADER *DosHeader, + OUT EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr + ) +{ + EFI_STATUS Status; + EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *Volume; + EFI_FILE_HANDLE Root; + EFI_FILE_HANDLE ThisFile; + UINTN BufferSize; + UINT64 FileSize; + EFI_FILE_INFO *Info; + BOOLEAN Condition = TRUE;//pclint + + Root = NULL; + ThisFile = NULL; + // + // Handle the file system interface to the device + // + Status = gBS->HandleProtocol ( + Device, + &gEfiSimpleFileSystemProtocolGuid, + (VOID *) &Volume + ); + if (EFI_ERROR (Status)) { + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status)); + goto Done; + } + + Status = Volume->OpenVolume ( + Volume, + &Root + ); + if (EFI_ERROR (Status)) { + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status)); + Root = NULL; + goto Done; + } + + if (Root == NULL) { + Status = EFI_LOAD_ERROR; + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status)); + goto Done; + } + Status = Root->Open (Root, &ThisFile, FileName, EFI_FILE_MODE_READ, 0); + if (EFI_ERROR (Status)) { + DEBUG((DEBUG_ERROR, "%a(%d):file not found ret :%r !\n", __FUNCTION__,__LINE__,Status)); + goto Done; + } + + if (ThisFile == NULL) { + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status)); + Status = EFI_LOAD_ERROR; + goto Done; + } + // + // Get file size + // + BufferSize = SIZE_OF_EFI_FILE_INFO + 200; + do { + Info = NULL; + Status = gBS->AllocatePool (EfiBootServicesData, BufferSize, (VOID **) &Info); + if (EFI_ERROR (Status)) { + goto Done; + } + Status = ThisFile->GetInfo ( + ThisFile, + &gEfiFileInfoGuid, + &BufferSize, + Info + ); + if (!EFI_ERROR (Status)) { + break; + } + if (Status != EFI_BUFFER_TOO_SMALL) { + FreePool (Info); + goto Done; + } + FreePool (Info); + } while (Condition); + + FileSize = Info->FileSize; + FreePool (Info); + + Status = ReadDosHeader(ThisFile, FileSize, DosHeader, &Hdr); + if (EFI_ERROR (Status)) { + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status)); + goto Done; + } + // + // Check PE32 or PE32+ magic + // + if (Hdr.Pe32->OptionalHeader.Magic != EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC && + Hdr.Pe32->OptionalHeader.Magic != EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC) { + Status = EFI_LOAD_ERROR; + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status)); + goto Done; + } + + Done: + if (ThisFile != NULL) { + ThisFile->Close (ThisFile); + } + if (Root != NULL) { + Root->Close (Root); + } + return Status; +} + + +VOID +PrintDevicePath ( + CHAR16 *PreStr, + EFI_DEVICE_PATH_PROTOCOL *Path + ) +{ + CHAR16 *DevicePathTxt; + EFI_STATUS Status; + EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevicePathToTextProtocol; + + DevicePathTxt = NULL; + Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **)&DevicePathToTextProtocol); + if (!EFI_ERROR (Status)) { + DevicePathTxt = DevicePathToTextProtocol->ConvertDevicePathToText (Path, FALSE, TRUE); + DEBUG ((DEBUG_ERROR, "%s DevPath:[%s]\n", PreStr, DevicePathTxt)); + } + + if (DevicePathTxt != NULL) { + FreePool (DevicePathTxt); + } + + return ; +} + +CHAR16 * +GetGptNodeText ( + EFI_DEVICE_PATH_PROTOCOL *Path + ) +{ + CHAR16 *NodeText; + + while (!IsDevicePathEnd (Path)) { + NodeText = ConvertDeviceNodeToText (Path, TRUE, TRUE); + if (StrStr (NodeText, L"GPT") != NULL) { + return NodeText; + } + + if (NodeText != NULL) { + FreePool (NodeText); + } + + Path = NextDevicePathNode (Path); + } + + return NULL; +} + +BOOLEAN +IsPartitionGuidEqual ( + EFI_DEVICE_PATH_PROTOCOL *OptionPath, + EFI_DEVICE_PATH_PROTOCOL *FilePath + ) +{ + CHAR16 *OptionGptText; + CHAR16 *FileGptText; + + OptionGptText = GetGptNodeText (OptionPath); + FileGptText = GetGptNodeText (FilePath); + if ((OptionGptText != NULL) && (FileGptText != NULL) && (StrCmp (OptionGptText, FileGptText) == 0)) { + return TRUE; + } + + if (OptionGptText != NULL) { + FreePool (OptionGptText); + } + if (FileGptText != NULL) { + FreePool (FileGptText); + } + + return FALSE; +} + +/* If a partition exist a valid grub, OsBootLib will create a Option after bios firmware upgraded, + * and then installing the same OS on the same partition will create anothor Option. the two Options + * are superfluous, the Option added by OsBootLib should be remove. + * + * It's allowed of creating several Option in the same GPT by installing OS. + */ +VOID +RemoveSuperfluousOption ( + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions, + UINT16 *OptionDelFlags, + UINTN BootOptionCount + ) +{ + EFI_STATUS Status; + UINTN Index; + + for (Index = 1; Index < BootOptionCount; Index++) { + if (OptionDelFlags[Index] == 0) { + if ((IsPartitionGuidEqual (BootOptions[0].FilePath, BootOptions[Index].FilePath)) && + (IsOptionAddedByOsBootLib (BootOptions[Index].Description))) { + OptionDelFlags[Index] = 1; + + Status = EfiBootManagerDeleteLoadOptionVariable (BootOptions[Index].OptionNumber, LoadOptionTypeBoot); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "DeleteLoadOptionVariable: %r\n", Status)); + continue; + } + + PrintDevicePath (L"Del Option(du),", BootOptions[Index].FilePath); + } + } + } + + return; +} + +UINTN +GetOptionPositionWithoutGpt ( + VOID + ) +{ + UINTN Index; + UINTN BootOptionCount; + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions; + + BootOptions = EfiBootManagerGetLoadOptions ( + &BootOptionCount, LoadOptionTypeBoot + ); + for (Index = 0; Index < BootOptionCount; Index++) { + if (GetGptNodeText (BootOptions[Index].FilePath) == NULL) { + return Index; + } + } + + return 0; +} + +CHAR16 * +GetFileTextByDevicePath ( + EFI_DEVICE_PATH_PROTOCOL *DevicePath + ) +{ + CHAR16 *FileString; + + FileString = NULL; + + while (!IsDevicePathEnd (DevicePath)) { + if (MEDIA_DEVICE_PATH == DevicePathType (DevicePath) && + MEDIA_FILEPATH_DP == DevicePathSubType (DevicePath)) { + FileString = ConvertDeviceNodeToText (DevicePath, TRUE, TRUE); + break; + } + DevicePath = NextDevicePathNode (DevicePath); + } + + return FileString; +} + + +/** + Check same boot option by device path. + +*/ +BOOLEAN +BeHaveSameBootOptionByDP ( + EFI_DEVICE_PATH_PROTOCOL *DevicePath, + CHAR16 *FileName + ) +{ + UINTN Index; + UINTN ValidPathSize; + BOOLEAN Found; + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions; + UINTN BootOptionCount; + + if (NULL == DevicePath) { + return FALSE; + } + + BootOptions = EfiBootManagerGetLoadOptions (&BootOptionCount, LoadOptionTypeBoot); + + Found = FALSE; + for (Index = 0; Index < BootOptionCount; Index++) { + /* If a partition exist a valid Option, then the new Option should not be added. + * After installation, some iso will create several valid grub file, like + * \EFI\centos\shimaa64.efi, \EFI\BOOT\BOOTAA64.EFI. + */ + if(IsPartitionGuidEqual (BootOptions[Index].FilePath, DevicePath)) { + DEBUG ((DEBUG_ERROR, "Get the same Option(GPT).\n")); + Found = TRUE; + break; + } + + /* If DevicePath of new Option is matched in exist Option and file name of + * new Option is EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64, then the new Option should be ignored. + */ + ValidPathSize = GetDevicePathSize (BootOptions[Index].FilePath) - END_DEVICE_PATH_LENGTH; + if ((CompareMem (BootOptions[Index].FilePath, DevicePath, ValidPathSize) == 0) && + (StrCmp (FileName, EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64) == 0)) + { + DEBUG ((DEBUG_ERROR, "Get the same Option.\n")); + Found = TRUE; + break; + } + } + + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount); + + return Found; +} + +/** + Check Os Boot Option if exist in current system. + +*/ +BOOLEAN +BeInvalidOsBootOption ( + EFI_DEVICE_PATH_PROTOCOL *OptionDp + ) +{ + EFI_STATUS Status; + EFI_HANDLE *FileSystemHandles; + UINTN NumberFileSystemHandles; + UINTN Index; + EFI_DEVICE_PATH_PROTOCOL *FileSystemDP; + UINTN OptionDpSize; + EFI_BLOCK_IO_PROTOCOL *BlkIo; + EFI_IMAGE_OPTIONAL_HEADER_UNION HdrData; + EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr; + EFI_IMAGE_DOS_HEADER DosHeader; + BOOLEAN Invalid; + EFI_DEVICE_PATH_PROTOCOL* DevicePathNode; + CHAR16 *FileString; + + Invalid = TRUE; + if (NULL == OptionDp) { + return FALSE; + } + + OptionDpSize = GetDevicePathSize (OptionDp); + if (OptionDpSize == 0) { + return FALSE; + } + + // + // Os BootOption should be File Device Path. + // + DevicePathNode = OptionDp; + FileString = GetFileTextByDevicePath (DevicePathNode); + if (FileString == NULL) { + return FALSE; + } + + // + // File should be exsiting in system. + // + Status = gBS->LocateHandleBuffer ( + ByProtocol, + &gEfiSimpleFileSystemProtocolGuid, + NULL, + &NumberFileSystemHandles, + &FileSystemHandles + ); + if (EFI_ERROR (Status)) { + FreePool (FileString); + return FALSE; + } + + for (Index = 0; Index < NumberFileSystemHandles; Index++) { + Status = gBS->HandleProtocol ( + FileSystemHandles[Index], + &gEfiBlockIoProtocolGuid, + (VOID **) &BlkIo + ); + if (EFI_ERROR (Status)) { + continue; + } + + FileSystemDP = FileDevicePath (FileSystemHandles[Index], FileString); + /* If Partition is existed and the grub file is existed, then the Option is valid. */ + if ((CompareMem ((VOID *) OptionDp, (VOID *) FileSystemDP, OptionDpSize) == 0) || + (IsPartitionGuidEqual (OptionDp, FileSystemDP))) { + Hdr.Union = &HdrData; + Status = OsBootGetImageHeader ( + FileSystemHandles[Index], + FileString, + &DosHeader, + Hdr + ); + if (!EFI_ERROR (Status) && + EFI_IMAGE_MACHINE_TYPE_SUPPORTED (Hdr.Pe32->FileHeader.Machine) && + Hdr.Pe32->OptionalHeader.Subsystem == EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION) { + DEBUG ((DEBUG_ERROR, "BeValidOsBootOption (),Get Bootable file :%s.\n", FileString)); + Invalid = FALSE; + break; + } + } + + if (FileSystemDP != NULL) { + FreePool (FileSystemDP); + } + } + + if (NumberFileSystemHandles != 0) { + FreePool (FileSystemHandles); + } + if (FileString != NULL) { + FreePool (FileString); + } + + return Invalid; +} + diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c index 845519f..1c6e8bf 100644 --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -576,6 +577,11 @@ PlatformBootManagerAfterConsole ( PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE ); + Status = AdjustOsBootOrder (); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a:%r\n", __FUNCTION__, Status)); + } + HandleBmcBootType (); } diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf index 7b151a9..a6d597d 100644 --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf @@ -49,6 +49,7 @@ DevicePathLib DxeServicesLib MemoryAllocationLib + OsBootLib PcdLib PrintLib UefiBootManagerLib From patchwork Thu Jan 18 15:01:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 124987 Delivered-To: patch@linaro.org Received: by 10.80.140.226 with SMTP id r31csp3637711edr; Thu, 18 Jan 2018 07:03:11 -0800 (PST) X-Google-Smtp-Source: ACJfBotf0B04ooVZb3c4vmZsQkUW1g1rS0KdspS2oyjBUlWmY6pTGAKu7FO2EgB7uJLWcVIyIxnq X-Received: by 10.99.126.24 with SMTP id z24mr25243941pgc.143.1516287791166; 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[2001:19d0:306:5::1]) by mx.google.com with ESMTPS id f3si3218459pgp.442.2018.01.18.07.03.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Jan 2018 07:03:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=KJWF3/J7; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 409E12238B590; Thu, 18 Jan 2018 06:57:15 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:400e:c05::243; helo=mail-pg0-x243.google.com; envelope-from=heyi.guo@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg0-x243.google.com (mail-pg0-x243.google.com [IPv6:2607:f8b0:400e:c05::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A9B752238B58B for ; Thu, 18 Jan 2018 06:57:13 -0800 (PST) Received: by mail-pg0-x243.google.com with SMTP id q67so14421503pga.9 for ; Thu, 18 Jan 2018 07:02:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Q2D1MJqJ4Hss2Lwe55CTD7+OSfFBEb6rAVqKd91P14k=; b=KJWF3/J7TUcv2OPfHCtdgn6PBN5gOEphEPjP0FknVeWlNwc+fxNqK9xRXeokt0zicc QDzEeZ2YeRtXnEK3GrOv59r7/BvsLdW7NmGuZFqQzpXmfvs3ztQOLUnz9D+KWkqbAlxk DZZrlrvWATnn6WGZ4enAuzbqD5zl81P6A4lJc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Q2D1MJqJ4Hss2Lwe55CTD7+OSfFBEb6rAVqKd91P14k=; b=ebMDWQxxgnI/HjqlwLK3xhZsuXOhjfUWnJOFVoSGf3jbVQuSqJCy1krZ9u2TJDKyH9 AdBb6lKAinb4HIWrNB9EMrXHimBtI2Dw3KZtHn8i3Urlw6LD+IYBPHIvc7Vtd562Ocge 9saQ9cvTSCwIptTK31kXddohakUCKpjBbK5Pof8NTZFKwFoGUW+FC4HrfLL2o53sKsCc d9mpB5p92JD1NKctUs9TAGxwp+21rP+P2pOK85ph+vXEHYCUGWesK8gNZz1G7nrJy9Q6 kiK85UsFuGXgbeXLRunv0QTbitol/q1CO4mnmcnK6h8Ze3Lte5sCSr32n8mfywz81nBH nS1Q== X-Gm-Message-State: AKwxytfTk/sECV/tie3vfpWqROwFmBlfZfH3wAMkGtvfUUAgRQUCYWMl qa4V9B0TwoB+izNj7UMhAmG4Sg== X-Received: by 10.98.0.5 with SMTP id 5mr29754415pfa.202.1516287755153; Thu, 18 Jan 2018 07:02:35 -0800 (PST) Received: from localhost.localdomain ([120.31.149.194]) by smtp.gmail.com with ESMTPSA id j14sm13621815pfh.94.2018.01.18.07.02.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Jan 2018 07:02:34 -0800 (PST) From: Ming Huang X-Google-Original-From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Thu, 18 Jan 2018 23:01:43 +0800 Message-Id: <1516287703-35516-15-git-send-email-huangming23@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1516287703-35516-1-git-send-email-huangming23@huawei.com> References: <1516287703-35516-1-git-send-email-huangming23@huawei.com> Subject: [edk2] [PATCH edk2-platforms v1 14/14] Hisilicon D03/D05: Update firmware version to 18.02 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, ard.biesheuvel@linaro.org, zhangjinsong2@huawei.com, Heyi Guo , wanghuiqiang@huawei.com, guoheyi@huawei.com, waip23@126.com, mengfanrong@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Replace the old string with short one. The old one is too long that can not be show integrallty in Setup nemu. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ming Huang Signed-off-by: Heyi Guo --- Platform/Hisilicon/D03/D03.dsc | 2 +- Platform/Hisilicon/D05/D05.dsc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Ard Biesheuvel diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc index 6f1164e..b6b8086 100644 --- a/Platform/Hisilicon/D03/D03.dsc +++ b/Platform/Hisilicon/D03/D03.dsc @@ -171,7 +171,7 @@ !ifdef $(FIRMWARE_VER) gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)" !else - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D03 UEFI 17.10 Release" + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02 for Hisilicon D03" !endif gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18" diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc index 52ffad5..a599c08 100644 --- a/Platform/Hisilicon/D05/D05.dsc +++ b/Platform/Hisilicon/D05/D05.dsc @@ -190,7 +190,7 @@ !ifdef $(FIRMWARE_VER) gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)" !else - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D05 UEFI 17.10 Release" + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02 for Hisilicon D05" !endif gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"