From patchwork Tue Dec 1 00:25:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Agner X-Patchwork-Id: 335287 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D0AAC63777 for ; Tue, 1 Dec 2020 00:26:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 162EF20809 for ; Tue, 1 Dec 2020 00:26:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=agner.ch header.i=@agner.ch header.b="boTNXx86" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728371AbgLAA0f (ORCPT ); Mon, 30 Nov 2020 19:26:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726316AbgLAA0e (ORCPT ); Mon, 30 Nov 2020 19:26:34 -0500 Received: from mail.kmu-office.ch (mail.kmu-office.ch [IPv6:2a02:418:6a02::a2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 08A01C0613CF; Mon, 30 Nov 2020 16:25:54 -0800 (PST) Received: from allenwind.lan (unknown [IPv6:2a02:169:3df5::979]) by mail.kmu-office.ch (Postfix) with ESMTPSA id 475505C072A; Tue, 1 Dec 2020 01:25:51 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=agner.ch; s=dkim; t=1606782351; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type: content-transfer-encoding:content-transfer-encoding:in-reply-to: references; bh=KS8mEizFb71H5F58oXI23doUtIDgwBwc4nDVzFsr1GQ=; b=boTNXx86+d6LfiIEM/Jwsm9QLSOWO013Ncwju9egxzB+BRaSWkZqTjLi9Fh1sNb2ETgBsT H0oBiRa5+NeSOcjD2d9rx7S0V1ZgiJdinuou9bRoYsRjFog6biP6UO6f19Jd+QqzKKffwD JCKSWImKeQQyNK6G5k8RTxPDLLYNwY8= From: Stefan Agner To: robh+dt@kernel.org, khilman@baylibre.com Cc: narmstrong@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Stefan Agner Subject: [PATCH] arm64: dts: meson: fix PHY deassert timing requirements Date: Tue, 1 Dec 2020 01:25:50 +0100 Message-Id: X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org According to the datasheet (Rev. 1.4, page 30) the RTL8211F requires at least 50ms "for internal circuits settling time" before accessing the PHY registers. This fixes an issue where the Ethernet link doesn't come up when using ip link set down/up: [ 29.360965] meson8b-dwmac ff3f0000.ethernet eth0: Link is Down [ 34.569012] meson8b-dwmac ff3f0000.ethernet eth0: PHY [0.0:00] driver [RTL8211F Gigabit Ethernet] (irq=31) [ 34.676732] meson8b-dwmac ff3f0000.ethernet: Failed to reset the dma [ 34.678874] meson8b-dwmac ff3f0000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed [ 34.687850] meson8b-dwmac ff3f0000.ethernet eth0: stmmac_open: Hw setup failed Fixes: 658e4129bb81 ("arm64: dts: meson: g12b: odroid-n2: add the Ethernet PHY reset line") Signed-off-by: Stefan Agner --- arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi index 6982632ae646..a5652caacb27 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi @@ -413,7 +413,7 @@ external_phy: ethernet-phy@0 { max-speed = <1000>; reset-assert-us = <10000>; - reset-deassert-us = <30000>; + reset-deassert-us = <50000>; reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; interrupt-parent = <&gpio_intc>;