From patchwork Mon Jan 29 15:44:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 126172 Delivered-To: patch@linaro.org Received: by 10.46.84.92 with SMTP id y28csp2542504ljd; Mon, 29 Jan 2018 07:44:48 -0800 (PST) X-Google-Smtp-Source: AH8x227Y0OmRKclTytLrf8Q4EF2q82YQT7r1lpFixjsh16pLwX37TzLtek69yU0zHX0DMlu4eZjq X-Received: by 10.99.124.24 with SMTP id x24mr21577499pgc.351.1517240687996; Mon, 29 Jan 2018 07:44:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517240687; cv=none; d=google.com; s=arc-20160816; b=i2Z3upDsD/mcodF3h4/EeCVfxyv+/ET9L21MAoPNylCN6NbhvpDT7Ul9QmPI9MLRpa NuGDDj4gfhfSksh36IK3f6gFvhscMXs7eEJSglBdRgTG8yRPMH3kcavVQIk9HOqH7Mn5 Q+dfZ3AT4h5l6g7OR1UygAxx/Svglj5wAmHUszj7Wvf4LZOfmg4nl+E+fFBMnoWTTliN YQysPTaLhiDaM8Ig1DhQWbTJYch/qTID8VLUAb9EFDJjWOn+85sS+RV7KWE/gHZvt3kr P3173qKvFXehSsdj/Udp5lij9pkWW6JEkiew8L2K0KPeWRmNz4cy77Tlv5ZSlkkiFFdx sPIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=cPUngULWNHEqegNm7b7v/NaNcPH1wf3a4s+cchEacsE=; b=ezoK7+7gw/cGAUDIT26BTmq6YMPvreYIbNTcfWC/6cys6+N4k+t5cu4x4h0tg/FWN7 kJ22INQYU4fVjUNX+l44rO4wRWom14nGvqmXSAFMmg2/bybpBVf7Qa8KXBwkotPBA1+b zTr1jBoYk+NQh7KLJbRKFqcWCvnMMO4VpCyxyhB7MsZeqmWjkogfLHYenMHDtE39H9pV +RBUiilXe+qWm8wxDp3PnTirgCJVbpC10BdOr+Wb0NRQlU0isLJoViHl7A/qSZVj/GKy PAdyPvGGVsPnZaOke5okN0zgbi3eoB9mUOapvfLCahcKw+U4GZukT4NJtjZfEh3qvAPX 17Zg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Nb1Pf3LX; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id n71si4718597pfk.103.2018.01.29.07.44.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Jan 2018 07:44:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Nb1Pf3LX; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 7B57B2215BDBA; Mon, 29 Jan 2018 07:39:13 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::243; helo=mail-wr0-x243.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x243.google.com (mail-wr0-x243.google.com [IPv6:2a00:1450:400c:c0c::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9BFF52215BD81 for ; Mon, 29 Jan 2018 07:39:11 -0800 (PST) Received: by mail-wr0-x243.google.com with SMTP id 36so7724549wrh.1 for ; Mon, 29 Jan 2018 07:44:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gG35d+q0RVvxYIgdaNGUv1SrUPdV18QKVgxxp/qv404=; b=Nb1Pf3LXKW7hDqwKerbKvqzItD9dKyP3qFKr0AcdZz68H8a6iDDvymugGH4nI2yJK9 70MqdvW1jDDuHG54hkEmBlHD80q8eilZrUKQ7DdQOSbnzTYf1bcQNXJ6Fgm2peSD51NC 0MB7ABVUfbgviBuAa0vex0kfUlPX8Q78k6xyw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gG35d+q0RVvxYIgdaNGUv1SrUPdV18QKVgxxp/qv404=; b=h8/A5mlYHqhz45oTF6Auy/LBmM65oAt2eAfXgfXq6xddiQ7252VLUhiQT0pH9Yvol6 BgIHcjmLbBMT4TbYjD82WqOYMyp4MCxbAspdvNAf/ya4nhDrm9oGHXQ9HU5dGd+jYEfP DXem3B0V3PRL0y/Yxnox2RlR0H8yh4PLgzmphQY6JzCXtFegMfKWij3qfMx+k/EKBi+W Gx+aF7BYOk12tke8ltnc1Bu+faE3y9aHYsxe00d6P/lsfPlQ6JcVXOXXcuKUmw6TdEdH oE++N+ErOF2laU2EmE2Q35Mqg8FtyUggM3uJEU/kIvG0U5N7EUuHaYqhnqCYfwrjLPLa 5udg== X-Gm-Message-State: AKwxytd0nU8XIcnDS/bus+nCs9iE+l9LsFGBGxgQN7qZ1tr07J3FBaiD QTRNHolYMFkhUBwmZ0R3JjmT6QZhsgk= X-Received: by 10.223.157.6 with SMTP id k6mr5458980wre.273.1517240683833; Mon, 29 Jan 2018 07:44:43 -0800 (PST) Received: from localhost.localdomain ([160.90.205.229]) by smtp.gmail.com with ESMTPSA id m191sm8670928wma.42.2018.01.29.07.44.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Jan 2018 07:44:43 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Mon, 29 Jan 2018 15:44:13 +0000 Message-Id: <20180129154416.3622-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180129154416.3622-1-ard.biesheuvel@linaro.org> References: <20180129154416.3622-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms 1/4] Platform/SynQuacerEvalBoard: add RamDiskDxe driver to build X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add the RamDiskDxe driver, which is required for HTTP booting .iso images. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 2 ++ Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf | 1 + 2 files changed, 3 insertions(+) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc index 70ec7d7baeec..28a48f4607a8 100644 --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc @@ -108,6 +108,7 @@ [LibraryClasses.common] PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf @@ -580,6 +581,7 @@ [Components.common] MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf FatPkg/EnhancedFatDxe/Fat.inf + MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf # # RNG diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf index 1599f8953008..1ebc55ddc84d 100644 --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf @@ -181,6 +181,7 @@ [FV.FvMain] INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/RamDiskDxe/RamDiskDxe.inf # # RNG From patchwork Mon Jan 29 15:44:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 126173 Delivered-To: patch@linaro.org Received: by 10.46.84.92 with SMTP id y28csp2542564ljd; Mon, 29 Jan 2018 07:44:52 -0800 (PST) X-Google-Smtp-Source: AH8x227FFO+ulMwzBEHn+0fA7IbOwN3sSilW/birp0Gt6iS2HRvS6Eg+20rLW8E6Ny5lcehTMB9r X-Received: by 10.99.116.22 with SMTP id p22mr13596890pgc.4.1517240692370; Mon, 29 Jan 2018 07:44:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517240692; cv=none; d=google.com; s=arc-20160816; b=OohPUim1s5WUQ6+3PMweKP4Z7VlrPWcp+xA8iFmqsXXV0PIzx0UtQ+5yx/nT07NLKw HeGN0DjZm6y6Q8mQ7802o8mf/OwGZojLZUNo6gVDIeoVoRzRzwfiC3zpm16ZzPZQ+h06 dk3XpnMVdkAnSukfO26M5QmEIMSX0Q1HX01nPl64InktJnXBNAj+8ywQ6waVuaRMqsI+ CNyCVUYNuPQuhvynUVVmuSKue0rbbM46hBQFJssdpmBH/cmU43fgaJ1ZACrtSwso7shJ 2hj4x1AenJItkCbgegTOGJ2bHCmqRw6ftdvzz6uBOPavd/FWEBMZB6AaNwVTvQ+gIv3L jBiw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=4rrvy/0CU/6Vzl/VLz+el8NwCl9UJzDARv5Qysor/to=; b=ppomzjDr88eAt7quo+6fNjVojTs2urBgWHEF9oqVnq+8xGA9oQiOK4ptrT/P1AJkS6 6Lz5AN9S4SV3w0NPS0JlgL8ZyNFLG4Djs0rar838bHaNj3NHw1x7ErftUXeeBDRnqxKE XAECI59BaKJa01FyhayKFm5gtDR9w6S/gFqesZGlWGddXO3ay91AIsCRDBX4Fw+r1cY2 /g/UnrWWbOGBpBWvzl9kaMseXmZ4xhguODEVcOK4KsF5AG+ethuV2zy8BQYTxiojUmIM 2OROB5kXagn+OQPnyvA/xxuo3O4jVeOZG3F+GZ1B9yQrShX0keTuAwfOSK1GDbvJ4Uu8 JGMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=d2/rYk51; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id w6si7638424pgo.491.2018.01.29.07.44.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Jan 2018 07:44:52 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=d2/rYk51; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id D692F2215BDBE; Mon, 29 Jan 2018 07:39:17 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::242; helo=mail-wr0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x242.google.com (mail-wr0-x242.google.com [IPv6:2a00:1450:400c:c0c::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7D8152215BD81 for ; Mon, 29 Jan 2018 07:39:15 -0800 (PST) Received: by mail-wr0-x242.google.com with SMTP id f6so6078073wra.6 for ; Mon, 29 Jan 2018 07:44:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pgqVkk1TEEbSAH22Y5pEqYQdPcUfLln11eAwGUfddCw=; b=d2/rYk51F5Ui5mQAZCOcQAGx+RIUJEdLxeewVxmRAT9CZrQJNgkkq4GLU9W5an20G3 9fz753zmxA/WVij5p/9jsXJPYI0Dg+fl+NOE6Cf02uFmFL82JmWvo7HOTkNLlbyaj95B HXmX0tvXnsepVFjZYp5h9A28Lyce2WkUcf684= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pgqVkk1TEEbSAH22Y5pEqYQdPcUfLln11eAwGUfddCw=; b=ZFet6XjG1aYnCrDkRKnQechiM+j6wG0jxA1RhmFlu7pkIuzym6Mopz63RIDeUTmK1C vUVh90Ja9aDMhhX+5XprHEQrsd6iI58fydyNYMR3TTSzXi6MciRivdBRhwFbKSOwaWjK jsW1m/jDBn48t3NrLUGe5n10oapu/H5tgHjyQED/mhwpFLUuKtiKodD/ka70OHnPAIsj SzCFhjIY7s6JZI7iZkEXD4oYKd8s6YwkcyKwl4P1n40rtuqyczaThdQo7AQvA/1SnXE+ ChnbUnTTQ5e4abHuUnRMqePFt7lrxWOJWjs/ngCsk51RIkCZ0G3F984VKIXzAL5jbcCd U83w== X-Gm-Message-State: AKwxytfc6m9IqNJGF0ScLGeXTf7CpWQZSt2JDVWLeo2jaLFich3KK1Hp PuQmyoiRxfIhTvbiQMuQvaQBoUGAfHQ= X-Received: by 10.223.196.226 with SMTP id o31mr6191635wrf.188.1517240687796; Mon, 29 Jan 2018 07:44:47 -0800 (PST) Received: from localhost.localdomain ([160.90.205.229]) by smtp.gmail.com with ESMTPSA id m191sm8670928wma.42.2018.01.29.07.44.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Jan 2018 07:44:46 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Mon, 29 Jan 2018 15:44:14 +0000 Message-Id: <20180129154416.3622-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180129154416.3622-1-ard.biesheuvel@linaro.org> References: <20180129154416.3622-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms 2/4] Platform/SynQuacerEvalBoard: add BGRT and ConsolePrefDxe drivers X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Add the drivers that make the serial and graphical console behave more intuitively. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc | 6 ++++++ Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf | 6 ++++++ 2 files changed, 12 insertions(+) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc index 28a48f4607a8..e35c17f0bcb7 100644 --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.dsc @@ -547,6 +547,7 @@ [Components.common] MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf MdeModulePkg/Universal/EbcDxe/EbcDxe.inf + MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf # # eMMC support @@ -616,6 +617,11 @@ [Components.common] } # + # Console preference selection + # + EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe.inf + + # # DT support # Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.inf diff --git a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf index 1ebc55ddc84d..ba2f32328c2b 100644 --- a/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf +++ b/Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf @@ -147,6 +147,7 @@ [FV.FvMain] INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf + INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf # # eMMC support @@ -213,6 +214,11 @@ [FV.FvMain] INF Silicon/Socionext/SynQuacer/Drivers/Net/NetsecDxe/NetsecDxe.inf # + # Console preference selection + # + INF EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe.inf + + # # DT support # INF RuleOverride = DTB Silicon/Socionext/SynQuacer/DeviceTree/SynQuacerEvalBoard.inf From patchwork Mon Jan 29 15:44:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 126174 Delivered-To: patch@linaro.org Received: by 10.46.84.92 with SMTP id y28csp2542592ljd; Mon, 29 Jan 2018 07:44:54 -0800 (PST) X-Google-Smtp-Source: AH8x224ridJWNIJl0RM+zsQPAJtTVr5flt46/cIupV5bTSLgYUaqTQNx5VhskwVh3TZWlDbxVvei X-Received: by 10.101.80.202 with SMTP id s10mr21407745pgp.226.1517240694022; Mon, 29 Jan 2018 07:44:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517240694; cv=none; d=google.com; s=arc-20160816; b=WBVSJN/svzz9e/sQTbT9+kRbSp22UkD+QHvSwqTRLaE5+DvVbUzakgHvOxv0188A9P AVq9maJj/p4UukPmkVuIkwxqdnHgBjXKK7v0U/BAaBKXbfsMSyGsaAWf2QGKwzuigPQp V2roth+NbYng0GdtmqZGlodDaPOUv9DrtB6fSMWR5VsDnbWlzOsVLTmqcU4B/Xk0lC3N w/FnGR9tK5PqCUckCFdrTMRXINeFaSlyO2GO05jYLyNmy2KndW6Ou4krd83NZo3v6caM CCVxcz5w5011DcXlX6VOrKwqa0d3GmE+eWIm67Z7lmoq81wqj/0J9mPyEe7LE3xDMZY7 mYYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:references:in-reply-to:message-id:date :to:from:dkim-signature:delivered-to:arc-authentication-results; bh=D+LU5uVz+gReX9CypAZNfHxCDtVH+jSpIMKed463CM4=; b=n8eUoRmoFUlAB91T0p2vmQ8Ve6UJFs0l2cbUwtFeWJ2HQDmy17fhbhCB+C0RHCUf/G gHok1n8KVgwYu2xwzD7pmmhE6hEhpDanvFQubC8Y8tZdraZJtyRrAjLgYbyIbuXgdBz5 B/QvjrKqo5NyOB+QXEUoOYPppXJtlpzi093vOxZ7W9gNX4bLvwIAHNE+K8C2xEJsopSh Z20v3VM0qzEeH/ZprF4X5r+mprVr7D6yBpvuyuzvJGg91kw8DKIBrAW3rgAlD3tOP6J6 /2qwBVPcfdrMh+JOr9+MgQLaCktzU/wgLYE66+N/ZnKc76MSEBekG4pVFEjaiC2V1IJD gUag== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=RbS9iq3S; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id o32-v6si2044738pld.52.2018.01.29.07.44.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Jan 2018 07:44:54 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=RbS9iq3S; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 3EF5221E25682; Mon, 29 Jan 2018 07:39:19 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::242; helo=mail-wr0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x242.google.com (mail-wr0-x242.google.com [IPv6:2a00:1450:400c:c0c::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 683772215BDAE for ; Mon, 29 Jan 2018 07:39:17 -0800 (PST) Received: by mail-wr0-x242.google.com with SMTP id d9so7738197wre.3 for ; Mon, 29 Jan 2018 07:44:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AFeDLG6uQ5ZHPY762BrnIGCSc7+LwxeXOVQWYuWHVsY=; b=RbS9iq3SRoZOuBEil+YjEn6/G9A+u6yKZskSrg5rlHuwsaZ7YGO3uts9qGuKXEZnKu lECc5P9DQp5bToyplO0kyNXKq6pjgQ6FR35T9cVB2Pel26KG81Ze7MW+3FK0gGCRG+2B LLqBmGnV9izLNfpp4wbzXouk8AAeXAohrzoVg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AFeDLG6uQ5ZHPY762BrnIGCSc7+LwxeXOVQWYuWHVsY=; b=thsfKREnJ9VeaEPyTXbDk6hcuwnxvPJpMYhkKnS4Ql2l2mXPn499le70DL7NXmoR0o AlUHRHY2U+eR0bOJ/mtQ+LA983ADa+KNtXtC8sTPt+qb1HxBGpKGQZ2JB6jHnqhLNaPS zrbMUCq6iYw6k5DWqUN61FwaibosPT8ncVPvv7Q3T7fqsY+Kzh3c8qSLDRYMsOGcI2K7 SFjhrg/eVxFHTJN0XO2ySf5rWrZjIqp2r5CLWjJD3nBlCA7f5xTsrnlho6gngwVUtiq3 XLYhyItH6fyTxauqrgSxs704m99tjfPlmjFoEv39a7s5MNGBgpaxI0bLrL6DoVmNgliR NIrQ== X-Gm-Message-State: AKwxytdW3EU0UIfJTavck/uDy/gv6KjBE6ldOxwI1iH5i6E7fpyA70Eq LUrtLj1ByhT3h+e4urglaxYVPoxqk4M= X-Received: by 10.223.187.72 with SMTP id x8mr21518181wrg.179.1517240689813; Mon, 29 Jan 2018 07:44:49 -0800 (PST) Received: from localhost.localdomain ([160.90.205.229]) by smtp.gmail.com with ESMTPSA id m191sm8670928wma.42.2018.01.29.07.44.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Jan 2018 07:44:49 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Mon, 29 Jan 2018 15:44:15 +0000 Message-Id: <20180129154416.3622-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180129154416.3622-1-ard.biesheuvel@linaro.org> References: <20180129154416.3622-1-ard.biesheuvel@linaro.org> Subject: [edk2] [PATCH edk2-platforms 3/4] Silicon/SynQuacer: set CNTFRQ field of MMIO timer frame X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Even though the ARM ARM quite clearly states that the CNTFRQ field of each MMIO timer frame should be a read-only alias of the CNTFRQ field of the base frame, the SynQuacer SoC implements it as a register that is programmable separately. So let's program it from the hardware rather than overriding the frequency using a DT property. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 1 - Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c | 18 ++++++++++++++++++ Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h | 1 + Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 ++ Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 3 +++ 5 files changed, 24 insertions(+), 1 deletion(-) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi index 12b90a64da8b..3db3c5ed1c50 100644 --- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi +++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi @@ -368,7 +368,6 @@ mmio-timer@2a810000 { compatible = "arm,armv7-timer-mem"; reg = <0x0 0x2a810000 0x0 0x10000>; - clock-frequency = <100000000>; #address-cells = <2>; #size-cells = <2>; ranges; diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c index 7d7d2ec80e8e..aab830dc3a5a 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c @@ -174,6 +174,23 @@ SmmuEnableCoherentDma ( SMMU_SCR0_SHCFG_INNER | SMMU_SCR0_MTCFG | SMMU_SCR0_MEMATTR_INNER_OUTER_WB); } +#define MMIO_TIMER_CNTFRQ_OFFSET 0x10 + +STATIC +VOID +SetMmioTimerFrequency ( + VOID + ) +{ + // + // Initialize the CNTFRQ field of the first non-secure MMIO timer frame. + // This field should be a read-only alias of the global frequency register + // but in reality, it is a separate field that needs to be set explicitly. + // + MmioWrite32 (SYNQUACER_MMIO_TIMER_CNT_BASE0 + MMIO_TIMER_CNTFRQ_OFFSET, + ArmGenericTimerGetTimerFreq ()); +} + STATIC EFI_STATUS InstallHiiPages ( @@ -297,6 +314,7 @@ PlatformDxeEntryPoint ( ASSERT_EFI_ERROR (Status); SmmuEnableCoherentDma (); + SetMmioTimerFrequency (); Status = RegisterPcieNotifier (); ASSERT_EFI_ERROR (Status); diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h index b109bd359e13..a391d2f67c29 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.h @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include diff --git a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf index e13e16f3da6b..49d9deee57ea 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf +++ b/Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf @@ -30,6 +30,7 @@ [Sources] PlatformDxeHii.vfr [Packages] + ArmPkg/ArmPkg.dec EmbeddedPkg/EmbeddedPkg.dec MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec @@ -38,6 +39,7 @@ [Packages] Silicon/Socionext/SynQuacer/SynQuacer.dec [LibraryClasses] + ArmGenericTimerCounterLib BaseLib BaseMemoryLib DebugLib diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h index f43adcc8607f..fff760477488 100644 --- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h +++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h @@ -69,4 +69,7 @@ #define SYNQUACER_SCB_SMMU_BASE 0x52E00000 #define SYNQUACER_SCB_SMMU_SIZE SIZE_64KB +#define SYNQUACER_MMIO_TIMER_CTL_BASE 0x2A810000 +#define SYNQUACER_MMIO_TIMER_CNT_BASE0 0x2A830000 + #endif From patchwork Mon Jan 29 15:44:16 2018 Content-Type: text/plain; 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Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c | 35 ++++++++++++++++++++ Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.inf | 3 ++ 2 files changed, 38 insertions(+) -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c index 5a67f8c00995..fbb8f1f9e48c 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.c @@ -16,11 +16,13 @@ #include #include +#include #include #include #include #include #include +#include #include @@ -145,6 +147,17 @@ PerformFlashWrite ( EFI_LBA Lba; EFI_PHYSICAL_ADDRESS FvbBaseAddress; UINTN NumBytes; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION Black; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION White; + UINTN Resolution; + UINTN Progress; + BOOLEAN HaveBootGraphics; + + Black.Raw = 0x00000000; + White.Raw = 0x00FFFFFF; + + Status = BootLogoEnableLogo (); + HaveBootGraphics = !EFI_ERROR (Status); if (FlashAddressType != FlashAddressTypeAbsoluteAddress) { DEBUG ((DEBUG_ERROR, "%a: only FlashAddressTypeAbsoluteAddress supported\n", @@ -213,6 +226,16 @@ PerformFlashWrite ( return Status; } + if (HaveBootGraphics) { + Resolution = (BlockSize * 100) / Length + 1; + Progress = 0; + + Status = BootLogoUpdateProgress (White.Pixel, Black.Pixel, + L"Updating firmware - please wait", Black.Pixel, 100, 0); + } else { + Print (L"Updating firmware - please wait "); + } + // // Erase the region // @@ -242,10 +265,22 @@ PerformFlashWrite ( __FUNCTION__, Lba, Status, NumBytes)); } + if (HaveBootGraphics) { + Status = BootLogoUpdateProgress (White.Pixel, Black.Pixel, + L"Updating firmware - please wait", White.Pixel, + Progress + Resolution, Progress); + Progress += Resolution; + } else { + Print (L"."); + } + Buffer += BlockSize; Length -= BlockSize; Lba++; } + if (!HaveBootGraphics) { + Print (L"\n"); + } return EFI_SUCCESS; } diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.inf index 33f4795ddcf9..4dfa11372a38 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.inf +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformFlashAccessLib/SynQuacerPlatformFlashAccessLib.inf @@ -24,6 +24,7 @@ [Sources] SynQuacerPlatformFlashAccessLib.c [Packages] + MdeModulePkg/MdeModulePkg.dec MdePkg/MdePkg.dec SignedCapsulePkg/SignedCapsulePkg.dec @@ -32,7 +33,9 @@ [Protocols] [LibraryClasses] BaseMemoryLib + BootLogoLib DebugLib DxeServicesTableLib UefiBootServicesTableLib + UefiLib